1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2019 Toradex
6 #ifndef __COLIBRI_IMX8X_H
7 #define __COLIBRI_IMX8X_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_REMAKE_ELF
14 #define CONFIG_DISPLAY_BOARDINFO_LATE
16 #undef CONFIG_BOOTM_NETBSD
18 #define CONFIG_FSL_ESDHC
19 #define CONFIG_FSL_USDHC
20 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
21 #define USDHC1_BASE_ADDR 0x5b010000
22 #define USDHC2_BASE_ADDR 0x5b020000
23 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
25 #define CONFIG_ENV_OVERWRITE
27 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
30 #define FEC_QUIRK_ENET_MAC
32 #define CONFIG_IP_DEFRAG
33 #define CONFIG_TFTP_BLOCKSIZE SZ_4K
34 #define CONFIG_TFTP_TSIZE
36 #define CONFIG_IPADDR 192.168.10.2
37 #define CONFIG_NETMASK 255.255.255.0
38 #define CONFIG_SERVERIP 192.168.10.1
40 #define MEM_LAYOUT_ENV_SETTINGS \
41 "fdt_addr_r=0x83000000\0" \
42 "kernel_addr_r=0x81000000\0" \
43 "ramdisk_addr_r=0x83800000\0" \
44 "scriptaddr=0x80800000\0"
46 #ifdef CONFIG_AHAB_BOOT
47 #define AHAB_ENV "sec_boot=yes\0"
49 #define AHAB_ENV "sec_boot=no\0"
54 "m4_0_image=m4_0.bin\0" \
55 "loadm4image_0=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
57 "m4boot_0=run loadm4image_0; dcache flush; bootaux ${loadaddr} 0\0" \
59 #define MFG_NAND_PARTITION ""
61 #define BOOT_TARGET_DEVICES(func) \
65 #include <config_distro_bootcmd.h>
66 #undef BOOTENV_RUN_NET_USB_START
67 #define BOOTENV_RUN_NET_USB_START ""
69 #define CONFIG_MFG_ENV_SETTINGS \
70 "mfgtool_args=setenv bootargs console=${console},${baudrate} " \
71 "rdinit=/linuxrc g_mass_storage.stall=0 " \
72 "g_mass_storage.removable=1 g_mass_storage.idVendor=0x066F " \
73 "g_mass_storage.idProduct=0x37FF " \
74 "g_mass_storage.iSerialNumber=\"\" " MFG_NAND_PARTITION \
75 "${vidargs} clk_ignore_unused\0" \
76 "initrd_addr=0x83800000\0" \
77 "initrd_high=0xffffffff\0" \
78 "bootcmd_mfg=run mfgtool_args;booti ${loadaddr} ${initrd_addr} " \
81 /* Initial environment variables */
82 #define CONFIG_EXTRA_ENV_SETTINGS \
85 CONFIG_MFG_ENV_SETTINGS \
87 MEM_LAYOUT_ENV_SETTINGS \
88 "console=ttyLP3 earlycon\0" \
89 "fdt_addr=0x83000000\0" \
90 "fdt_file=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
91 "fdtfile=fsl-imx8qxp-colibri-dsihdmi-eval-v3.dtb\0" \
92 "finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
94 "initrd_addr=0x83800000\0" \
95 "initrd_high=0xffffffffffffffff\0" \
96 "mmcargs=setenv bootargs console=${console},${baudrate} " \
97 "root=PARTUUID=${uuid} rootwait " \
98 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
99 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
100 "netargs=setenv bootargs console=${console},${baudrate} " \
101 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
103 "nfsboot=run netargs; dhcp ${loadaddr} ${image}; tftp ${fdt_addr} " \
104 "colibri-imx8x/${fdt_file}; booti ${loadaddr} - " \
107 "script=boot.scr\0" \
108 "update_uboot=askenv confirm Did you load u-boot-dtb.imx (y/N)?; " \
109 "if test \"$confirm\" = \"y\"; then " \
110 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
111 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x0 " \
113 "vidargs=video=imxdpufb5:off video=imxdpufb6:off video=imxdpufb7:off\0"
115 /* Link Definitions */
116 #define CONFIG_LOADADDR 0x80280000
118 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
120 #define CONFIG_SYS_INIT_SP_ADDR 0x80200000
122 #define CONFIG_SYS_MEMTEST_START 0x88000000
123 #define CONFIG_SYS_MEMTEST_END 0x89000000
125 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
126 #define CONFIG_ENV_SIZE SZ_8K
127 #define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE + \
128 CONFIG_TDX_CFG_BLOCK_OFFSET)
129 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */
130 #define CONFIG_SYS_MMC_ENV_PART 1
132 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
134 /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
135 #define CONFIG_SYS_FSL_USDHC_NUM 2
137 #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
139 /* Size of malloc() pool */
140 #define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (32 * 1024)) * 1024)
142 #define CONFIG_SYS_SDRAM_BASE 0x80000000
143 #define PHYS_SDRAM_1 0x80000000
144 #define PHYS_SDRAM_2 0x880000000
145 #define PHYS_SDRAM_1_SIZE SZ_2G /* 2 GB */
146 #define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
149 #define CONFIG_BAUDRATE 115200
151 /* Monitor Command Prompt */
152 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
153 #define CONFIG_SYS_CBSIZE SZ_2K
154 #define CONFIG_SYS_MAXARGS 64
155 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
156 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
157 sizeof(CONFIG_SYS_PROMPT) + 16)
159 /* Generic Timer Definitions */
160 #define COUNTER_FREQUENCY 8000000 /* 8MHz */
162 #define BOOTAUX_RESERVED_MEM_BASE 0x88000000
163 #define BOOTAUX_RESERVED_MEM_SIZE SZ_128M /* Reserve from second 128MB */
165 #endif /* __COLIBRI_IMX8X_H */