1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Author: Florian Schlote
13 * For a description of configuration options please refer also to the
14 * general u-boot-1.x.x/README file
19 * board/config.h - configuration options, board specific
23 #ifndef _CONFIG_COBRA5272_H
24 #define _CONFIG_COBRA5272_H
27 * Defines processor clock - important for correct timings concerning serial
32 #define CONFIG_SYS_CLK 66000000
33 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
36 * Enable use of Ethernet
41 /* Enable Dma Timer */
45 * Define baudrate for UART1 (console output, tftp, ...)
46 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
47 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
52 #define CONFIG_MCFUART
53 #define CONFIG_SYS_UART_PORT (0)
56 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
57 * timeout acc. to your needs
58 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
64 #define CONFIG_WATCHDOG
65 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
69 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
70 * bootloader residing in flash ('chainloading'); if you want to use
71 * chainloading or want to compile a u-boot binary that can be loaded into
74 * You will need a first stage bootloader then, e. g. colilo or a working BDM
75 * cable (Background Debug Mode)
77 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
79 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
80 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
86 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
90 * Configuration for environment
91 * Environment is embedded in u-boot in the second sector of the flash
95 #define LDS_BOARD_TEXT \
96 . = DEFINED(env_offset) ? env_offset : .; \
97 env/embedded.o(.text);
102 #define CONFIG_BOOTP_BOOTFILESIZE
105 * Command line configuration.
109 # define CONFIG_MII_INIT 1
110 # define CONFIG_SYS_DISCOVER_PHY
111 # define CONFIG_SYS_RX_ETH_BUFFER 8
112 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
114 # define CONFIG_SYS_FEC0_PINMUX 0
115 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
116 # define MCFFEC_TOUT_LOOP 50000
117 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
118 # ifndef CONFIG_SYS_DISCOVER_PHY
119 # define FECDUPLEX FULL
120 # define FECSPEED _100BASET
122 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
123 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
125 # endif /* CONFIG_SYS_DISCOVER_PHY */
129 *-----------------------------------------------------------------------------
130 * Define user parameters that have to be customized most likely
131 *-----------------------------------------------------------------------------
134 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
136 /* The following settings will be contained in the environment block ; if you
137 want to use a neutral environment all those settings can be manually set in
138 u-boot: 'set' command */
142 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
143 enter a valid image address in flash */
145 /* User network settings */
147 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
148 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
152 #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
153 from which user programs will be started */
158 *-----------------------------------------------------------------------------
159 * End of user parameters to be customized
160 *-----------------------------------------------------------------------------
164 * Defines memory range for test
168 #define CONFIG_SYS_MEMTEST_START 0x400
169 #define CONFIG_SYS_MEMTEST_END 0x380000
172 * Low Level Configuration Settings
173 * (address mappings, register initial values, etc.)
174 * You should know what you are doing if you make changes here.
179 * Base register address
183 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
186 * System Conf. Reg. & System Protection Reg.
190 #define CONFIG_SYS_SCR 0x0003
191 #define CONFIG_SYS_SPR 0xffff
198 #define CONFIG_SYS_DISCOVER_PHY
199 #define CONFIG_SYS_ENET_BD_BASE 0x780000
201 /*-----------------------------------------------------------------------
202 * Definitions for initial stack pointer and data area (in internal SRAM)
204 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
205 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
206 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
207 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
209 /*-----------------------------------------------------------------------
210 * Start addresses for the final memory configuration
211 * (Set up by the startup code)
212 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
214 #define CONFIG_SYS_SDRAM_BASE 0x00000000
217 *-------------------------------------------------------------------------
218 * RAM SIZE (is defined above)
219 *-----------------------------------------------------------------------
222 /* #define CONFIG_SYS_SDRAM_SIZE 16 */
225 *-----------------------------------------------------------------------
228 #define CONFIG_SYS_FLASH_BASE 0xffe00000
230 #ifdef CONFIG_MONITOR_IS_IN_RAM
231 #define CONFIG_SYS_MONITOR_BASE 0x20000
233 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
236 #define CONFIG_SYS_MONITOR_LEN 0x20000
237 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
238 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
241 * For booting Linux, the board info and command line data
242 * have to be in the first 8 MB of memory, since this is
243 * the maximum mapped by the Linux kernel during initialization ??
245 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
247 /*-----------------------------------------------------------------------
250 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
251 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
252 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
254 /*-----------------------------------------------------------------------
255 * Cache Configuration
257 #define CONFIG_SYS_CACHELINE_SIZE 16
259 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
260 CONFIG_SYS_INIT_RAM_SIZE - 8)
261 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
262 CONFIG_SYS_INIT_RAM_SIZE - 4)
263 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
264 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
265 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
266 CF_ACR_EN | CF_ACR_SM_ALL)
267 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
268 CF_CACR_DISD | CF_CACR_INVI | \
269 CF_CACR_CEIB | CF_CACR_DCM | \
272 /*-----------------------------------------------------------------------
273 * Memory bank definitions
275 * Please refer also to Motorola Coldfire user manual - Chapter XXX
276 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
278 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201
279 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014
281 #define CONFIG_SYS_BR1_PRELIM 0
282 #define CONFIG_SYS_OR1_PRELIM 0
284 #define CONFIG_SYS_BR2_PRELIM 0
285 #define CONFIG_SYS_OR2_PRELIM 0
287 #define CONFIG_SYS_BR3_PRELIM 0
288 #define CONFIG_SYS_OR3_PRELIM 0
290 #define CONFIG_SYS_BR4_PRELIM 0
291 #define CONFIG_SYS_OR4_PRELIM 0
293 #define CONFIG_SYS_BR5_PRELIM 0
294 #define CONFIG_SYS_OR5_PRELIM 0
296 #define CONFIG_SYS_BR6_PRELIM 0
297 #define CONFIG_SYS_OR6_PRELIM 0
299 #define CONFIG_SYS_BR7_PRELIM 0x00000701
300 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C
302 /*-----------------------------------------------------------------------
305 #define LED_STAT_0 0xffff /*all LEDs off*/
306 #define LED_STAT_1 0xfffe
307 #define LED_STAT_2 0xfffd
308 #define LED_STAT_3 0xfffb
309 #define LED_STAT_4 0xfff7
310 #define LED_STAT_5 0xffef
311 #define LED_STAT_6 0xffdf
312 #define LED_STAT_7 0xff00 /*all LEDs on*/
314 /*-----------------------------------------------------------------------
315 * Port configuration (GPIO)
317 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
319 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
320 (1^=output, 0^=input) */
321 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
322 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
324 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
325 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
326 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
328 #endif /* _CONFIG_COBRA5272_H */