1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuation settings for the Sentec Cobra Board.
5 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
9 * Version: U-Boot 1.0.0 - initial release for Sentec COBRA5272 board
11 * Author: Florian Schlote
13 * For a description of configuration options please refer also to the
14 * general u-boot-1.x.x/README file
19 * board/config.h - configuration options, board specific
23 #ifndef _CONFIG_COBRA5272_H
24 #define _CONFIG_COBRA5272_H
27 * Defines processor clock - important for correct timings concerning serial
32 #define CONFIG_SYS_CLK 66000000
33 #define CONFIG_SYS_SDRAM_SIZE 16 /* SDRAM size in MB */
35 /* Enable Dma Timer */
39 * Define baudrate for UART1 (console output, tftp, ...)
40 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud
41 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected in u-boot command
46 #define CONFIG_MCFUART
47 #define CONFIG_SYS_UART_PORT (0)
50 * set "#if 0" to "#if 1" if (Hardware)-WATCHDOG should be enabled & change
51 * timeout acc. to your needs
52 * #define CONFIG_WATCHDOG_TIMEOUT x , x is timeout in milliseconds, e. g. 10000
58 #define CONFIG_WATCHDOG
59 #define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
63 * CONFIG_MONITOR_IS_IN_RAM defines if u-boot is started from a different
64 * bootloader residing in flash ('chainloading'); if you want to use
65 * chainloading or want to compile a u-boot binary that can be loaded into
68 * You will need a first stage bootloader then, e. g. colilo or a working BDM
69 * cable (Background Debug Mode)
71 * Setting #if 0: u-boot will start from flash and relocate itself to RAM
73 * Please do not forget to modify the setting of CONFIG_SYS_TEXT_BASE
74 * in board/cobra5272/config.mk accordingly (#if 0: 0xffe00000; #if 1: 0x20000)
80 #define CONFIG_MONITOR_IS_IN_RAM /* monitor is started from a preloader */
84 * Configuration for environment
85 * Environment is embedded in u-boot in the second sector of the flash
89 #define LDS_BOARD_TEXT \
90 . = DEFINED(env_offset) ? env_offset : .; \
91 env/embedded.o(.text);
96 #define CONFIG_BOOTP_BOOTFILESIZE
99 * Command line configuration.
103 # define CONFIG_MII_INIT 1
104 # define CONFIG_SYS_DISCOVER_PHY
105 # define CONFIG_SYS_RX_ETH_BUFFER 8
106 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
107 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
108 # ifndef CONFIG_SYS_DISCOVER_PHY
109 # define FECDUPLEX FULL
110 # define FECSPEED _100BASET
112 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
113 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
115 # endif /* CONFIG_SYS_DISCOVER_PHY */
119 *-----------------------------------------------------------------------------
120 * Define user parameters that have to be customized most likely
121 *-----------------------------------------------------------------------------
124 /*AUTOBOOT settings - booting images automatically by u-boot after power on*/
126 /* The following settings will be contained in the environment block ; if you
127 want to use a neutral environment all those settings can be manually set in
128 u-boot: 'set' command */
132 #define CONFIG_BOOTCOMMAND "bootm 0xffe80000" /*Autoboto command, please
133 enter a valid image address in flash */
135 /* User network settings */
137 #define CONFIG_IPADDR 192.168.100.2 /* default board IP address */
138 #define CONFIG_SERVERIP 192.168.100.1 /* default tftp server IP address */
142 #define CONFIG_SYS_LOAD_ADDR 0x20000 /*Defines default RAM address
143 from which user programs will be started */
148 *-----------------------------------------------------------------------------
149 * End of user parameters to be customized
150 *-----------------------------------------------------------------------------
154 * Defines memory range for test
158 #define CONFIG_SYS_MEMTEST_START 0x400
159 #define CONFIG_SYS_MEMTEST_END 0x380000
162 * Low Level Configuration Settings
163 * (address mappings, register initial values, etc.)
164 * You should know what you are doing if you make changes here.
169 * Base register address
173 #define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
176 * System Conf. Reg. & System Protection Reg.
180 #define CONFIG_SYS_SCR 0x0003
181 #define CONFIG_SYS_SPR 0xffff
188 #define CONFIG_SYS_DISCOVER_PHY
189 #define CONFIG_SYS_ENET_BD_BASE 0x780000
191 /*-----------------------------------------------------------------------
192 * Definitions for initial stack pointer and data area (in internal SRAM)
194 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
195 #define CONFIG_SYS_INIT_RAM_SIZE 0x1000 /* Size of used area in internal SRAM */
196 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
197 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
199 /*-----------------------------------------------------------------------
200 * Start addresses for the final memory configuration
201 * (Set up by the startup code)
202 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
204 #define CONFIG_SYS_SDRAM_BASE 0x00000000
207 *-------------------------------------------------------------------------
208 * RAM SIZE (is defined above)
209 *-----------------------------------------------------------------------
212 /* #define CONFIG_SYS_SDRAM_SIZE 16 */
215 *-----------------------------------------------------------------------
218 #define CONFIG_SYS_FLASH_BASE 0xffe00000
220 #ifdef CONFIG_MONITOR_IS_IN_RAM
221 #define CONFIG_SYS_MONITOR_BASE 0x20000
223 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
226 #define CONFIG_SYS_MONITOR_LEN 0x20000
227 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
228 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
231 * For booting Linux, the board info and command line data
232 * have to be in the first 8 MB of memory, since this is
233 * the maximum mapped by the Linux kernel during initialization ??
235 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
237 /*-----------------------------------------------------------------------
240 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
241 #define CONFIG_SYS_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
242 #define CONFIG_SYS_FLASH_ERASE_TOUT 1000 /* flash timeout */
244 /*-----------------------------------------------------------------------
245 * Cache Configuration
247 #define CONFIG_SYS_CACHELINE_SIZE 16
249 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
250 CONFIG_SYS_INIT_RAM_SIZE - 8)
251 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
252 CONFIG_SYS_INIT_RAM_SIZE - 4)
253 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
254 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
255 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
256 CF_ACR_EN | CF_ACR_SM_ALL)
257 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
258 CF_CACR_DISD | CF_CACR_INVI | \
259 CF_CACR_CEIB | CF_CACR_DCM | \
262 /*-----------------------------------------------------------------------
263 * Memory bank definitions
265 * Please refer also to Motorola Coldfire user manual - Chapter XXX
266 * <http://e-www.motorola.com/files/dsp/doc/ref_manual/MCF5272UM.pdf>
268 #define CONFIG_SYS_BR0_PRELIM 0xFFE00201
269 #define CONFIG_SYS_OR0_PRELIM 0xFFE00014
271 #define CONFIG_SYS_BR1_PRELIM 0
272 #define CONFIG_SYS_OR1_PRELIM 0
274 #define CONFIG_SYS_BR2_PRELIM 0
275 #define CONFIG_SYS_OR2_PRELIM 0
277 #define CONFIG_SYS_BR3_PRELIM 0
278 #define CONFIG_SYS_OR3_PRELIM 0
280 #define CONFIG_SYS_BR4_PRELIM 0
281 #define CONFIG_SYS_OR4_PRELIM 0
283 #define CONFIG_SYS_BR5_PRELIM 0
284 #define CONFIG_SYS_OR5_PRELIM 0
286 #define CONFIG_SYS_BR6_PRELIM 0
287 #define CONFIG_SYS_OR6_PRELIM 0
289 #define CONFIG_SYS_BR7_PRELIM 0x00000701
290 #define CONFIG_SYS_OR7_PRELIM 0xFF00007C
292 /*-----------------------------------------------------------------------
295 #define LED_STAT_0 0xffff /*all LEDs off*/
296 #define LED_STAT_1 0xfffe
297 #define LED_STAT_2 0xfffd
298 #define LED_STAT_3 0xfffb
299 #define LED_STAT_4 0xfff7
300 #define LED_STAT_5 0xffef
301 #define LED_STAT_6 0xffdf
302 #define LED_STAT_7 0xff00 /*all LEDs on*/
304 /*-----------------------------------------------------------------------
305 * Port configuration (GPIO)
307 #define CONFIG_SYS_PACNT 0x00000000 /* PortA control reg.: All pins are external
309 #define CONFIG_SYS_PADDR 0x00FF /* PortA direction reg.: PA7 to PA0 are outputs
310 (1^=output, 0^=input) */
311 #define CONFIG_SYS_PADAT LED_STAT_0 /* PortA value reg.: Turn all LED off */
312 #define CONFIG_SYS_PBCNT 0x55554155 /* PortB control reg.: Ethernet/UART
314 #define CONFIG_SYS_PBDDR 0x0000 /* PortB direction: All pins configured as inputs */
315 #define CONFIG_SYS_PBDAT 0x0000 /* PortB value reg. */
316 #define CONFIG_SYS_PDCNT 0x00000000 /* PortD control reg. */
318 #endif /* _CONFIG_COBRA5272_H */