ARM: configs: Add da850evm_nand to boot from NAND
[oweals/u-boot.git] / include / configs / cm_t43.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * cm_t43.h
4  *
5  * Copyright (C) 2015 Compulab, Ltd.
6  */
7
8 #ifndef __CONFIG_CM_T43_H
9 #define __CONFIG_CM_T43_H
10
11 #define CONFIG_CM_T43
12 #define CONFIG_ARCH_CPU_INIT
13 #define CONFIG_MAX_RAM_BANK_SIZE        (2048 << 20)    /* 2GB */
14 #define CONFIG_SYS_TIMERBASE            0x48040000      /* Use Timer2 */
15
16 #include <asm/arch/omap.h>
17
18 /* Serial support */
19 #define CONFIG_SYS_NS16550_SERIAL
20 #define CONFIG_SYS_NS16550_CLK          48000000
21 #define CONFIG_SYS_NS16550_COM1         0x44e09000
22 #if !defined(CONFIG_SPL_DM) || !defined(CONFIG_DM_SERIAL)
23 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
24 #endif
25
26 /* NAND support */
27 #define CONFIG_SYS_NAND_ONFI_DETECTION
28 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
29 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
30 #define CONFIG_SYS_NAND_OOBSIZE         64
31 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
32 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
33 #define CONFIG_SYS_NAND_ECCSIZE         512
34 #define CONFIG_SYS_NAND_ECCBYTES        14
35 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW
36 #define CONFIG_SYS_NAND_PAGE_COUNT      (CONFIG_SYS_NAND_BLOCK_SIZE / \
37                                          CONFIG_SYS_NAND_PAGE_SIZE)
38 #define CONFIG_SYS_NAND_ECCPOS          { 2, 3, 4, 5, 6, 7, 8, 9, \
39                                          10, 11, 12, 13, 14, 15, 16, 17, \
40                                          18, 19, 20, 21, 22, 23, 24, 25, \
41                                          26, 27, 28, 29, 30, 31, 32, 33, \
42                                          34, 35, 36, 37, 38, 39, 40, 41, \
43                                          42, 43, 44, 45, 46, 47, 48, 49, \
44                                          50, 51, 52, 53, 54, 55, 56, 57, }
45
46 /* CPSW Ethernet support */
47 #define CONFIG_BOOTP_DEFAULT
48 #define CONFIG_BOOTP_SEND_HOSTNAME
49 #define CONFIG_PHY_ATHEROS
50 #define CONFIG_SYS_RX_ETH_BUFFER        64
51
52 /* USB support */
53 #define CONFIG_USB_XHCI_OMAP
54 #define CONFIG_AM437X_USB2PHY2_HOST
55
56 /* SPI Flash support */
57 #define CONFIG_TI_SPI_MMAP
58 #define CONFIG_SF_DEFAULT_SPEED         48000000
59 #define CONFIG_DEFAULT_SPI_MODE         SPI_MODE_3
60
61 /* Power */
62 #define CONFIG_POWER
63 #define CONFIG_POWER_I2C
64 #define CONFIG_POWER_TPS65218
65
66 /* Enabling L2 Cache */
67 #define CONFIG_SYS_L2_PL310
68 #define CONFIG_SYS_PL310_BASE           0x48242000
69
70 /*
71  * Since SPL did pll and ddr initialization for us,
72  * we don't need to do it twice.
73  */
74 #if !defined(CONFIG_SPL_BUILD)
75 #define CONFIG_SKIP_LOWLEVEL_INIT
76 #endif
77
78 #define CONFIG_HSMMC2_8BIT
79
80 #include <configs/ti_armv7_omap.h>
81 #undef CONFIG_SYS_MONITOR_LEN
82
83 #define CONFIG_ENV_SIZE                 (16 * 1024)
84
85 #define V_OSCK                          24000000  /* Clock output from T2 */
86 #define V_SCLK                          (V_OSCK)
87
88 #define CONFIG_ENV_SECT_SIZE            (64 * 1024)
89 #define CONFIG_ENV_OFFSET               (768 * 1024)
90 #define CONFIG_ENV_SPI_MAX_HZ           48000000
91
92 #define CONFIG_EXTRA_ENV_SETTINGS \
93         "loadaddr=0x80200000\0" \
94         "fdtaddr=0x81200000\0" \
95         "bootm_size=0x8000000\0" \
96         "autoload=no\0" \
97         "console=ttyO0,115200n8\0" \
98         "fdtfile=am437x-sb-som-t43.dtb\0" \
99         "kernel=zImage-cm-t43\0" \
100         "bootscr=bootscr.img\0" \
101         "emmcroot=/dev/mmcblk0p2 rw\0" \
102         "emmcrootfstype=ext4 rootwait\0" \
103         "emmcargs=setenv bootargs console=${console} " \
104                 "root=${emmcroot} " \
105                 "rootfstype=${emmcrootfstype}\0" \
106         "loadbootscript=load mmc 0 ${loadaddr} ${bootscr}\0" \
107         "bootscript=echo Running bootscript from mmc ...; " \
108                 "source ${loadaddr}\0" \
109         "emmcboot=echo Booting from emmc ... && " \
110                 "run emmcargs && " \
111                 "load mmc 1 ${loadaddr} ${kernel} && " \
112                 "load mmc 1 ${fdtaddr} ${fdtfile} && " \
113                 "bootz ${loadaddr} - ${fdtaddr}\0"
114
115 #define CONFIG_BOOTCOMMAND \
116         "mmc dev 0; " \
117         "if mmc rescan; then " \
118                 "if run loadbootscript; then " \
119                         "run bootscript; " \
120                 "fi; " \
121         "fi; " \
122         "mmc dev 1; " \
123         "if mmc rescan; then " \
124                 "run emmcboot; " \
125         "fi;"
126
127 /* SPL defines. */
128 #define CONFIG_SPL_TEXT_BASE            0x40300350
129 #define CONFIG_SYS_SPL_ARGS_ADDR        (CONFIG_SYS_SDRAM_BASE + (128 << 20))
130 #define CONFIG_SYS_SPI_U_BOOT_OFFS      (256 * 1024)
131 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)
132
133 /* EEPROM */
134 #define CONFIG_ENV_EEPROM_IS_ON_I2C
135 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
136 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       4
137 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5
138 #define CONFIG_SYS_EEPROM_SIZE                  256
139
140 #endif  /* __CONFIG_CM_T43_H */