sunxi: Add support for using MII phy-s with the GMAC nic
[oweals/u-boot.git] / include / configs / cm_t35.h
1 /*
2  * (C) Copyright 2011 CompuLab, Ltd.
3  * Mike Rapoport <mike@compulab.co.il>
4  * Igor Grinberg <grinberg@compulab.co.il>
5  *
6  * Based on omap3_beagle.h
7  * (C) Copyright 2006-2008
8  * Texas Instruments.
9  * Richard Woodruff <r-woodruff2@ti.com>
10  * Syed Mohammed Khasim <x0khasim@ti.com>
11  *
12  * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
13  *
14  * SPDX-License-Identifier:     GPL-2.0+
15  */
16
17 #ifndef __CONFIG_H
18 #define __CONFIG_H
19
20 /*
21  * High Level Configuration Options
22  */
23 #define CONFIG_OMAP     /* in a TI OMAP core */
24 #define CONFIG_OMAP34XX /* which is a 34XX */
25 #define CONFIG_OMAP_GPIO
26 #define CONFIG_CMD_GPIO
27 #define CONFIG_CM_T3X   /* working with CM-T35 and CM-T3730 */
28 #define CONFIG_OMAP_COMMON
29
30 #define CONFIG_SDRC     /* The chip has SDRC controller */
31
32 #include <asm/arch/cpu.h>               /* get chip and board defs */
33 #include <asm/arch/omap3.h>
34
35 /*
36  * Display CPU and Board information
37  */
38 #define CONFIG_DISPLAY_CPUINFO
39 #define CONFIG_DISPLAY_BOARDINFO
40
41 /* Clock Defines */
42 #define V_OSCK                  26000000        /* Clock output from T2 */
43 #define V_SCLK                  (V_OSCK >> 1)
44
45 #define CONFIG_MISC_INIT_R
46
47 #define CONFIG_OF_LIBFDT                1
48
49 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
50 #define CONFIG_SETUP_MEMORY_TAGS
51 #define CONFIG_INITRD_TAG
52 #define CONFIG_REVISION_TAG
53 #define CONFIG_SERIAL_TAG
54
55 /*
56  * Size of malloc() pool
57  */
58 #define CONFIG_ENV_SIZE         (16 << 10)      /* 16 KiB */
59                                         /* Sector */
60 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + (128 << 10))
61
62 /*
63  * Hardware drivers
64  */
65
66 /*
67  * NS16550 Configuration
68  */
69 #define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
70
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_SERIAL
73 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
74 #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
75
76 /*
77  * select serial console configuration
78  */
79 #define CONFIG_CONS_INDEX               3
80 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
81 #define CONFIG_SERIAL3                  3       /* UART3 */
82
83 /* allow to overwrite serial and ethaddr */
84 #define CONFIG_ENV_OVERWRITE
85 #define CONFIG_BAUDRATE                 115200
86 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
87                                         115200}
88
89 #define CONFIG_GENERIC_MMC
90 #define CONFIG_MMC
91 #define CONFIG_OMAP_HSMMC
92 #define CONFIG_DOS_PARTITION
93
94 /* USB */
95 #define CONFIG_USB_OMAP3
96 #define CONFIG_USB_EHCI
97 #define CONFIG_USB_EHCI_OMAP
98 #define CONFIG_USB_STORAGE
99 #define CONFIG_MUSB_UDC
100 #define CONFIG_TWL4030_USB
101 #define CONFIG_CMD_USB
102
103 /* USB device configuration */
104 #define CONFIG_USB_DEVICE
105 #define CONFIG_USB_TTY
106 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
107
108 /* commands to include */
109 #include <config_cmd_default.h>
110
111 #define CONFIG_CMD_CACHE
112 #define CONFIG_CMD_EXT2         /* EXT2 Support                 */
113 #define CONFIG_CMD_FAT          /* FAT support                  */
114 #define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands */
115 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
116 #define CONFIG_MTD_PARTITIONS
117 #define MTDIDS_DEFAULT          "nand0=nand"
118 #define MTDPARTS_DEFAULT        "mtdparts=nand:512k(x-loader),"\
119                                 "1920k(u-boot),256k(u-boot-env),"\
120                                 "4m(kernel),-(fs)"
121
122 #define CONFIG_CMD_I2C          /* I2C serial bus support       */
123 #define CONFIG_CMD_MMC          /* MMC support                  */
124 #define CONFIG_CMD_NAND         /* NAND support                 */
125 #define CONFIG_CMD_DHCP
126 #define CONFIG_CMD_PING
127
128 #undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
129 #undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
130 #undef CONFIG_CMD_IMLS          /* List all found images        */
131
132 #define CONFIG_SYS_NO_FLASH
133 #define CONFIG_SYS_I2C
134 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
135 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
136 #define CONFIG_SYS_I2C_OMAP34XX
137 #define CONFIG_SYS_I2C_EEPROM_ADDR      0x50
138 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  1
139 #define CONFIG_I2C_MULTI_BUS
140
141 /*
142  * TWL4030
143  */
144 #define CONFIG_TWL4030_POWER
145 #define CONFIG_TWL4030_LED
146
147 /*
148  * Board NAND Info.
149  */
150 #define CONFIG_SYS_NAND_QUIET_TEST
151 #define CONFIG_NAND_OMAP_GPMC
152 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
153                                                         /* to access nand */
154 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
155                                                         /* to access nand at */
156                                                         /* CS0 */
157 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
158                                                         /* devices */
159
160 /* Environment information */
161 #define CONFIG_BOOTDELAY                3
162 #define CONFIG_ZERO_BOOTDELAY_CHECK
163
164 #define CONFIG_EXTRA_ENV_SETTINGS \
165         "loadaddr=0x82000000\0" \
166         "usbtty=cdc_acm\0" \
167         "console=ttyO2,115200n8\0" \
168         "mpurate=500\0" \
169         "vram=12M\0" \
170         "dvimode=1024x768MR-16@60\0" \
171         "defaultdisplay=dvi\0" \
172         "mmcdev=0\0" \
173         "mmcroot=/dev/mmcblk0p2 rw\0" \
174         "mmcrootfstype=ext4 rootwait\0" \
175         "nandroot=/dev/mtdblock4 rw\0" \
176         "nandrootfstype=ubifs\0" \
177         "mmcargs=setenv bootargs console=${console} " \
178                 "mpurate=${mpurate} " \
179                 "vram=${vram} " \
180                 "omapfb.mode=dvi:${dvimode} " \
181                 "omapdss.def_disp=${defaultdisplay} " \
182                 "root=${mmcroot} " \
183                 "rootfstype=${mmcrootfstype}\0" \
184         "nandargs=setenv bootargs console=${console} " \
185                 "mpurate=${mpurate} " \
186                 "vram=${vram} " \
187                 "omapfb.mode=dvi:${dvimode} " \
188                 "omapdss.def_disp=${defaultdisplay} " \
189                 "root=${nandroot} " \
190                 "rootfstype=${nandrootfstype}\0" \
191         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
192         "bootscript=echo Running bootscript from mmc ...; " \
193                 "source ${loadaddr}\0" \
194         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
195         "mmcboot=echo Booting from mmc ...; " \
196                 "run mmcargs; " \
197                 "bootm ${loadaddr}\0" \
198         "nandboot=echo Booting from nand ...; " \
199                 "run nandargs; " \
200                 "nand read ${loadaddr} 2a0000 400000; " \
201                 "bootm ${loadaddr}\0" \
202
203 #define CONFIG_CMD_BOOTZ
204 #define CONFIG_BOOTCOMMAND \
205         "mmc dev ${mmcdev}; if mmc rescan; then " \
206                 "if run loadbootscript; then " \
207                         "run bootscript; " \
208                 "else " \
209                         "if run loaduimage; then " \
210                                 "run mmcboot; " \
211                         "else run nandboot; " \
212                         "fi; " \
213                 "fi; " \
214         "else run nandboot; fi"
215
216 /*
217  * Miscellaneous configurable options
218  */
219 #define CONFIG_AUTO_COMPLETE
220 #define CONFIG_CMDLINE_EDITING
221 #define CONFIG_TIMESTAMP
222 #define CONFIG_SYS_AUTOLOAD             "no"
223 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
224 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
225 #define CONFIG_SYS_PROMPT               "CM-T3x # "
226 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
227 /* Print Buffer Size */
228 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
229                                         sizeof(CONFIG_SYS_PROMPT) + 16)
230 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
231 /* Boot Argument Buffer Size */
232 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
233
234 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
235                                                                 /* works on */
236 #define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
237                                         0x01F00000) /* 31MB */
238
239 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
240                                                         /* load address */
241
242 /*
243  * OMAP3 has 12 GP timers, they can be driven by the system clock
244  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
245  * This rate is divided by a local divisor.
246  */
247 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
248 #define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
249
250 /*-----------------------------------------------------------------------
251  * Physical Memory Map
252  */
253 #define CONFIG_NR_DRAM_BANKS    1       /* CS1 is never populated */
254 #define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
255
256 /*-----------------------------------------------------------------------
257  * FLASH and environment organization
258  */
259
260 /* **** PISMO SUPPORT *** */
261 /* Configure the PISMO */
262 #define PISMO1_NAND_SIZE                GPMC_SIZE_128M
263
264 /* Monitor at start of flash */
265 #define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
266 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
267
268 #define CONFIG_ENV_IS_IN_NAND
269 #define SMNAND_ENV_OFFSET               0x260000 /* environment starts here */
270 #define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
271 #define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
272
273 #if defined(CONFIG_CMD_NET)
274 #define CONFIG_SMC911X
275 #define CONFIG_SMC911X_32_BIT
276 #define CM_T3X_SMC911X_BASE     0x2C000000
277 #define SB_T35_SMC911X_BASE     (CM_T3X_SMC911X_BASE + (16 << 20))
278 #define CONFIG_SMC911X_BASE     CM_T3X_SMC911X_BASE
279 #endif /* (CONFIG_CMD_NET) */
280
281 /* additions for new relocation code, must be added to all boards */
282 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
283 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
284 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
285 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR +     \
286                                          CONFIG_SYS_INIT_RAM_SIZE -     \
287                                          GENERATED_GBL_DATA_SIZE)
288
289 /* Status LED */
290 #define CONFIG_STATUS_LED               /* Status LED enabled */
291 #define CONFIG_BOARD_SPECIFIC_LED
292 #define CONFIG_GPIO_LED
293 #define GREEN_LED_GPIO                  186 /* CM-T35 Green LED is GPIO186 */
294 #define GREEN_LED_DEV                   0
295 #define STATUS_LED_BIT                  GREEN_LED_GPIO
296 #define STATUS_LED_STATE                STATUS_LED_ON
297 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
298 #define STATUS_LED_BOOT                 GREEN_LED_DEV
299
300 #define CONFIG_SPLASHIMAGE_GUARD
301
302 /* GPIO banks */
303 #ifdef CONFIG_STATUS_LED
304 #define CONFIG_OMAP3_GPIO_6     /* GPIO186 is in GPIO bank 6  */
305 #endif
306
307 /* Display Configuration */
308 #define CONFIG_OMAP3_GPIO_2
309 #define CONFIG_OMAP3_GPIO_5
310 #define CONFIG_VIDEO_OMAP3
311 #define LCD_BPP         LCD_COLOR16
312
313 #define CONFIG_LCD
314 #define CONFIG_SPLASH_SCREEN
315 #define CONFIG_CMD_BMP
316 #define CONFIG_BMP_16BPP
317 #define CONFIG_SCF0403_LCD
318
319 #define CONFIG_OMAP3_SPI
320
321 /* Defines for SPL */
322 #define CONFIG_SPL
323 #define CONFIG_SPL_FRAMEWORK
324 #define CONFIG_SPL_NAND_SIMPLE
325
326 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
327 #define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
328 #define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
329 #define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
330
331 #define CONFIG_SPL_BOARD_INIT
332 #define CONFIG_SPL_LIBCOMMON_SUPPORT
333 #define CONFIG_SPL_LIBDISK_SUPPORT
334 #define CONFIG_SPL_I2C_SUPPORT
335 #define CONFIG_SPL_LIBGENERIC_SUPPORT
336 #define CONFIG_SPL_MMC_SUPPORT
337 #define CONFIG_SPL_FAT_SUPPORT
338 #define CONFIG_SPL_SERIAL_SUPPORT
339 #define CONFIG_SPL_NAND_SUPPORT
340 #define CONFIG_SPL_NAND_BASE
341 #define CONFIG_SPL_NAND_DRIVERS
342 #define CONFIG_SPL_NAND_ECC
343 #define CONFIG_SPL_GPIO_SUPPORT
344 #define CONFIG_SPL_POWER_SUPPORT
345 #define CONFIG_SPL_OMAP3_ID_NAND
346 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
347
348 /* NAND boot config */
349 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
350 #define CONFIG_SYS_NAND_PAGE_COUNT      64
351 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
352 #define CONFIG_SYS_NAND_OOBSIZE         64
353 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128 * 1024)
354 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
355 /*
356  * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
357  * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
358  */
359 #define CONFIG_SYS_NAND_ECCPOS          { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
360                                          10, 11, 12 }
361 #define CONFIG_SYS_NAND_ECCSIZE         512
362 #define CONFIG_SYS_NAND_ECCBYTES        3
363 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_HAM1_CODE_HW
364
365 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
366 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
367
368 #define CONFIG_SPL_TEXT_BASE            0x40200800
369 #define CONFIG_SPL_MAX_SIZE             (54 * 1024)     /* 8 KB for stack */
370 #define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
371
372 /*
373  * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
374  * older x-loader implementations. And move the BSS area so that it
375  * doesn't overlap with TEXT_BASE.
376  */
377 #define CONFIG_SYS_TEXT_BASE            0x80008000
378 #define CONFIG_SPL_BSS_START_ADDR       0x80100000
379 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
380
381 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
382 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000
383
384 #endif /* __CONFIG_H */