2 * U-boot - Configuration file for CM-BF537E board
5 #ifndef __CONFIG_CM_BF537E_H__
6 #define __CONFIG_CM_BF537E_H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
19 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
20 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
22 /* CONFIG_CLKIN_HZ is any value in Hz */
23 #define CONFIG_CLKIN_HZ 25000000
24 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
26 #define CONFIG_CLKIN_HALF 0
27 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
29 #define CONFIG_PLL_BYPASS 0
30 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
31 /* Values can range from 0-63 (where 0 means 64) */
32 #define CONFIG_VCO_MULT 21
33 /* CCLK_DIV controls the core clock divider */
34 /* Values can be 1, 2, 4, or 8 ONLY */
35 #define CONFIG_CCLK_DIV 1
36 /* SCLK_DIV controls the system clock divider */
37 /* Values can range from 1-15 */
38 #define CONFIG_SCLK_DIV 4
40 /* Decrease core voltage */
41 #define CONFIG_VR_CTL_VAL (VLEV_115 | CLKBUFOE | GAIN_20 | FREQ_1000)
47 #define CONFIG_MEM_ADD_WDTH 9
48 #define CONFIG_MEM_SIZE 32
50 #define CONFIG_EBIU_SDRRC_VAL 0x3f8
51 #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
53 #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
54 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
55 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
57 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
58 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
65 #define ADI_CMDS_NETWORK 1
66 #define CONFIG_BFIN_MAC
67 #define CONFIG_NETCONSOLE 1
68 #define CONFIG_NET_MULTI 1
70 #define CONFIG_HOSTNAME cm-bf537e
71 /* Uncomment next line to use fixed MAC address */
72 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
78 #define CONFIG_FLASH_CFI_DRIVER
79 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
80 #define CONFIG_SYS_FLASH_BASE 0x20000000
81 #define CONFIG_SYS_FLASH_CFI
82 #define CONFIG_SYS_FLASH_PROTECTION
83 #define CONFIG_SYS_MAX_FLASH_BANKS 1
84 #define CONFIG_SYS_MAX_FLASH_SECT 35
88 * Env Storage Settings
90 #define CONFIG_ENV_IS_IN_FLASH 1
91 #define CONFIG_ENV_OFFSET 0x4000
92 #define CONFIG_ENV_SIZE 0x2000
93 #define CONFIG_ENV_SECT_SIZE 0x20000
94 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
95 #define ENV_IS_EMBEDDED
97 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
99 #ifdef ENV_IS_EMBEDDED
100 /* WARNING - the following is hand-optimized to fit within
101 * the sector before the environment sector. If it throws
102 * an error during compilation remove an object here to get
103 * it linked after the configuration sector.
105 # define LDS_BOARD_TEXT \
106 arch/blackfin/lib/libblackfin.o (.text*); \
107 arch/blackfin/cpu/libblackfin.o (.text*); \
108 . = DEFINED(env_offset) ? env_offset : .; \
109 common/env_embedded.o (.text*);
116 #define CONFIG_BFIN_TWI_I2C 1
117 #define CONFIG_HARD_I2C 1
123 #define CONFIG_BAUDRATE 115200
124 #define CONFIG_MISC_INIT_R
125 #define CONFIG_RTC_BFIN
126 #define CONFIG_UART_CONSOLE 0
127 #define CONFIG_BOOTCOMMAND "run flashboot"
128 #define FLASHBOOT_ENV_SETTINGS \
129 "flashboot=flread 20040000 1000000 300000;" \
134 * Pull in common ADI header for remaining command/environment setup
136 #include <configs/bfin_adi_common.h>