3 * Congatec Conga-QEVAl board configuration file.
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
6 * Based on Freescale i.MX6Q Sabre Lite board configuration file.
7 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
8 * Leo Sartre, <lsartre@adeneo-embedded.com>
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __CONFIG_CGTQMX6EVAL_H
14 #define __CONFIG_CGTQMX6EVAL_H
16 #include "mx6_common.h"
18 #define CONFIG_MACH_TYPE 4122
20 /* Size of malloc() pool */
21 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
23 #define CONFIG_BOARD_EARLY_INIT_F
24 #define CONFIG_MISC_INIT_R
26 #define CONFIG_MXC_UART
27 #define CONFIG_MXC_UART_BASE UART2_BASE
30 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
32 /* Miscellaneous commands */
33 #define CONFIG_CMD_BMODE
36 #define CONFIG_IMX_THERMAL
39 #define CONFIG_CMD_I2C
40 #define CONFIG_SYS_I2C
41 #define CONFIG_SYS_I2C_MXC
42 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
43 #define CONFIG_SYS_I2C_SPEED 100000
47 #define CONFIG_POWER_I2C
48 #define CONFIG_POWER_PFUZE100
49 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08
52 #define CONFIG_CMD_USB
53 #define CONFIG_CMD_FAT
54 #define CONFIG_USB_EHCI
55 #define CONFIG_USB_EHCI_MX6
56 #define CONFIG_USB_STORAGE
57 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
58 #define CONFIG_USB_HOST_ETHER
59 #define CONFIG_USB_ETHER_ASIX
60 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
61 #define CONFIG_MXC_USB_FLAGS 0
62 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 /* Enabled USB controller number */
63 #define CONFIG_USB_KEYBOARD
64 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
67 #define CONFIG_USBD_HS
68 #define CONFIG_USB_GADGET_DUALSPEED
70 #define CONFIG_USB_GADGET
71 #define CONFIG_CMD_USB_MASS_STORAGE
72 #define CONFIG_USB_FUNCTION_MASS_STORAGE
73 #define CONFIG_USB_GADGET_DOWNLOAD
74 #define CONFIG_USB_GADGET_VBUS_DRAW 2
76 #define CONFIG_G_DNL_VENDOR_NUM 0x0525
77 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5
78 #define CONFIG_G_DNL_MANUFACTURER "Congatec"
82 #define CONFIG_VIDEO_IPUV3
83 #define CONFIG_CFB_CONSOLE
84 #define CONFIG_VGA_AS_SINGLE_DEVICE
85 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
86 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
87 #define CONFIG_VIDEO_BMP_RLE8
88 #define CONFIG_SPLASH_SCREEN
89 #define CONFIG_SPLASH_SCREEN_ALIGN
90 #define CONFIG_BMP_16BPP
91 #define CONFIG_VIDEO_LOGO
92 #define CONFIG_VIDEO_BMP_LOGO
94 #define CONFIG_IPUV3_CLK 198000000
96 #define CONFIG_IPUV3_CLK 264000000
98 #define CONFIG_IMX_HDMI
101 #define CONFIG_CMD_SATA
102 #define CONFIG_DWC_AHSATA
103 #define CONFIG_SYS_SATA_MAX_DEVICE 1
104 #define CONFIG_DWC_AHSATA_PORT_ID 0
105 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
107 #define CONFIG_LIBATA
110 #define CONFIG_CMD_PING
111 #define CONFIG_CMD_DHCP
112 #define CONFIG_CMD_MII
113 #define CONFIG_FEC_MXC
115 #define IMX_FEC_BASE ENET_BASE_ADDR
116 #define CONFIG_FEC_XCV_TYPE RGMII
117 #define CONFIG_ETHPRIME "FEC"
118 #define CONFIG_FEC_MXC_PHYADDR 6
119 #define CONFIG_PHYLIB
120 #define CONFIG_PHY_ATHEROS
122 /* Command definition */
124 #define CONFIG_MXC_UART_BASE UART2_BASE
125 #define CONFIG_CONSOLE_DEV "ttymxc1"
126 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
127 #define CONFIG_SYS_MMC_ENV_DEV 0
129 #define CONFIG_EXTRA_ENV_SETTINGS \
130 "script=boot.scr\0" \
132 "fdtfile=imx6q-qmx6.dtb\0" \
133 "fdt_addr_r=0x18000000\0" \
136 "console=" CONFIG_CONSOLE_DEV "\0" \
137 "bootm_size=0x10000000\0" \
138 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
140 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
141 "update_sd_firmware=" \
142 "if test ${ip_dyn} = yes; then " \
143 "setenv get_cmd dhcp; " \
145 "setenv get_cmd tftp; " \
147 "if mmc dev ${mmcdev}; then " \
148 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
149 "setexpr fw_sz ${filesize} / 0x200; " \
150 "setexpr fw_sz ${fw_sz} + 1; " \
151 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
154 "mmcargs=setenv bootargs console=${console},${baudrate} " \
155 "root=${mmcroot}\0" \
157 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
158 "bootscript=echo Running bootscript from mmc ...; " \
160 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
161 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\0" \
162 "mmcboot=echo Booting from mmc ...; " \
164 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
165 "if run loadfdt; then " \
166 "bootz ${loadaddr} - ${fdt_addr_r}; " \
168 "if test ${boot_fdt} = try; then " \
171 "echo WARN: Cannot load the DT; " \
177 "netargs=setenv bootargs console=${console},${baudrate} " \
179 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
180 "netboot=echo Booting from net ...; " \
182 "if test ${ip_dyn} = yes; then " \
183 "setenv get_cmd dhcp; " \
185 "setenv get_cmd tftp; " \
187 "${get_cmd} ${image}; " \
188 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
189 "if ${get_cmd} ${fdt_addr_r} ${fdtfile}; then " \
190 "bootz ${loadaddr} - ${fdt_addr_r}; " \
192 "if test ${boot_fdt} = try; then " \
195 "echo WARN: Cannot load the DT; " \
202 #define CONFIG_BOOTCOMMAND \
203 "mmc dev ${mmcdev};" \
204 "if mmc rescan; then " \
205 "if run loadbootscript; then " \
208 "if run loadimage; then " \
210 "else run netboot; " \
213 "else run netboot; fi"
215 #define CONFIG_SYS_MEMTEST_START 0x10000000
216 #define CONFIG_SYS_MEMTEST_END 0x10010000
217 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
219 /* Physical Memory Map */
220 #define CONFIG_NR_DRAM_BANKS 1
221 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
222 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
224 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
225 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
226 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
228 #define CONFIG_SYS_INIT_SP_OFFSET \
229 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
230 #define CONFIG_SYS_INIT_SP_ADDR \
231 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
233 /* Environment organization */
234 #define CONFIG_ENV_SIZE (8 * 1024)
236 #define CONFIG_ENV_IS_IN_MMC
238 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
239 #define CONFIG_SYS_MMC_ENV_DEV 0
241 #endif /* __CONFIG_CGTQMX6EVAL_H */