ARMV7: AM3517/05: Add support for CraneBoard.
[oweals/u-boot.git] / include / configs / bluestone.h
1 /*
2  * bluestone.h - configuration for Bluestone (APM821XX)
3  *
4  * Copyright (c) 2010, Applied Micro Circuits Corporation
5  * Author: Tirumala R Marri <tmarri@apm.com>
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22
23 #ifndef __CONFIG_H
24 #define __CONFIG_H
25
26 /*
27  * High Level Configuration Options
28  */
29 #define CONFIG_APM821XX         1       /* APM821XX series    */
30 #define CONFIG_HOSTNAME         bluestone
31
32 #define CONFIG_4xx              1       /* ... PPC4xx family */
33 #define CONFIG_440              1
34
35 #ifndef CONFIG_SYS_TEXT_BASE
36 #define CONFIG_SYS_TEXT_BASE    0xFFFA0000
37 #endif
38
39 /*
40  * Include common defines/options for all AMCC eval boards
41  */
42 #include "amcc-common.h"
43 #define CONFIG_SYS_CLK_FREQ     50000000
44
45 #define CONFIG_BOARD_TYPES              1       /* support board types */
46 #define CONFIG_BOARD_EARLY_INIT_F       1       /* Call board_early_init_f */
47 #define CONFIG_MISC_INIT_R              1       /* Call misc_init_r */
48
49 /*
50  * Base addresses -- Note these are effective addresses where the
51  * actual resources get mapped (not physical addresses)
52  */
53 /* EBC stuff */
54 /* later mapped to this addr */
55 #define CONFIG_SYS_FLASH_BASE           0xFFF00000
56 #define CONFIG_SYS_FLASH_SIZE           (4 << 20)       /* 1MB usable */
57
58 /* EBC Boot Space: 0xFF000000 */
59 #define CONFIG_SYS_BOOT_BASE_ADDR       0xFF000000
60 #define CONFIG_SYS_OCM_BASE             0xE3000000 /* OCM: 32k             */
61 #define CONFIG_SYS_SRAM_BASE            0xE8000000 /* SRAM: 256k           */
62 #define CONFIG_SYS_AHB_BASE             0xE2000000 /* internal AHB peripherals*/
63
64 #define CONFIG_SYS_SRAM_SIZE            (256 << 10)
65 /*
66  * Initial RAM & stack pointer (placed in OCM)
67  */
68 #define CONFIG_SYS_INIT_RAM_ADDR        CONFIG_SYS_OCM_BASE     /* OCM    */
69 #define CONFIG_SYS_INIT_RAM_SIZE                (4 << 10)
70 #define CONFIG_SYS_GBL_DATA_OFFSET      \
71         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
72 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
73
74 /*
75  * Environment
76  */
77 /*
78  * Define here the location of the environment variables (FLASH).
79  */
80 #define CONFIG_ENV_IS_IN_FLASH  1       /* use FLASH for environment vars */
81
82 /*
83  * FLASH related
84  */
85 #define CONFIG_SYS_FLASH_CFI    /* The flash is CFI compatible  */
86 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver        */
87 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
88 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE}
89 /* max number of memory banks           */
90 #define CONFIG_SYS_MAX_FLASH_BANKS      1
91 /* max number of sectors on one chip    */
92 #define CONFIG_SYS_MAX_FLASH_SECT       80
93 /* Timeout for Flash Erase (in ms)      */
94 #define CONFIG_SYS_FLASH_ERASE_TOUT     120000
95 /* Timeout for Flash Write (in ms)      */
96 #define CONFIG_SYS_FLASH_WRITE_TOUT     500
97 /* use buffered writes (20x faster)     */
98 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
99 /* print 'E' for empty sector on flinfo */
100 #define CONFIG_SYS_FLASH_EMPTY_INFO
101 #ifdef CONFIG_ENV_IS_IN_FLASH
102 #define CONFIG_ENV_SECT_SIZE    0x10000 /* size of one complete sector  */
103 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE)
104 #define CONFIG_ENV_SIZE         0x4000  /* Total Size of Environment Sector   */
105 /* Address and size of Redundant Environment Sector     */
106 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
107 #define CONFIG_ENV_SIZE_REDUND  (CONFIG_ENV_SIZE)
108 #endif /* CONFIG_ENV_IS_IN_FLASH */
109
110 /* SDRAM */
111 #define CONFIG_SPD_EEPROM       1       /* Use SPD EEPROM for setup     */
112 #define SPD_EEPROM_ADDRESS      {0x53, 0x51}    /* SPD i2c spd addresses */
113 #define CONFIG_PPC4xx_DDR_AUTOCALIBRATION       /* IBM DDR autocalibration */
114 #define CONFIG_AUTOCALIB        "silent\0"      /* default is non-verbose    */
115 #define CONFIG_DDR_ECC          1       /* with ECC support             */
116
117 /*
118  * Serial Port
119  */
120 #define CONFIG_CONS_INDEX       1       /* Use UART0                    */
121
122 /*
123  * I2C
124  */
125 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed            */
126 #define CONFIG_SYS_I2C_MULTI_EEPROMS
127 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
128 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          1
129 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       3
130 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   5       /* Data sheet */
131
132 /* I2C bootstrap EEPROM */
133 #define CONFIG_4xx_CONFIG_I2C_EEPROM_ADDR       0x52
134 #define CONFIG_4xx_CONFIG_I2C_EEPROM_OFFSET     0
135 #define CONFIG_4xx_CONFIG_BLOCKSIZE             16
136
137 /*
138  * Ethernet
139  */
140 #define CONFIG_IBM_EMAC4_V4     1
141 #define CONFIG_EMAC_PHY_MODE    EMAC_PHY_MODE_NONE_RGMII
142 #define CONFIG_HAS_ETH0
143 /* PHY address, See schematics  */
144 #define CONFIG_PHY_ADDR                 0x1f
145 /* reset phy upon startup       */
146 #define CONFIG_PHY_RESET                1
147 /* Include GbE speed/duplex detection */
148 #define CONFIG_PHY_GIGE                 1
149 #define CONFIG_PHY_DYNAMIC_ANEG         1
150
151 /*
152  * External Bus Controller (EBC) Setup
153  **/
154 #define CONFIG_SYS_EBC_CFG      (EBC_CFG_LE_LOCK    |   \
155                                  EBC_CFG_PTD_ENABLE   | \
156                                  EBC_CFG_RTC_2048PERCLK | \
157                                  EBC_CFG_ATC_HI | \
158                                  EBC_CFG_DTC_HI | \
159                                  EBC_CFG_CTC_HI | \
160                                  EBC_CFG_OEO_PREVIOUS)
161 /* NOR Flash */
162 #define CONFIG_SYS_EBC_PB0AP    (EBC_BXAP_BME_DISABLED   | \
163                                 EBC_BXAP_TWT_ENCODE(64)  | \
164                                 EBC_BXAP_BCE_DISABLE    | \
165                                 EBC_BXAP_BCT_2TRANS     | \
166                                 EBC_BXAP_CSN_ENCODE(1)  | \
167                                 EBC_BXAP_OEN_ENCODE(2)  | \
168                                 EBC_BXAP_WBN_ENCODE(2)  | \
169                                 EBC_BXAP_WBF_ENCODE(2)  | \
170                                 EBC_BXAP_TH_ENCODE(7)   | \
171                                 EBC_BXAP_SOR_DELAYED    | \
172                                 EBC_BXAP_BEM_WRITEONLY  | \
173                                 EBC_BXAP_PEN_DISABLED)
174 /* Peripheral Bank Configuration Register - EBC_BxCR */
175 #define CONFIG_SYS_EBC_PB0CR    \
176                         (EBC_BXCR_BAS_ENCODE(CONFIG_SYS_FLASH_BASE) | \
177                         EBC_BXCR_BS_1MB                | \
178                         EBC_BXCR_BU_RW                  | \
179                         EBC_BXCR_BW_8BIT)
180
181
182 #endif /* __CONFIG_H */