2 * U-boot - Configuration file for BF536 brettl2 board
5 #ifndef __CONFIG_BCT_BRETTL2_H__
6 #define __CONFIG_BCT_BRETTL2_H__
8 #include <asm/config-pre.h>
14 #define CONFIG_BFIN_CPU bf536-0.3
15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS
20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV
21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV
23 /* CONFIG_CLKIN_HZ is any value in Hz */
24 #define CONFIG_CLKIN_HZ 16384000
25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */
27 #define CONFIG_CLKIN_HALF 0
28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */
30 #define CONFIG_PLL_BYPASS 0
31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */
32 /* Values can range from 0-63 (where 0 means 64) */
33 #define CONFIG_VCO_MULT 24
34 /* CCLK_DIV controls the core clock divider */
35 /* Values can be 1, 2, 4, or 8 ONLY */
36 #define CONFIG_CCLK_DIV 1
37 /* SCLK_DIV controls the system clock divider */
38 /* Values can range from 1-15 */
39 #define CONFIG_SCLK_DIV 3
40 #define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000)
46 #define CONFIG_MEM_ADD_WDTH 9
47 #define CONFIG_MEM_SIZE 32
53 #define CONFIG_EBIU_SDRRC_VAL 0x07f6
54 #define CONFIG_EBIU_SDGCTL_VAL 0x9111cd
56 #define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL)
57 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3)
58 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3)
60 #define CONFIG_SYS_MONITOR_LEN (256 * 1024)
61 #define CONFIG_SYS_MALLOC_LEN (128 * 1024)
68 #define ADI_CMDS_NETWORK 1
69 #define CONFIG_BFIN_MAC 1
70 #define CONFIG_NETCONSOLE 1
71 #define CONFIG_NET_MULTI 1
72 #define CONFIG_HOSTNAME brettl2
73 #define CONFIG_IPADDR 192.168.233.224
74 #define CONFIG_GATEWAYIP 192.168.233.1
75 #define CONFIG_SERVERIP 192.168.233.53
76 #define CONFIG_ROOTPATH /romfs/brettl2
77 /* Uncomment next line to use fixed MAC address */
78 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */
85 #define CONFIG_FLASH_CFI_DRIVER
86 #define CONFIG_SYS_FLASH_CFI
87 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
88 #define CONFIG_SYS_FLASH_PROTECTION
89 #define CONFIG_SYS_FLASH_BASE 0x20000000
90 #define CONFIG_SYS_MAX_FLASH_BANKS 1
91 #define CONFIG_SYS_MAX_FLASH_SECT 135
95 * Env Storage Settings
97 #define CONFIG_ENV_IS_IN_FLASH 1
98 #define CONFIG_ENV_OFFSET 0x4000
99 #define CONFIG_ENV_SIZE 0x2000
100 #define CONFIG_ENV_SECT_SIZE 0x10000
102 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS)
103 #define ENV_IS_EMBEDDED
105 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR
108 #ifdef ENV_IS_EMBEDDED
109 /* WARNING - the following is hand-optimized to fit within
110 * the sector before the environment sector. If it throws
111 * an error during compilation remove an object here to get
112 * it linked after the configuration sector.
114 # define LDS_BOARD_TEXT \
115 arch/blackfin/lib/libblackfin.o (.text*); \
116 arch/blackfin/cpu/libblackfin.o (.text*); \
117 . = DEFINED(env_offset) ? env_offset : .; \
118 common/env_embedded.o (.text*);
125 #define CONFIG_BFIN_TWI_I2C 1
126 #define CONFIG_HARD_I2C 1
132 #define CONFIG_BOOTDELAY 1
133 #define CONFIG_LOADADDR 0x800000
134 #define CONFIG_MISC_INIT_R
135 #define CONFIG_UART_CONSOLE 0
136 #define CONFIG_BAUDRATE 115200
137 #define CONFIG_MTD_DEVICE
138 #define CONFIG_MTD_PARTITIONS
139 #define CONFIG_SYS_HUSH_PARSER
140 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
144 * Pull in common ADI header for remaining command/environment setup
146 #include <configs/bfin_adi_common.h>
148 /* disable unnecessary features */
149 #undef CONFIG_BOOTM_RTEMS
151 #undef CONFIG_KALLSYMS