2 * Copyright (C) 2006 Atmel Corporation
4 * Copyright (C) 2012 Andreas Bießmann <andreas.devel@googlemail.com>
6 * Configuration settings for the AVR32 Network Gateway
8 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/hardware.h>
16 #define CONFIG_AT32AP7000
17 #define CONFIG_ATNGW100MKII
19 #define CONFIG_BOARD_EARLY_INIT_F
20 #define CONFIG_BOARD_EARLY_INIT_R
23 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
24 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
25 * and the PBA bus to run at 1/4 the PLL frequency.
28 #define CONFIG_SYS_POWER_MANAGER
29 #define CONFIG_SYS_OSC0_HZ 20000000
30 #define CONFIG_SYS_PLL0_DIV 1
31 #define CONFIG_SYS_PLL0_MUL 7
32 #define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
34 * Set the CPU running at:
35 * PLL / (2^CONFIG_SYS_CLKDIV_CPU) = CPU MHz
37 #define CONFIG_SYS_CLKDIV_CPU 0
39 * Set the HSB running at:
40 * PLL / (2^CONFIG_SYS_CLKDIV_HSB) = HSB MHz
42 #define CONFIG_SYS_CLKDIV_HSB 1
44 * Set the PBA running at:
45 * PLL / (2^CONFIG_SYS_CLKDIV_PBA) = PBA MHz
47 #define CONFIG_SYS_CLKDIV_PBA 2
49 * Set the PBB running at:
50 * PLL / (2^CONFIG_SYS_CLKDIV_PBB) = PBB MHz
52 #define CONFIG_SYS_CLKDIV_PBB 1
54 /* Reserve VM regions for NOR flash, NAND flash and SDRAM */
55 #define CONFIG_SYS_NR_VM_REGIONS 3
58 * The PLLOPT register controls the PLL like this:
62 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
64 #define CONFIG_SYS_PLL0_OPT 0x04
66 #define CONFIG_USART_BASE ATMEL_BASE_USART1
67 #define CONFIG_USART_ID 1
69 /* User serviceable stuff */
70 #define CONFIG_DOS_PARTITION
72 #define CONFIG_CMDLINE_TAG
73 #define CONFIG_SETUP_MEMORY_TAGS
74 #define CONFIG_INITRD_TAG
76 #define CONFIG_STACKSIZE (2048)
78 #define CONFIG_BAUDRATE 115200
79 #define CONFIG_BOOTARGS \
80 "root=mtd:main rootfstype=jffs2"
81 #define CONFIG_BOOTCOMMAND \
82 "fsload 0x10400000 /uImage; bootm"
84 #define CONFIG_BOOTDELAY 1
87 * After booting the board for the first time, new ethernet addresses
88 * should be generated and assigned to the environment variables
89 * "ethaddr" and "eth1addr". This is normally done during production.
91 #define CONFIG_OVERWRITE_ETHADDR_ONCE
96 #define CONFIG_BOOTP_SUBNETMASK
97 #define CONFIG_BOOTP_GATEWAY
100 * Command line configuration.
102 #define CONFIG_CMD_ASKENV
103 #define CONFIG_CMD_DHCP
104 #define CONFIG_CMD_EXT2
105 #define CONFIG_CMD_FAT
106 #define CONFIG_CMD_JFFS2
107 #define CONFIG_CMD_MMC
108 #define CONFIG_CMD_SF
109 #define CONFIG_CMD_SPI
110 #define CONFIG_CMD_MII
113 #define CONFIG_ATMEL_USART
115 #define CONFIG_PORTMUX_PIO
116 #define CONFIG_SYS_NR_PIOS 5
117 #define CONFIG_SYS_HSDRAMC
119 #define CONFIG_GENERIC_ATMEL_MCI
120 #define CONFIG_GENERIC_MMC
121 #define CONFIG_ATMEL_SPI
123 #define CONFIG_SPI_FLASH_ATMEL
125 #define CONFIG_SYS_DCACHE_LINESZ 32
126 #define CONFIG_SYS_ICACHE_LINESZ 32
128 #define CONFIG_NR_DRAM_BANKS 1
130 #define CONFIG_SYS_FLASH_CFI
131 #define CONFIG_FLASH_CFI_DRIVER
132 #define CONFIG_SYS_FLASH_PROTECTION
134 #define CONFIG_SYS_FLASH_BASE 0x00000000
135 #define CONFIG_SYS_FLASH_SIZE 0x800000
136 #define CONFIG_SYS_MAX_FLASH_BANKS 1
137 #define CONFIG_SYS_MAX_FLASH_SECT 135
139 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
140 #define CONFIG_SYS_TEXT_BASE 0x00000000
142 #define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
143 #define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
144 #define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
146 #define CONFIG_ENV_IS_IN_FLASH
147 #define CONFIG_ENV_SIZE 65536
148 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
150 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
152 #define CONFIG_SYS_MALLOC_LEN (256*1024)
154 /* Allow 4MB for the kernel run-time image */
155 #define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
156 #define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
158 /* Other configuration settings that shouldn't have to change all that often */
159 #define CONFIG_SYS_PROMPT "U-Boot> "
160 #define CONFIG_SYS_CBSIZE 256
161 #define CONFIG_SYS_MAXARGS 16
162 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
163 #define CONFIG_SYS_LONGHELP
165 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
166 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
168 #define CONFIG_MTD_DEVICE
169 #define CONFIG_MTD_PARTITIONS
171 #endif /* __CONFIG_H */