2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian.pop@leadtechdesign.com>
4 * Lead Tech Design <www.leadtechdesign.com>
6 * Configuation settings for the AT91SAM9M10G45EK board(and AT91SAM9G45EKES).
8 * See file CREDITS for list of people who contributed to this
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of
14 * the License, or (at your option) any later version.
16 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 #define CONFIG_AT91_LEGACY
32 /* ARM asynchronous clock */
33 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
34 #define CONFIG_SYS_HZ 1000
36 #define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
37 #ifdef CONFIG_AT91SAM9M10G45EK
38 #define CONFIG_AT91SAM9M10G45 1 /* It's an Atmel AT91SAM9M10G45 SoC*/
40 #define CONFIG_AT91SAM9G45 1 /* It's an Atmel AT91SAM9G45 SoC*/
42 #define CONFIG_ARCH_CPU_INIT
43 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
45 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
46 #define CONFIG_SETUP_MEMORY_TAGS 1
47 #define CONFIG_INITRD_TAG 1
49 #define CONFIG_SKIP_LOWLEVEL_INIT
54 #define CONFIG_AT91_GPIO 1
55 #define CONFIG_ATMEL_USART 1
59 #define CONFIG_USART3 1 /* USART 3 is DBGU */
63 #define LCD_BPP LCD_COLOR8
64 #define CONFIG_LCD_LOGO 1
65 #undef LCD_TEST_PATTERN
66 #define CONFIG_LCD_INFO 1
67 #define CONFIG_LCD_INFO_BELOW_LOGO 1
68 #define CONFIG_SYS_WHITE_ON_BLACK 1
69 #define CONFIG_ATMEL_LCD 1
70 #define CONFIG_ATMEL_LCD_RGB565 1
71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
72 /* board specific(not enough SRAM) */
73 #define CONFIG_AT91SAM9G45_LCD_BASE 0x73E00000
76 #define CONFIG_AT91_LED
77 #define CONFIG_RED_LED AT91_PIN_PD31 /* this is the user1 led */
78 #define CONFIG_GREEN_LED AT91_PIN_PD0 /* this is the user2 led */
80 #define CONFIG_BOOTDELAY 3
85 #define CONFIG_BOOTP_BOOTFILESIZE 1
86 #define CONFIG_BOOTP_BOOTPATH 1
87 #define CONFIG_BOOTP_GATEWAY 1
88 #define CONFIG_BOOTP_HOSTNAME 1
91 * Command line configuration.
93 #include <config_cmd_default.h>
95 #undef CONFIG_CMD_FPGA
97 #undef CONFIG_CMD_IMLS
98 #undef CONFIG_CMD_AUTOSCRIPT
99 #undef CONFIG_CMD_LOADS
101 #define CONFIG_CMD_PING 1
102 #define CONFIG_CMD_DHCP 1
103 #define CONFIG_CMD_NAND 1
104 #define CONFIG_CMD_USB 1
107 #define CONFIG_NR_DRAM_BANKS 1
108 #define PHYS_SDRAM 0x70000000
109 #define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
112 #ifdef CONFIG_ATMEL_SPI
113 #define CONFIG_CMD_SF
114 #define CONFIG_CMD_SPI
115 #define CONFIG_SPI_FLASH 1
116 #define CONFIG_SPI_FLASH_ATMEL 1
117 #define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
120 /* NOR flash, if populated */
121 #ifndef CONFIG_CMD_NAND
122 #define CONFIG_SYS_NO_FLASH 1
124 #define CONFIG_SYS_FLASH_CFI 1
125 #define CONFIG_FLASH_CFI_DRIVER 1
126 #define PHYS_FLASH_1 0x10000000
127 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
128 #define CONFIG_SYS_MAX_FLASH_SECT 256
129 #define CONFIG_SYS_MAX_FLASH_BANKS 1
133 #ifdef CONFIG_CMD_NAND
134 #define CONFIG_NAND_MAX_CHIPS 1
135 #define CONFIG_NAND_ATMEL
136 #define CONFIG_SYS_MAX_NAND_DEVICE 1
137 #define CONFIG_SYS_NAND_BASE 0x40000000
138 #define CONFIG_SYS_NAND_DBW_8 1
139 /* our ALE is AD21 */
140 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
141 /* our CLE is AD22 */
142 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
143 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
144 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
149 #define CONFIG_MACB 1
150 #define CONFIG_RMII 1
151 #define CONFIG_NET_MULTI 1
152 #define CONFIG_NET_RETRY_COUNT 20
153 #define CONFIG_RESET_PHY_R 1
156 #define CONFIG_USB_ATMEL
157 #define CONFIG_USB_OHCI_NEW 1
158 #define CONFIG_DOS_PARTITION 1
159 #define CONFIG_SYS_USB_OHCI_CPU_INIT 1
160 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00700000 /* AT91SAM9G45_UHP_OHCI_BASE */
161 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9g45"
162 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
163 #define CONFIG_USB_STORAGE 1
165 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
167 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
168 #define CONFIG_SYS_MEMTEST_END 0x23e00000
170 #ifdef CONFIG_SYS_USE_DATAFLASH
172 /* bootstrap + u-boot + env + linux in dataflash on CS0 */
173 #define CONFIG_ENV_IS_IN_SPI_FLASH 1
174 #define CONFIG_SYS_MONITOR_BASE (0xC0000000 + 0x8400)
175 #define CONFIG_ENV_OFFSET 0x4200
176 #define CONFIG_ENV_ADDR (0xC0000000 + CONFIG_ENV_OFFSET)
177 #define CONFIG_ENV_SIZE 0x4200
178 #define CONFIG_ENV_SECT_SIZE 0x10000
179 #define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
180 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
181 "root=/dev/mtdblock0 " \
182 "mtdparts=atmel_nand:-(root) "\
183 "rw rootfstype=jffs2"
185 #else /* CONFIG_SYS_USE_NANDFLASH */
187 /* bootstrap + u-boot + env + linux in nandflash */
188 #define CONFIG_ENV_IS_IN_NAND 1
189 #define CONFIG_ENV_OFFSET 0x60000
190 #define CONFIG_ENV_OFFSET_REDUND 0x80000
191 #define CONFIG_ENV_SIZE 0x20000 /* 1 sector = 128 kB */
192 #define CONFIG_BOOTCOMMAND "nand read 0x72000000 0x200000 0x200000; bootm"
193 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
194 "root=/dev/mtdblock5 " \
195 "mtdparts=atmel_nand:128k(bootstrap)ro, \
196 256k(uboot)ro,128k(env1)ro,128k(env2)ro, \
197 2M(linux),-(root) " \
198 "rw rootfstype=jffs2"
202 #define CONFIG_BAUDRATE 115200
203 #define CONFIG_SYS_BAUDRATE_TABLE {115200 , 19200, 38400, 57600, 9600 }
205 #define CONFIG_SYS_PROMPT "U-Boot> "
206 #define CONFIG_SYS_CBSIZE 256
207 #define CONFIG_SYS_MAXARGS 16
208 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
209 #define CONFIG_SYS_LONGHELP 1
210 #define CONFIG_CMDLINE_EDITING 1
211 #define CONFIG_AUTO_COMPLETE
212 #define CONFIG_SYS_HUSH_PARSER
213 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
216 * Size of malloc() pool
218 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000)
220 #define CONFIG_STACKSIZE (32*1024) /* regular stack */
222 #ifdef CONFIG_USE_IRQ
223 #error CONFIG_USE_IRQ not supported