include/configs/aristainetos-common.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * (C) Copyright 2015
   4  * (C) Copyright 2014
   5  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   6  *
   7  * Based on:
   8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
   9  *
  10  * Configuration settings for the Freescale i.MX6Q SabreSD board.
  11  */
  12 #ifndef __ARISTAINETOS_COMMON_CONFIG_H
  13 #define __ARISTAINETOS_COMMON_CONFIG_H
  14
  15 #include "mx6_common.h"
  16
  17 #define CONFIG_MACH_TYPE        4501
  18 #define CONFIG_MMCROOT          "/dev/mmcblk0p1"
  19
  20 /* Size of malloc() pool */
  21 #define CONFIG_SYS_MALLOC_LEN           (64 * SZ_1M)
  22
  23 #define CONFIG_MXC_UART
  24
  25 /* MMC Configs */
  26 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
  27
  28 #define CONFIG_FEC_MXC
  29 #define IMX_FEC_BASE                    ENET_BASE_ADDR
  30 #define CONFIG_ETHPRIME                 "FEC"
  31 #define CONFIG_FEC_MXC_PHYADDR          0
  32
  33 #define CONFIG_SPI_FLASH_MTD
  34 #define CONFIG_SF_DEFAULT_SPEED         20000000
  35 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
  36 #define CONFIG_SYS_SPI_ST_ENABLE_WP_PIN
  37
  38 #define CONFIG_EXTRA_ENV_SETTINGS \
  39         "script=u-boot.scr\0" \
  40         "fit_file=/boot/system.itb\0" \
  41         "loadaddr=0x12000000\0" \
  42         "fit_addr_r=0x14000000\0" \
  43         "uboot=/boot/u-boot.imx\0" \
  44         "uboot_sz=d0000\0" \
  45         "rescue_sys_addr=f0000\0" \
  46         "rescue_sys_length=f10000\0" \
  47         "panel=lb07wv8\0" \
  48         "splashpos=m,m\0" \
  49         "console=" CONSOLE_DEV "\0" \
  50         "fdt_high=0xffffffff\0"   \
  51         "initrd_high=0xffffffff\0" \
  52         "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
  53         "set_fit_default=fdt addr ${fit_addr_r};fdt set /configurations " \
  54                 "default ${board_type}\0" \
  55         "get_env=mw ${loadaddr} 0 0x20000;" \
  56                 "mmc rescan;" \
  57                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} env.txt;" \
  58                 "env import -t ${loadaddr}\0" \
  59         "default_env=mw ${loadaddr} 0 0x20000;" \
  60                 "env export -t ${loadaddr} serial# ethaddr eth1addr " \
  61                 "board_type panel;" \
  62                 "env default -a;" \
  63                 "env import -t ${loadaddr}\0" \
  64         "loadbootscript=" \
  65                 "ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  66         "bootscript=echo Running bootscript from mmc ...; " \
  67                 "source\0" \
  68         "mmcpart=1\0" \
  69         "mmcdev=0\0" \
  70         "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
  71         "mmcargs=setenv bootargs console=${console},${baudrate} " \
  72                 "root=${mmcroot}\0" \
  73         "mmcboot=echo Booting from mmc ...; " \
  74                 "run mmcargs addmtd addmisc set_fit_default;" \
  75                 "bootm ${fit_addr_r}\0" \
  76         "mmc_load_fit=ext2load mmc ${mmcdev}:${mmcpart} ${fit_addr_r} " \
  77                 "${fit_file}\0" \
  78         "mmc_load_uboot=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
  79                 "${uboot}\0" \
  80         "mmc_upd_uboot=mw.b ${loadaddr} 0xff ${uboot_sz};" \
  81                 "setexpr cmp_buf ${loadaddr} + ${uboot_sz};" \
  82                 "setexpr uboot_maxsize ${uboot_sz} - 400;" \
  83                 "mw.b ${cmp_buf} 0x00 ${uboot_sz};" \
  84                 "run mmc_load_uboot;sf probe;sf erase 0 ${uboot_sz};" \
  85                 "sf write ${loadaddr} 400 ${filesize};" \
  86                 "sf read ${cmp_buf} 400 ${uboot_sz};" \
  87                 "cmp.b ${loadaddr} ${cmp_buf} ${uboot_maxsize}\0" \
  88         "ubiboot=echo Booting from ubi ...; " \
  89                 "run ubiargs addmtd addmisc set_fit_default;" \
  90                 "bootm ${fit_addr_r}\0" \
  91         "rescueargs=setenv bootargs console=${console},${baudrate} " \
  92                 "root=/dev/ram rw\0 " \
  93         "rescueboot=echo Booting rescue system from NOR ...; " \
  94                 "run rescueargs addmtd addmisc set_fit_default;" \
  95                 "bootm ${fit_addr_r}\0" \
  96         "rescue_load_fit=sf probe;sf read ${fit_addr_r} ${rescue_sys_addr} " \
  97                 "${rescue_sys_length}; imi ${fit_addr_r}\0" \
  98         CONFIG_EXTRA_ENV_BOARD_SETTINGS
  99
 100 #define CONFIG_BOOTCOMMAND \
 101         "mmc dev ${mmcdev};" \
 102         "if mmc rescan; then " \
 103                 "if run loadbootscript; then " \
 104                         "run bootscript; " \
 105                 "else " \
 106                         "if run mmc_load_fit; then " \
 107                                 "run mmcboot; " \
 108                         "else " \
 109                                 "if run ubifs_load_fit; then " \
 110                                         "run ubiboot; " \
 111                                 "else " \
 112                                         "if run rescue_load_fit; then " \
 113                                                 "run rescueboot; " \
 114                                         "else " \
 115                                                 "echo RESCUE SYSTEM BOOT " \
 116                                                         "FAILURE;" \
 117                                         "fi; " \
 118                                 "fi; " \
 119                         "fi; " \
 120                 "fi; " \
 121         "else " \
 122                 "if run ubifs_load_fit; then " \
 123                         "run ubiboot; " \
 124                 "else " \
 125                         "if run rescue_load_fit; then " \
 126                                 "run rescueboot; " \
 127                         "else " \
 128                                 "echo RESCUE SYSTEM BOOT FAILURE;" \
 129                         "fi; " \
 130                 "fi; " \
 131         "fi"
 132
 133 #define CONFIG_ARP_TIMEOUT              200UL
 134
 135 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM
 136 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + 0x100000)
 137 #define CONFIG_SYS_MEMTEST_SCRATCH      0x10800000
 138
 139 /* Physical Memory Map */
 140 #define PHYS_SDRAM                      MMDC0_ARB_BASE_ADDR
 141
 142 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM
 143 #define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 144 #define CONFIG_SYS_INIT_RAM_SIZE        IRAM_SIZE
 145
 146 #define CONFIG_SYS_INIT_SP_OFFSET \
 147         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 148 #define CONFIG_SYS_INIT_SP_ADDR \
 149         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 150
 151 /* Environment organization */
 152 #define CONFIG_ENV_SIZE                 (12 * 1024)
 153 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
 154 #define CONFIG_ENV_SPI_BUS              CONFIG_SF_DEFAULT_BUS
 155 #define CONFIG_ENV_SPI_CS               CONFIG_SF_DEFAULT_CS
 156 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
 157 #define CONFIG_ENV_SPI_MODE             CONFIG_SF_DEFAULT_MODE
 158 #define CONFIG_ENV_SECT_SIZE            (0x010000)
 159 #define CONFIG_ENV_OFFSET               (0x0d0000)
 160 #define CONFIG_ENV_OFFSET_REDUND        (0x0e0000)
 161
 162 #define CONFIG_SYS_FSL_USDHC_NUM        2
 163
 164 /* I2C */
 165 #define CONFIG_SYS_I2C
 166 #define CONFIG_SYS_I2C_MXC
 167 #define CONFIG_SYS_I2C_MXC_I2C1         /* enable I2C bus 1 */
 168 #define CONFIG_SYS_I2C_MXC_I2C2         /* enable I2C bus 2 */
 169 #define CONFIG_SYS_I2C_MXC_I2C3         /* enable I2C bus 3 */
 170 #define CONFIG_SYS_I2C_SPEED            100000
 171 #define CONFIG_SYS_I2C_SLAVE            0x7f
 172 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x00} }
 173
 174 /* NAND stuff */
 175 #define CONFIG_SYS_MAX_NAND_DEVICE      1
 176 #define CONFIG_SYS_NAND_BASE            0x40000000
 177 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
 178 #define CONFIG_SYS_NAND_ONFI_DETECTION
 179
 180 /* DMA stuff, needed for GPMI/MXS NAND support */
 181
 182 /* RTC */
 183 #define CONFIG_SYS_I2C_RTC_ADDR 0x68
 184 #define CONFIG_SYS_RTC_BUS_NUM  2
 185 #define CONFIG_RTC_M41T11
 186
 187 /* USB Configs */
 188 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 189 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET        /* For OTG port */
 190 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
 191 #define CONFIG_MXC_USB_FLAGS    0
 192
 193 /* UBI support */
 194
 195 #define CONFIG_HW_WATCHDOG
 196 #define CONFIG_IMX_WATCHDOG
 197
 198 /* Framebuffer */
 199 #define CONFIG_VIDEO_IPUV3
 200 /* check this console not needed, after test remove it */
 201 #define CONFIG_VIDEO_BMP_RLE8
 202 #define CONFIG_SPLASH_SCREEN
 203 #define CONFIG_SPLASH_SCREEN_ALIGN
 204 #define CONFIG_BMP_16BPP
 205 #define CONFIG_VIDEO_LOGO
 206 #define CONFIG_VIDEO_BMP_LOGO
 207 #define CONFIG_IMX_VIDEO_SKIP
 208
 209 #define CONFIG_PWM_IMX
 210 #define CONFIG_IMX6_PWM_PER_CLK 66000000
 211
 212 #endif /* __ARISTAINETOS_COMMON_CONFIG_H */