3 * Configuration settings for the Armadeus Project motherboard APF27
5 * Copyright (C) 2008-2013 Eric Jarrige <eric.jarrige@armadeus.org>
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_ENV_VERSION 10
14 #define CONFIG_IDENT_STRING " apf27 patch 3.10"
15 #define CONFIG_BOARD_NAME apf27
20 #define CONFIG_MX27 /* This is a Freescale i.MX27 Chip */
21 #define CONFIG_MACH_TYPE 1698 /* APF27 */
24 * Enable the call to miscellaneous platform dependent initialization.
26 #define CONFIG_SYS_NO_FLASH
29 * Board display option
31 #define CONFIG_DISPLAY_BOARDINFO
32 #define CONFIG_DISPLAY_CPUINFO
37 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
38 #define CONFIG_SPL_LDSCRIPT "arch/$(ARCH)/cpu/u-boot-spl.lds"
39 #define CONFIG_SPL_MAX_SIZE 2048
40 #define CONFIG_SPL_TEXT_BASE 0xA0000000
41 #define CONFIG_SPL_SERIAL_SUPPORT
43 /* NAND boot config */
44 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
45 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x800
46 #define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
47 #define CONFIG_SYS_NAND_U_BOOT_SIZE CONFIG_SYS_MONITOR_LEN - 0x800
52 #define CONFIG_BOOTP_SUBNETMASK
53 #define CONFIG_BOOTP_GATEWAY
54 #define CONFIG_BOOTP_HOSTNAME
55 #define CONFIG_BOOTP_BOOTPATH
56 #define CONFIG_BOOTP_BOOTFILESIZE
57 #define CONFIG_BOOTP_DNS
58 #define CONFIG_BOOTP_DNS2
60 #define CONFIG_HOSTNAME CONFIG_BOARD_NAME
61 #define CONFIG_ROOTPATH "/tftpboot/" __stringify(CONFIG_BOARD_NAME) "-root"
66 #define CONFIG_CMD_BSP /* Board Specific functions */
67 #define CONFIG_CMD_DATE
68 #define CONFIG_CMD_EEPROM
69 #define CONFIG_CMD_IMX_FUSE /* imx iim fuse */
70 #define CONFIG_CMD_MTDPARTS /* MTD partition support */
71 #define CONFIG_CMD_NAND /* NAND support */
72 #define CONFIG_CMD_NAND_LOCK_UNLOCK
73 #define CONFIG_CMD_NAND_TRIMFFS
74 #define CONFIG_CMD_UBI
75 #define CONFIG_CMD_UBIFS
78 * Memory configurations
80 #define CONFIG_NR_DRAM_POPULATED 1
81 #define CONFIG_NR_DRAM_BANKS 2
83 #define ACFG_SDRAM_MBYTE_SYZE 64
85 #define PHYS_SDRAM_1 0xA0000000
86 #define PHYS_SDRAM_2 0xB0000000
87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
88 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (512<<10))
89 #define CONFIG_SYS_MEMTEST_START 0xA0000000 /* memtest test area */
90 #define CONFIG_SYS_MEMTEST_END 0xA0300000 /* 3 MiB RAM test */
92 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE \
93 + PHYS_SDRAM_1_SIZE - 0x0100000)
95 #define CONFIG_SYS_TEXT_BASE 0xA0000800
100 #define ACFG_MONITOR_OFFSET 0x00000000
101 #define CONFIG_SYS_MONITOR_LEN 0x00100000 /* 1MiB */
102 #define CONFIG_ENV_IS_IN_NAND
103 #define CONFIG_ENV_OVERWRITE
104 #define CONFIG_ENV_OFFSET 0x00100000 /* NAND offset */
105 #define CONFIG_ENV_SIZE 0x00020000 /* 128kB */
106 #define CONFIG_ENV_RANGE 0X00080000 /* 512kB */
107 #define CONFIG_ENV_OFFSET_REDUND \
108 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) /* +512kB */
109 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE /* 512kB */
110 #define CONFIG_FIRMWARE_OFFSET 0x00200000
111 #define CONFIG_FIRMWARE_SIZE 0x00080000 /* 512kB */
112 #define CONFIG_KERNEL_OFFSET 0x00300000
113 #define CONFIG_ROOTFS_OFFSET 0x00800000
115 #define CONFIG_MTDMAP "mxc_nand.0"
116 #define MTDIDS_DEFAULT "nand0=" CONFIG_MTDMAP
117 #define MTDPARTS_DEFAULT "mtdparts=" CONFIG_MTDMAP \
127 * U-Boot general configurations
129 #define CONFIG_SYS_LONGHELP
130 #define CONFIG_SYS_CBSIZE 2048 /* console I/O buffer */
131 #define CONFIG_SYS_PBSIZE \
132 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
133 /* Print buffer size */
134 #define CONFIG_SYS_MAXARGS 16 /* max command args */
135 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
136 /* Boot argument buffer size */
137 #define CONFIG_AUTO_COMPLETE
138 #define CONFIG_CMDLINE_EDITING
139 #define CONFIG_ENV_VARS_UBOOT_CONFIG
140 #define CONFIG_PREBOOT "run check_flash check_env;"
145 #define CONFIG_CMDLINE_TAG /* send commandline to Kernel */
146 #define CONFIG_SETUP_MEMORY_TAGS /* send memory definition to kernel */
147 #define CONFIG_INITRD_TAG /* send initrd params */
149 #define CONFIG_BOOTFILE __stringify(CONFIG_BOARD_NAME) "-linux.bin"
150 #define CONFIG_BOOTARGS "console=" __stringify(ACFG_CONSOLE_DEV) "," \
151 __stringify(CONFIG_BAUDRATE) " " MTDPARTS_DEFAULT \
152 " ubi.mtd=rootfs root=ubi0:rootfs rootfstype=ubifs "
154 #define ACFG_CONSOLE_DEV ttySMX0
155 #define CONFIG_BOOTCOMMAND "run ubifsboot"
156 #define CONFIG_SYS_AUTOLOAD "no"
158 * Default load address for user programs and kernel
160 #define CONFIG_LOADADDR 0xA0000000
161 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
166 #define CONFIG_EXTRA_ENV_SETTINGS \
167 "env_version=" __stringify(CONFIG_ENV_VERSION) "\0" \
168 "consoledev=" __stringify(ACFG_CONSOLE_DEV) "\0" \
169 "mtdparts=" MTDPARTS_DEFAULT "\0" \
170 "partition=nand0,6\0" \
171 "u-boot_addr=" __stringify(ACFG_MONITOR_OFFSET) "\0" \
172 "env_addr=" __stringify(CONFIG_ENV_OFFSET) "\0" \
173 "firmware_addr=" __stringify(CONFIG_FIRMWARE_OFFSET) "\0" \
174 "firmware_size=" __stringify(CONFIG_FIRMWARE_SIZE) "\0" \
175 "kernel_addr=" __stringify(CONFIG_KERNEL_OFFSET) "\0" \
176 "rootfs_addr=" __stringify(CONFIG_ROOTFS_OFFSET) "\0" \
177 "board_name=" __stringify(CONFIG_BOARD_NAME) "\0" \
178 "kernel_addr_r=A0000000\0" \
179 "check_env=if test -n ${flash_env_version}; " \
180 "then env default env_version; " \
181 "else env set flash_env_version ${env_version}; env save; "\
183 "if itest ${flash_env_version} < ${env_version}; then " \
184 "echo \"*** Warning - Environment version" \
185 " change suggests: run flash_reset_env; reset\"; "\
186 "env default flash_reset_env; "\
188 "check_flash=nand lock; nand unlock ${env_addr}; \0" \
189 "flash_reset_env=env default -f -a; saveenv; run update_env;" \
190 "echo Flash environment variables erased!\0" \
191 "download_uboot=tftpboot ${loadaddr} ${board_name}" \
192 "-u-boot-with-spl.bin\0" \
193 "flash_uboot=nand unlock ${u-boot_addr} ;" \
194 "nand erase.part u-boot;" \
195 "if nand write.trimffs ${fileaddr} ${u-boot_addr} ${filesize};"\
196 "then nand lock; nand unlock ${env_addr};" \
197 "echo Flashing of uboot succeed;" \
198 "else echo Flashing of uboot failed;" \
200 "update_uboot=run download_uboot flash_uboot\0" \
201 "download_env=tftpboot ${loadaddr} ${board_name}" \
202 "-u-boot-env.txt\0" \
203 "flash_env=env import -t ${loadaddr}; env save; \0" \
204 "update_env=run download_env flash_env\0" \
205 "update_all=run update_env update_uboot\0" \
206 "unlock_regs=mw 10000008 0; mw 10020008 0\0" \
211 #define CONFIG_MXC_UART
212 #define CONFIG_CONS_INDEX 1
213 #define CONFIG_BAUDRATE 115200
214 #define CONFIG_MXC_UART_BASE UART1_BASE
219 #define CONFIG_MXC_GPIO
228 #define CONFIG_NAND_MXC
230 #define CONFIG_MXC_NAND_REGS_BASE 0xD8000000
231 #define CONFIG_SYS_NAND_BASE CONFIG_MXC_NAND_REGS_BASE
232 #define CONFIG_SYS_MAX_NAND_DEVICE 1
234 #define CONFIG_MXC_NAND_HWECC
235 #define CONFIG_SYS_NAND_LARGEPAGE
236 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
237 #define CONFIG_SYS_NAND_PAGE_SIZE 2048
238 #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
239 #define CONFIG_SYS_NAND_PAGE_COUNT CONFIG_SYS_NAND_BLOCK_SIZE / \
240 CONFIG_SYS_NAND_PAGE_SIZE
241 #define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024)
242 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 11
243 #define NAND_MAX_CHIPS 1
245 #define CONFIG_FLASH_SHOW_PROGRESS 45
246 #define CONFIG_SYS_NAND_QUIET 1
249 * Partitions & Filsystems
251 #define CONFIG_MTD_DEVICE
252 #define CONFIG_MTD_PARTITIONS
253 #define CONFIG_DOS_PARTITION
254 #define CONFIG_SUPPORT_VFAT
259 #define CONFIG_RBTREE
263 * Ethernet (on SOC imx FEC)
265 #define CONFIG_FEC_MXC
266 #define CONFIG_FEC_MXC_PHYADDR 0x1f
267 #define CONFIG_MII /* MII PHY management */
272 #ifndef CONFIG_SPL_BUILD
275 #define CONFIG_FPGA_COUNT 1
276 #define CONFIG_FPGA_XILINX
277 #define CONFIG_FPGA_SPARTAN3
278 #define CONFIG_SYS_FPGA_WAIT 250 /* 250 ms */
279 #define CONFIG_SYS_FPGA_PROG_FEEDBACK
280 #define CONFIG_SYS_FPGA_CHECK_CTRLC
281 #define CONFIG_SYS_FPGA_CHECK_ERROR
286 #ifdef CONFIG_CMD_IMX_FUSE
287 #define IIM_MAC_BANK 0
288 #define IIM_MAC_ROW 5
289 #define IIM0_SCC_KEY 11
297 #ifdef CONFIG_CMD_I2C
298 #define CONFIG_SYS_I2C
299 #define CONFIG_SYS_I2C_MXC
300 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
301 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
302 #define CONFIG_SYS_MXC_I2C1_SPEED 100000 /* 100 kHz */
303 #define CONFIG_SYS_MXC_I2C1_SLAVE 0x7F
304 #define CONFIG_SYS_MXC_I2C2_SPEED 100000 /* 100 kHz */
305 #define CONFIG_SYS_MXC_I2C2_SLAVE 0x7F
306 #define CONFIG_SYS_I2C_NOPROBES { }
308 #ifdef CONFIG_CMD_EEPROM
309 # define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* EEPROM 24LC02 */
310 # define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
311 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
312 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* msec */
313 #endif /* CONFIG_CMD_EEPROM */
314 #endif /* CONFIG_CMD_I2C */
319 #ifdef CONFIG_CMD_MMC
321 #define CONFIG_GENERIC_MMC
322 #define CONFIG_MXC_MMC
323 #define CONFIG_MXC_MCI_REGS_BASE 0x10014000
329 #ifdef CONFIG_CMD_DATE
330 #define CONFIG_RTC_DS1374
331 #define CONFIG_SYS_RTC_BUS_NUM 0
332 #endif /* CONFIG_CMD_DATE */
337 * 31 | x |x| x x x x |x x x x x x x x x x |x x|x x x x|x x x x x x x x x x| 0
338 * |CPLM|X|----PD---|--------MFD---------|XXX|--MFI--|-----MFN-----------|
340 #define CONFIG_MX27_CLK32 32768 /* 32768 or 32000 Hz crystal */
342 #if (ACFG_SDRAM_MBYTE_SYZE == 64) /* micron MT46H16M32LF -6 */
344 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
345 #define PHYS_SDRAM_2_SIZE 0x04000000 /* 64 MB */
348 #if (ACFG_SDRAM_MBYTE_SYZE == 128)
350 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
351 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
354 #if (ACFG_SDRAM_MBYTE_SYZE == 256)
356 #define PHYS_SDRAM_1_SIZE 0x10000000 /* 256 MB */
357 #define PHYS_SDRAM_2_SIZE 0x10000000 /* 256 MB */
360 #endif /* __CONFIG_H */