2 * am3517_evm.h - Default configuration for AM3517 EVM board.
4 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
6 * Based on omap3_evm_config.h
8 * Copyright (C) 2010 Texas Instruments Incorporated
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
29 * High Level Configuration Options
31 #define CONFIG_OMAP 1 /* in a TI OMAP core */
32 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
33 #define CONFIG_OMAP3_AM3517EVM 1 /* working with AM3517EVM */
35 #define CONFIG_EMIF4 /* The chip has EMIF4 controller */
37 #include <asm/arch/cpu.h> /* get chip and board defs */
38 #include <asm/arch/omap3.h>
41 * Display CPU and Board information
43 #define CONFIG_DISPLAY_CPUINFO 1
44 #define CONFIG_DISPLAY_BOARDINFO 1
47 #define V_OSCK 26000000 /* Clock output from T2 */
48 #define V_SCLK (V_OSCK >> 1)
50 #undef CONFIG_USE_IRQ /* no support for IRQs */
51 #define CONFIG_MISC_INIT_R
53 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
54 #define CONFIG_SETUP_MEMORY_TAGS 1
55 #define CONFIG_INITRD_TAG 1
56 #define CONFIG_REVISION_TAG 1
59 * Size of malloc() pool
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
62 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
66 #define CONFIG_OMAP3_MICRON_DDR 1 /* Micron DDR */
67 #define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
74 * NS16550 Configuration
76 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
78 #define CONFIG_SYS_NS16550
79 #define CONFIG_SYS_NS16550_SERIAL
80 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
81 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
84 * select serial console configuration
86 #define CONFIG_CONS_INDEX 3
87 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
88 #define CONFIG_SERIAL3 3 /* UART3 on AM3517 EVM */
90 /* allow to overwrite serial and ethaddr */
91 #define CONFIG_ENV_OVERWRITE
92 #define CONFIG_BAUDRATE 115200
93 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
96 #define CONFIG_OMAP3_MMC 1
97 #define CONFIG_DOS_PARTITION 1
101 * Enable CONFIG_MUSB_HCD for Host functionalities MSC, keyboard
102 * Enable CONFIG_MUSB_UDC for Device functionalities.
104 #define CONFIG_USB_AM35X 1
105 #define CONFIG_MUSB_HCD 1
107 #ifdef CONFIG_USB_AM35X
109 #ifdef CONFIG_MUSB_HCD
110 #define CONFIG_CMD_USB
112 #define CONFIG_USB_STORAGE
113 #define CONGIG_CMD_STORAGE
114 #define CONFIG_CMD_FAT
116 #ifdef CONFIG_USB_KEYBOARD
117 #define CONFIG_SYS_USB_EVENT_POLL
118 #define CONFIG_PREBOOT "usb start"
119 #endif /* CONFIG_USB_KEYBOARD */
121 #endif /* CONFIG_MUSB_HCD */
123 #ifdef CONFIG_MUSB_UDC
124 /* USB device configuration */
125 #define CONFIG_USB_DEVICE 1
126 #define CONFIG_USB_TTY 1
127 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
128 /* Change these to suit your needs */
129 #define CONFIG_USBD_VENDORID 0x0451
130 #define CONFIG_USBD_PRODUCTID 0x5678
131 #define CONFIG_USBD_MANUFACTURER "Texas Instruments"
132 #define CONFIG_USBD_PRODUCT_NAME "AM3517EVM"
133 #endif /* CONFIG_MUSB_UDC */
135 #endif /* CONFIG_USB_AM35X */
137 /* commands to include */
138 #include <config_cmd_default.h>
140 #define CONFIG_CMD_EXT2 /* EXT2 Support */
141 #define CONFIG_CMD_FAT /* FAT support */
142 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */
144 #define CONFIG_CMD_I2C /* I2C serial bus support */
145 #define CONFIG_CMD_MMC /* MMC support */
146 #define CONFIG_CMD_NAND /* NAND support */
147 #define CONFIG_CMD_DHCP
148 #define CONFIG_CMD_PING
150 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
151 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
152 #undef CONFIG_CMD_IMI /* iminfo */
153 #undef CONFIG_CMD_IMLS /* List all found images */
155 #define CONFIG_SYS_NO_FLASH
156 #define CONFIG_HARD_I2C 1
157 #define CONFIG_SYS_I2C_SPEED 100000
158 #define CONFIG_SYS_I2C_SLAVE 1
159 #define CONFIG_SYS_I2C_BUS 0
160 #define CONFIG_SYS_I2C_BUS_SELECT 1
161 #define CONFIG_DRIVER_OMAP34XX_I2C 1
163 #undef CONFIG_CMD_NET
164 #undef CONFIG_CMD_NFS
168 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
170 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
174 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
176 #define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
178 #define CONFIG_JFFS2_NAND
179 /* nand device jffs2 lives on */
180 #define CONFIG_JFFS2_DEV "nand0"
181 /* start of jffs2 partition */
182 #define CONFIG_JFFS2_PART_OFFSET 0x680000
183 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* sz of jffs2 part */
185 /* Environment information */
186 #define CONFIG_BOOTDELAY 10
188 #define CONFIG_BOOTFILE uImage
190 #define CONFIG_EXTRA_ENV_SETTINGS \
191 "loadaddr=0x82000000\0" \
192 "console=ttyO2,115200n8\0" \
193 "mmcargs=setenv bootargs console=${console} " \
194 "root=/dev/mmcblk0p2 rw " \
195 "rootfstype=ext3 rootwait\0" \
196 "nandargs=setenv bootargs console=${console} " \
197 "root=/dev/mtdblock4 rw " \
198 "rootfstype=jffs2\0" \
199 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
200 "bootscript=echo Running bootscript from mmc ...; " \
201 "source ${loadaddr}\0" \
202 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
203 "mmcboot=echo Booting from mmc ...; " \
205 "bootm ${loadaddr}\0" \
206 "nandboot=echo Booting from nand ...; " \
208 "nand read ${loadaddr} 280000 400000; " \
209 "bootm ${loadaddr}\0" \
211 #define CONFIG_BOOTCOMMAND \
212 "if mmc init; then " \
213 "if run loadbootscript; then " \
216 "if run loaduimage; then " \
218 "else run nandboot; " \
221 "else run nandboot; fi"
223 #define CONFIG_AUTO_COMPLETE 1
225 * Miscellaneous configurable options
227 #define V_PROMPT "AM3517_EVM # "
229 #define CONFIG_SYS_LONGHELP /* undef to save memory */
230 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
231 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
232 #define CONFIG_SYS_PROMPT V_PROMPT
233 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
234 /* Print Buffer Size */
235 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
236 sizeof(CONFIG_SYS_PROMPT) + 16)
237 #define CONFIG_SYS_MAXARGS 32 /* max number of command */
239 /* Boot Argument Buffer Size */
240 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
241 /* memtest works on */
242 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
243 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
244 0x01F00000) /* 31MB */
246 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
250 * AM3517 has 12 GP timers, they can be driven by the system clock
251 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
252 * This rate is divided by a local divisor.
254 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
255 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
256 #define CONFIG_SYS_HZ 1000
258 /*-----------------------------------------------------------------------
261 * The stack sizes are set up in start.S using the settings below
263 #define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
264 #ifdef CONFIG_USE_IRQ
265 #define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
266 #define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
269 /*-----------------------------------------------------------------------
270 * Physical Memory Map
272 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
273 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
274 #define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
275 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
277 /* SDRAM Bank Allocation method */
280 /*-----------------------------------------------------------------------
281 * FLASH and environment organization
284 /* **** PISMO SUPPORT *** */
286 /* Configure the PISMO */
287 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
288 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
290 #define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors */
292 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
293 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
295 #if defined(CONFIG_CMD_NAND)
296 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
299 /* Monitor at start of flash */
300 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
302 #define CONFIG_NAND_OMAP_GPMC
303 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
304 #define CONFIG_ENV_IS_IN_NAND 1
305 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
307 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
308 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
309 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
311 /*-----------------------------------------------------------------------
312 * CFI FLASH driver setup
314 /* timeout values are in ticks */
315 #define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
316 #define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
318 /* Flash banks JFFS2 should use */
319 #define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
320 CONFIG_SYS_MAX_NAND_DEVICE)
321 #define CONFIG_SYS_JFFS2_MEM_NAND
322 /* use flash_info[2] */
323 #define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
324 #define CONFIG_SYS_JFFS2_NUM_BANKS 1
326 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
327 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
328 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
329 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
330 CONFIG_SYS_INIT_RAM_SIZE - \
331 GENERATED_GBL_DATA_SIZE)
332 #endif /* __CONFIG_H */