2 * Copyright (C) 2016 Timesys Corporation
3 * Copyright (C) 2016 Advantech Corporation
4 * Copyright (C) 2012 Freescale Semiconductor, Inc.
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ADVANTECH_DMSBA16_CONFIG_H
10 #define __ADVANTECH_DMSBA16_CONFIG_H
12 #include <asm/arch/imx-regs.h>
13 #include <asm/imx-common/gpio.h>
15 #define CONFIG_BOARD_NAME "Advantech DMS-BA16"
17 #define CONFIG_MXC_UART_BASE UART4_BASE
18 #define CONSOLE_DEV "ttymxc3"
19 #define CONFIG_EXTRA_BOOTARGS "panic=10"
21 #define CONFIG_BOOT_DIR ""
22 #define CONFIG_LOADCMD "fatload"
23 #define CONFIG_RFSPART "2"
25 #define CONFIG_SUPPORT_EMMC_BOOT
27 #include "mx6_common.h"
28 #include <linux/sizes.h>
30 #define CONFIG_CMDLINE_TAG
31 #define CONFIG_SETUP_MEMORY_TAGS
32 #define CONFIG_INITRD_TAG
33 #define CONFIG_REVISION_TAG
34 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
36 #define CONFIG_BOARD_EARLY_INIT_F
37 #define CONFIG_BOARD_LATE_INIT
39 #define CONFIG_MXC_GPIO
40 #define CONFIG_MXC_UART
42 #define CONFIG_CMD_FUSE
43 #define CONFIG_MXC_OCOTP
46 #define CONFIG_CMD_SATA
47 #define CONFIG_DWC_AHSATA
48 #define CONFIG_SYS_SATA_MAX_DEVICE 1
49 #define CONFIG_DWC_AHSATA_PORT_ID 0
50 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
55 #define CONFIG_FSL_ESDHC
56 #define CONFIG_FSL_USDHC
57 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
59 #define CONFIG_GENERIC_MMC
60 #define CONFIG_BOUNCE_BUFFER
61 #define CONFIG_DOS_PARTITION
64 #define CONFIG_USB_EHCI
65 #define CONFIG_USB_EHCI_MX6
66 #define CONFIG_USB_STORAGE
67 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
68 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
69 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
70 #define CONFIG_MXC_USB_FLAGS 0
71 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
73 #define CONFIG_USBD_HS
74 #define CONFIG_USB_FUNCTION_MASS_STORAGE
75 #define CONFIG_USB_GADGET_VBUS_DRAW 2
77 /* Networking Configs */
78 #define CONFIG_FEC_MXC
80 #define IMX_FEC_BASE ENET_BASE_ADDR
81 #define CONFIG_FEC_XCV_TYPE RGMII
82 #define CONFIG_ETHPRIME "FEC"
83 #define CONFIG_FEC_MXC_PHYADDR 4
85 #define CONFIG_PHY_ATHEROS
89 #define CONFIG_MXC_SPI
90 #define CONFIG_SF_DEFAULT_BUS 0
91 #define CONFIG_SF_DEFAULT_CS 0
92 #define CONFIG_SF_DEFAULT_SPEED 20000000
93 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
96 /* allow to overwrite serial and ethaddr */
97 #define CONFIG_ENV_OVERWRITE
98 #define CONFIG_CONS_INDEX 1
99 #define CONFIG_BAUDRATE 115200
101 /* Command definition */
102 #define CONFIG_CMD_BMODE
104 #define CONFIG_LOADADDR 0x12000000
105 #define CONFIG_SYS_TEXT_BASE 0x17800000
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 "script=boot.scr\0" \
109 "image=" CONFIG_BOOT_DIR "/uImage\0" \
110 "uboot=u-boot.imx\0" \
111 "fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
112 "fdt_addr=0x18000000\0" \
115 "console=" CONSOLE_DEV "\0" \
116 "fdt_high=0xffffffff\0" \
117 "initrd_high=0xffffffff\0" \
121 "loadcmd=" CONFIG_LOADCMD "\0" \
122 "rfspart=" CONFIG_RFSPART "\0" \
123 "update_sd_firmware=" \
124 "if test ${ip_dyn} = yes; then " \
125 "setenv get_cmd dhcp; " \
127 "setenv get_cmd tftp; " \
129 "if mmc dev ${mmcdev}; then " \
130 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
131 "setexpr fw_sz ${filesize} / 0x200; " \
132 "setexpr fw_sz ${fw_sz} + 1; " \
133 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
137 "if tftp $loadaddr $uboot; then " \
139 "sf erase 0 0xC0000; " \
140 "sf write $loadaddr 0x400 $filesize; " \
141 "echo 'U-Boot upgraded. Please reset'; " \
143 "setargs=setenv bootargs console=${console},${baudrate} " \
144 "root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
146 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
147 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
150 "${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
151 "loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
153 "if run loadbootscript; then " \
156 "if run loadimage; then " \
160 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
162 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
163 "if run loadfdt; then " \
164 "bootm ${loadaddr} - ${fdt_addr}; " \
166 "if test ${boot_fdt} = try; then " \
169 "echo WARN: Cannot load the DT; " \
175 "netargs=setenv bootargs console=${console},${baudrate} " \
177 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
178 "netboot=echo Booting from net ...; " \
180 "if test ${ip_dyn} = yes; then " \
181 "setenv get_cmd dhcp; " \
183 "setenv get_cmd tftp; " \
185 "${get_cmd} ${image}; " \
186 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
187 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
188 "bootm ${loadaddr} - ${fdt_addr}; " \
190 "if test ${boot_fdt} = try; then " \
193 "echo WARN: Cannot load the DT; " \
200 #define CONFIG_BOOTCOMMAND \
203 "setenv devnum 0; " \
204 "setenv rootdev sda${rfspart}; " \
208 "setenv rootdev mmcblk0p${rfspart}; " \
210 "setenv devnum ${sddev}; " \
211 "if mmc dev ${devnum}; then " \
215 "setenv devnum ${emmcdev}; " \
216 "setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
217 "if mmc dev ${devnum}; then " \
223 #define CONFIG_ARP_TIMEOUT 200UL
225 /* Miscellaneous configurable options */
226 #define CONFIG_SYS_LONGHELP
227 #define CONFIG_AUTO_COMPLETE
229 /* Print Buffer Size */
230 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
231 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
233 #define CONFIG_SYS_MEMTEST_START 0x10000000
234 #define CONFIG_SYS_MEMTEST_END 0x10010000
235 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
237 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
239 #define CONFIG_CMDLINE_EDITING
240 #define CONFIG_STACKSIZE (128 * 1024)
242 /* Physical Memory Map */
243 #define CONFIG_NR_DRAM_BANKS 1
244 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
246 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
247 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
248 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
250 #define CONFIG_SYS_INIT_SP_OFFSET \
251 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
252 #define CONFIG_SYS_INIT_SP_ADDR \
253 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
255 /* FLASH and environment organization */
256 #define CONFIG_SYS_NO_FLASH
258 #define CONFIG_ENV_IS_IN_SPI_FLASH
259 #define CONFIG_ENV_SIZE (8 * 1024)
260 #define CONFIG_ENV_OFFSET (768 * 1024)
261 #define CONFIG_ENV_SECT_SIZE (64 * 1024)
262 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
263 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
264 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
265 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
267 #ifndef CONFIG_SYS_DCACHE_OFF
270 #define CONFIG_SYS_FSL_USDHC_NUM 3
273 #define CONFIG_VIDEO_IPUV3
274 #define CONFIG_VIDEO_BMP_RLE8
275 #define CONFIG_SPLASH_SCREEN
276 #define CONFIG_SPLASH_SCREEN_ALIGN
277 #define CONFIG_BMP_16BPP
278 #define CONFIG_VIDEO_LOGO
279 #define CONFIG_VIDEO_BMP_LOGO
280 #define CONFIG_IPUV3_CLK 260000000
281 #define CONFIG_IMX_HDMI
282 #define CONFIG_IMX_VIDEO_SKIP
284 #define CONFIG_PWM_IMX
285 #define CONFIG_IMX6_PWM_PER_CLK 66000000
287 #undef CONFIG_CMD_PCI
288 #ifdef CONFIG_CMD_PCI
289 #define CONFIG_PCI_SCAN_SHOW
290 #define CONFIG_PCIE_IMX
291 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
292 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
296 #define CONFIG_SYS_I2C
297 #define CONFIG_SYS_I2C_MXC
298 #define CONFIG_SYS_I2C_SPEED 100000
299 #define CONFIG_SYS_I2C_MXC_I2C1
300 #define CONFIG_SYS_I2C_MXC_I2C2
301 #define CONFIG_SYS_I2C_MXC_I2C3
303 #endif /* __ADVANTECH_DMSBA16_CONFIG_H */