3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-2 board.
7 * SPDX-License-Identifier: GPL-2.0+
13 #define CONFIG_IXP425 1
14 #define CONFIG_ACTUX2 1
16 #define CONFIG_MACH_TYPE 1480
18 #define CONFIG_DISPLAY_CPUINFO 1
19 #define CONFIG_DISPLAY_BOARDINFO 1
21 #define CONFIG_IXP_SERIAL
22 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
23 #define CONFIG_BAUDRATE 115200
24 #define CONFIG_BOOTDELAY 5
25 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
26 #define CONFIG_BOARD_EARLY_INIT_F 1
27 #define CONFIG_SYS_LDSCRIPT "board/actux2/u-boot.lds"
29 /***************************************************************
30 * U-boot generic defines start here.
31 ***************************************************************/
32 /* Size of malloc() pool */
33 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
35 /* allow to overwrite serial and ethaddr */
36 #define CONFIG_ENV_OVERWRITE
38 /* Command line configuration. */
39 #include <config_cmd_default.h>
41 #define CONFIG_CMD_ELF
45 #define CONFIG_BOOTCOMMAND "run boot_flash"
46 /* enable passing of ATAGs */
47 #define CONFIG_CMDLINE_TAG 1
48 #define CONFIG_SETUP_MEMORY_TAGS 1
49 #define CONFIG_INITRD_TAG 1
50 #define CONFIG_REVISION_TAG 1
52 #if defined(CONFIG_CMD_KGDB)
53 # define CONFIG_KGDB_BAUDRATE 230400
56 /* Miscellaneous configurable options */
57 #define CONFIG_SYS_LONGHELP
58 /* Console I/O Buffer Size */
59 #define CONFIG_SYS_CBSIZE 256
60 /* Print Buffer Size */
61 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
62 /* max number of command args */
63 #define CONFIG_SYS_MAXARGS 16
64 /* Boot Argument Buffer Size */
65 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
67 #define CONFIG_SYS_MEMTEST_START 0x00400000
68 #define CONFIG_SYS_MEMTEST_END 0x00800000
70 /* timer clock - 2* OSC_IN system clock */
71 #define CONFIG_IXP425_TIMER_CLK 66666666
73 /* default load address */
74 #define CONFIG_SYS_LOAD_ADDR 0x00010000
77 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
79 #define CONFIG_SERIAL_RTS_ACTIVE 1
81 /* Expansion bus settings */
82 #define CONFIG_SYS_EXP_CS0 0xbd113042
85 #define CONFIG_NR_DRAM_BANKS 1
86 #define PHYS_SDRAM_1 0x00000000
87 #define CONFIG_SYS_SDRAM_BASE 0x00000000
90 #define CONFIG_SYS_SDR_CONFIG 0x3A
91 #define PHYS_SDRAM_1_SIZE 0x01000000
92 #define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
93 #define CONFIG_SYS_SDR_MODE_CONFIG 0x1
94 #define CONFIG_SYS_DRAM_SIZE 0x01000000
96 /* FLASH organization */
97 #define CONFIG_SYS_TEXT_BASE 0x50000000
98 #define CONFIG_SYS_MAX_FLASH_BANKS 1
99 /* max number of sectors on one chip */
100 #define CONFIG_SYS_MAX_FLASH_SECT 140
101 #define PHYS_FLASH_1 0x50000000
102 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
104 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
105 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
106 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
107 #define CONFIG_BOARD_SIZE_LIMIT 262144
109 /* Use common CFI driver */
110 #define CONFIG_SYS_FLASH_CFI
111 #define CONFIG_FLASH_CFI_DRIVER
112 /* no byte writes on IXP4xx */
113 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
115 /* print 'E' for empty sector on flinfo */
116 #define CONFIG_SYS_FLASH_EMPTY_INFO
120 /* include IXP4xx NPE support */
121 #define CONFIG_IXP4XX_NPE 1
122 /* NPE0 PHY address */
123 #define CONFIG_PHY_ADDR 0x00
124 /* MII PHY management */
126 /* fixed-speed switch without standard PHY registers on MII */
127 #define CONFIG_MII_NPE0_FIXEDLINK 1
128 #define CONFIG_MII_NPE0_SPEED 100
129 #define CONFIG_MII_NPE0_FULLDUPLEX 1
131 /* Number of ethernet rx buffers & descriptors */
132 #define CONFIG_SYS_RX_ETH_BUFFER 16
133 #define CONFIG_RESET_PHY_R 1
134 /* ethernet switch connected to MII port */
135 #define CONFIG_MII_ETHSWITCH 1
137 #define CONFIG_CMD_DHCP
138 #define CONFIG_CMD_NET
139 #define CONFIG_CMD_MII
140 #define CONFIG_CMD_PING
141 #undef CONFIG_CMD_NFS
144 #define CONFIG_BOOTP_BOOTFILESIZE
145 #define CONFIG_BOOTP_BOOTPATH
146 #define CONFIG_BOOTP_GATEWAY
147 #define CONFIG_BOOTP_HOSTNAME
149 /* Cache Configuration */
150 #define CONFIG_SYS_CACHELINE_SIZE 32
153 * environment organization:
154 * one flash sector, embedded in uboot area (bottom bootblock flash)
156 #define CONFIG_ENV_IS_IN_FLASH 1
157 #define CONFIG_ENV_SIZE 0x2000
158 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
159 #define CONFIG_SYS_USE_PPCENV 1
161 #define CONFIG_EXTRA_ENV_SETTINGS \
162 "npe_ucode=50040000\0" \
163 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
164 "kerneladdr=50050000\0" \
165 "kernelfile=actux2/uImage\0" \
166 "rootfile=actux2/rootfs\0" \
167 "rootaddr=50170000\0" \
169 "updateboot_ser=mw.b 10000 ff 40000;" \
170 " loady ${loadaddr};" \
171 " run eraseboot writeboot\0" \
172 "updateboot_net=mw.b 10000 ff 40000;" \
173 " tftp ${loadaddr} actux2/u-boot.bin;" \
174 " run eraseboot writeboot\0" \
175 "eraseboot=protect off 50000000 50003fff;" \
176 " protect off 50006000 5003ffff;" \
177 " erase 50000000 50003fff;" \
178 " erase 50006000 5003ffff\0" \
179 "writeboot=cp.b 10000 50000000 4000;" \
180 " cp.b 16000 50006000 3a000\0" \
181 "updateucode=loady;" \
182 " era ${npe_ucode} +${filesize};" \
183 " cp.b ${loadaddr} ${npe_ucode} ${filesize}\0" \
184 "updateroot=tftp ${loadaddr} ${rootfile};" \
185 " era ${rootaddr} +${filesize};" \
186 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
187 "updatekern=tftp ${loadaddr} ${kernelfile};" \
188 " era ${kerneladdr} +${filesize};" \
189 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
190 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
191 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
192 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
193 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
194 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
195 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
196 "boot_flash=run flashargs addtty addeth;" \
197 " bootm ${kerneladdr}\0" \
198 "boot_net=run netargs addtty addeth;" \
199 " tftpboot ${loadaddr} ${kernelfile};" \
202 /* additions for new relocation code, must be added to all boards */
203 #define CONFIG_SYS_INIT_SP_ADDR \
204 (CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
206 #endif /* __CONFIG_H */