3 * Michael Schwingen, michael@schwingen.org
5 * Configuration settings for the AcTux-1 board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 /* 1: modified board with 32MB DRAM */
30 #define CONFIG_ACTUX1_32MB 0
31 /* 1: 2*2MB FLASH (standard) */
32 #define CONFIG_ACTUX1_FLASH2X2 1
33 /* 1: 1*8MB FLASH (upgraded boards) */
34 #define CONFIG_ACTUX1_FLASH1X8 0
36 #define CONFIG_IXP425 1
37 #define CONFIG_ACTUX1 1
39 #define CONFIG_DISPLAY_CPUINFO 1
40 #define CONFIG_DISPLAY_BOARDINFO 1
42 #define CONFIG_IXP_SERIAL
43 #define CONFIG_SYS_IXP425_CONSOLE IXP425_UART2
44 #define CONFIG_BAUDRATE 115200
45 #define CONFIG_BOOTDELAY 3
46 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
48 /***************************************************************
49 * U-boot generic defines start here.
50 ***************************************************************/
54 * Size of malloc() pool
56 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024)
57 /* size in bytes reserved for initial data */
59 /* allow to overwrite serial and ethaddr */
60 #define CONFIG_ENV_OVERWRITE
62 /* Command line configuration. */
63 #include <config_cmd_default.h>
65 #define CONFIG_CMD_ELF
69 #define CONFIG_BOOTCOMMAND "run boot_flash"
70 /* enable passing of ATAGs */
71 #define CONFIG_CMDLINE_TAG 1
72 #define CONFIG_SETUP_MEMORY_TAGS 1
73 #define CONFIG_INITRD_TAG 1
74 #define CONFIG_REVISION_TAG 1
76 #if defined(CONFIG_CMD_KGDB)
77 # define CONFIG_KGDB_BAUDRATE 230400
78 /* which serial port to use */
79 # define CONFIG_KGDB_SER_INDEX 1
82 /* Miscellaneous configurable options */
83 #define CONFIG_SYS_LONGHELP
84 #define CONFIG_SYS_PROMPT "=> "
85 /* Console I/O Buffer Size */
86 #define CONFIG_SYS_CBSIZE 256
87 /* Print Buffer Size */
88 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
89 /* max number of command args */
90 #define CONFIG_SYS_MAXARGS 16
91 /* Boot Argument Buffer Size */
92 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
94 #define CONFIG_SYS_MEMTEST_START 0x00400000
95 #define CONFIG_SYS_MEMTEST_END 0x00800000
97 /* spec says 66.666 MHz, but it appears to be 33 */
98 #define CONFIG_SYS_HZ 3333333
100 /* default load address */
101 #define CONFIG_SYS_LOAD_ADDR 0x00010000
103 /* valid baudrates */
104 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
106 #define CONFIG_SERIAL_RTS_ACTIVE 1
110 * The stack sizes are set up in start.S using the settings below
112 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
113 #ifdef CONFIG_USE_IRQ
114 # define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
115 # define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
118 /* Expansion bus settings */
119 #define CONFIG_SYS_EXP_CS0 0xbd113842
122 #define CONFIG_NR_DRAM_BANKS 1
123 #define PHYS_SDRAM_1 0x00000000
124 #define CONFIG_SYS_DRAM_BASE 0x00000000
126 #if CONFIG_ACTUX1_32MB
127 # define CONFIG_SYS_SDR_CONFIG 0x18
128 # define PHYS_SDRAM_1_SIZE 0x02000000
129 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
130 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
131 # define CONFIG_SYS_DRAM_SIZE 0x02000000
132 #else /* 16MB SDRAM */
133 # define CONFIG_SYS_SDR_CONFIG 0x3A
134 # define PHYS_SDRAM_1_SIZE 0x01000000
135 # define CONFIG_SYS_SDRAM_REFRESH_CNT 0x81a
136 # define CONFIG_SYS_SDR_MODE_CONFIG 0x1
137 # define CONFIG_SYS_DRAM_SIZE 0x01000000
140 /* FLASH organization */
141 #if CONFIG_ACTUX1_FLASH2X2
142 # define CONFIG_SYS_MAX_FLASH_BANKS 2
143 /* max number of sectors on one chip */
144 # define CONFIG_SYS_MAX_FLASH_SECT 40
145 # define PHYS_FLASH_1 0x50000000
146 # define PHYS_FLASH_2 0x50200000
147 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
149 #if CONFIG_ACTUX1_FLASH1X8
150 # define CONFIG_SYS_MAX_FLASH_BANKS 1
151 /* max number of sectors on one chip */
152 # define CONFIG_SYS_MAX_FLASH_SECT 140
153 # define PHYS_FLASH_1 0x50000000
154 # define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1 }
157 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
158 #define CONFIG_SYS_MONITOR_BASE PHYS_FLASH_1
159 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
161 /* Use common CFI driver */
162 #define CONFIG_SYS_FLASH_CFI
163 #define CONFIG_FLASH_CFI_DRIVER
164 /* no byte writes on IXP4xx */
165 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
166 /* print 'E' for empty sector on flinfo */
167 #define CONFIG_SYS_FLASH_EMPTY_INFO
171 /* include IXP4xx NPE support */
172 #define CONFIG_IXP4XX_NPE 1
173 #define CONFIG_NET_MULTI 1
174 /* NPE0 PHY address */
175 #define CONFIG_PHY_ADDR 0
176 /* MII PHY management */
178 /* Number of ethernet rx buffers & descriptors */
179 #define CONFIG_SYS_RX_ETH_BUFFER 16
180 #define CONFIG_RESET_PHY_R 1
182 #define CONFIG_CMD_DHCP
183 #define CONFIG_CMD_NET
184 #define CONFIG_CMD_MII
185 #define CONFIG_CMD_PING
186 #undef CONFIG_CMD_NFS
189 #define CONFIG_BOOTP_BOOTFILESIZE
190 #define CONFIG_BOOTP_BOOTPATH
191 #define CONFIG_BOOTP_GATEWAY
192 #define CONFIG_BOOTP_HOSTNAME
194 /* Cache Configuration */
195 #define CONFIG_SYS_CACHELINE_SIZE 32
198 * environment organization:
199 * one flash sector, embedded in uboot area (bottom bootblock flash)
201 #define CONFIG_ENV_IS_IN_FLASH 1
202 #define CONFIG_ENV_SIZE 0x2000
203 #define CONFIG_ENV_ADDR (PHYS_FLASH_1 + 0x4000)
204 #define CONFIG_SYS_USE_PPCENV 1
206 #define CONFIG_EXTRA_ENV_SETTINGS \
207 "npe_ucode=50040000\0" \
208 "mtd=IXP4XX-Flash.0:256k(uboot),64k(ucode),1152k(linux),-(root)\0" \
209 "kerneladdr=50050000\0" \
210 "rootaddr=50170000\0" \
212 "updateboot_ser=mw.b 10000 ff 40000;" \
213 " loady ${loadaddr};" \
214 " run eraseboot writeboot\0" \
215 "updateboot_net=mw.b 10000 ff 40000;" \
216 " tftp ${loadaddr} u-boot.bin;" \
217 " run eraseboot writeboot\0" \
218 "eraseboot=protect off 50000000 50003fff;" \
219 " protect off 50006000 5003ffff;" \
220 " erase 50000000 50003fff;" \
221 " erase 50006000 5003ffff\0" \
222 "writeboot=cp.b 10000 50000000 4000;" \
223 " cp.b 16000 50006000 3a000\0" \
224 "eraseenv=protect off 50004000 50005fff;" \
225 " erase 50004000 50005fff\0" \
226 "updateroot=tftp ${loadaddr} ${rootfile};" \
227 " era ${rootaddr} +${filesize};" \
228 " cp.b ${loadaddr} ${rootaddr} ${filesize}\0" \
229 "updatekern=tftp ${loadaddr} ${kernelfile};" \
230 " era ${kerneladdr} +${filesize};" \
231 " cp.b ${loadaddr} ${kerneladdr} ${filesize}\0" \
232 "flashargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
233 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
234 "netargs=setenv bootargs mtdparts=${mtd} root=/dev/mtdblock3" \
235 " rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
236 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0" \
237 "addeth=setenv bootargs ${bootargs} ethaddr=${ethaddr}\0" \
238 "boot_flash=run flashargs addtty addeth;" \
239 " bootm ${kerneladdr}\0" \
240 "boot_net=run netargs addtty addeth;" \
241 " tftpboot ${loadaddr} ${kernelfile};" \
244 #endif /* __CONFIG_H */