at91: Introduction of at91sam9g45 SOC.
[oweals/u-boot.git] / include / configs / XPEDITE5370.h
1 /*
2  * Copyright 2008 Extreme Engineering Solutions, Inc.
3  * Copyright 2007-2008 Freescale Semiconductor, Inc.
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23
24 /*
25  * xpedite5370 board configuration file
26  */
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 /*
31  * High Level Configuration Options
32  */
33 #define CONFIG_BOOKE            1       /* BOOKE */
34 #define CONFIG_E500             1       /* BOOKE e500 family */
35 #define CONFIG_MPC85xx          1       /* MPC8540/60/55/41/48 */
36 #define CONFIG_MPC8572          1
37 #define CONFIG_XPEDITE5370      1
38 #define CONFIG_SYS_BOARD_NAME   "XPedite5370"
39 #define CONFIG_NUM_CPUS         2       /* 2 Cores */
40 #define CONFIG_BOARD_EARLY_INIT_R       /* Call board_pre_init */
41 #define CONFIG_RELOC_FIXUP_WORKS        /* Fully relocate to SDRAM */
42
43 #define CONFIG_PCI              1       /* Enable PCI/PCIE */
44 #define CONFIG_PCI_PNP          1       /* do pci plug-and-play */
45 #define CONFIG_PCI_SCAN_SHOW    1       /* show pci devices on startup */
46 #define CONFIG_PCIE1            1       /* PCIE controler 1 */
47 #define CONFIG_PCIE2            1       /* PCIE controler 2 */
48 #define CONFIG_FSL_PCI_INIT     1       /* Use common FSL init code */
49 #define CONFIG_SYS_PCI_64BIT    1       /* enable 64-bit PCI resources */
50 #define CONFIG_FSL_PCIE_RESET   1       /* need PCIe reset errata */
51 #define CONFIG_FSL_LAW          1       /* Use common FSL init code */
52
53 /*
54  * DDR config
55  */
56 #define CONFIG_FSL_DDR2
57 #undef CONFIG_FSL_DDR_INTERACTIVE
58 #define CONFIG_SPD_EEPROM               /* Use SPD EEPROM for DDR setup */
59 #define CONFIG_DDR_SPD
60 #define CONFIG_MEM_INIT_VALUE           0xdeadbeef
61 #define SPD_EEPROM_ADDRESS1             0x54    /* Both channels use the */
62 #define SPD_EEPROM_ADDRESS2             0x54    /* same SPD data         */
63 #define SPD_EEPROM_OFFSET               0x200   /* OFFSET of SPD in EEPROM */
64 #define CONFIG_NUM_DDR_CONTROLLERS      2
65 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
66 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
67 #define CONFIG_DDR_ECC
68 #define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
69 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000 /* DDR is system memory*/
70 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
71 #define CONFIG_VERY_BIG_RAM
72
73 #ifndef __ASSEMBLY__
74 extern unsigned long get_board_sys_clk(unsigned long dummy);
75 extern unsigned long get_board_ddr_clk(unsigned long dummy);
76 #endif
77
78 #define CONFIG_SYS_CLK_FREQ     get_board_sys_clk(0) /* sysclk for MPC85xx */
79 #define CONFIG_DDR_CLK_FREQ     get_board_ddr_clk(0) /* ddrclk for MPC85xx */
80
81 /*
82  * These can be toggled for performance analysis, otherwise use default.
83  */
84 #define CONFIG_L2_CACHE                 /* toggle L2 cache */
85 #define CONFIG_BTB                      /* toggle branch predition */
86 #define CONFIG_ENABLE_36BIT_PHYS        1
87
88 /*
89  * Base addresses -- Note these are effective addresses where the
90  * actual resources get mapped (not physical addresses)
91  */
92 #define CONFIG_SYS_CCSRBAR_DEFAULT      0xff700000      /* CCSRBAR Default */
93 #define CONFIG_SYS_CCSRBAR              0xef000000      /* relocated CCSRBAR */
94 #define CONFIG_SYS_CCSRBAR_PHYS CONFIG_SYS_CCSRBAR      /* physical addr of CCSRBAR */
95 #define CONFIG_SYS_IMMR         CONFIG_SYS_CCSRBAR      /* PQII uses CONFIG_SYS_IMMR */
96 #define CONFIG_SYS_PCIE1_ADDR           (CONFIG_SYS_CCSRBAR + 0xa000)
97 #define CONFIG_SYS_PCIE2_ADDR           (CONFIG_SYS_CCSRBAR + 0x9000)
98
99 /*
100  * Diagnostics
101  */
102 #define CONFIG_SYS_ALT_MEMTEST
103 #define CONFIG_SYS_MEMTEST_START        0x10000000
104 #define CONFIG_SYS_MEMTEST_END          0x20000000
105
106 /*
107  * Memory map
108  * 0x0000_0000  0x7fff_ffff     DDR                     2G Cacheable
109  * 0x8000_0000  0xbfff_ffff     PCIe1 Mem               1G non-cacheable
110  * 0xc000_0000  0xcfff_ffff     PCIe2 Mem               256M non-cacheable
111  * 0xe000_0000  0xe7ff_ffff     SRAM/SSRAM/L1 Cache     128M non-cacheable
112  * 0xe800_0000  0xe87f_ffff     PCIe1 IO                8M non-cacheable
113  * 0xe880_0000  0xe8ff_ffff     PCIe2 IO                8M non-cacheable
114  * 0xef00_0000  0xef0f_ffff     CCSR/IMMR               1M non-cacheable
115  * 0xef80_0000  0xef8f_ffff     NAND Flash              1M non-cacheable
116  * 0xf000_0000  0xf7ff_ffff     NOR Flash 2             128M non-cacheable
117  * 0xf800_0000  0xffff_ffff     NOR Flash 1             128M non-cacheable
118  */
119
120 #define CONFIG_SYS_LBC_LCRR     (LCRR_CLKDIV_4 | LCRR_EADC_3)
121
122 /*
123  * NAND flash configuration
124  */
125 #define CONFIG_SYS_NAND_BASE            0xef800000
126 #define CONFIG_SYS_NAND_BASE2           0xef840000 /* Unused at this time */
127
128 /*
129  * NOR flash configuration
130  */
131 #define CONFIG_SYS_FLASH_BASE           0xf8000000
132 #define CONFIG_SYS_FLASH_BASE2          0xf0000000
133 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
134 #define CONFIG_SYS_MAX_FLASH_BANKS      2               /* number of banks */
135 #define CONFIG_SYS_MAX_FLASH_SECT       1024            /* sectors per device */
136 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000           /* Flash Erase Timeout (ms) */
137 #define CONFIG_SYS_FLASH_WRITE_TOUT     500             /* Flash Write Timeout (ms) */
138 #define CONFIG_FLASH_CFI_DRIVER
139 #define CONFIG_SYS_FLASH_CFI
140 #define CONFIG_SYS_FLASH_AUTOPROTECT_LIST       { {0xfff40000, 0xc0000}, \
141                                                   {0xf7f40000, 0xc0000} }
142 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE       /* start of monitor */
143
144 /*
145  * Chip select configuration
146  */
147 /* NOR Flash 0 on CS0 */
148 #define CONFIG_SYS_BR0_PRELIM   (CONFIG_SYS_FLASH_BASE  | \
149                                  BR_PS_16               | \
150                                  BR_V)
151 #define CONFIG_SYS_OR0_PRELIM   (OR_AM_128MB            | \
152                                  OR_GPCM_CSNT           | \
153                                  OR_GPCM_XACS           | \
154                                  OR_GPCM_ACS_DIV2       | \
155                                  OR_GPCM_SCY_8          | \
156                                  OR_GPCM_TRLX           | \
157                                  OR_GPCM_EHTR           | \
158                                  OR_GPCM_EAD)
159
160 /* NOR Flash 1 on CS1 */
161 #define CONFIG_SYS_BR1_PRELIM   (CONFIG_SYS_FLASH_BASE2 | \
162                                  BR_PS_16               | \
163                                  BR_V)
164 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_OR0_PRELIM
165
166 /* NAND flash on CS2 */
167 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_NAND_BASE   | \
168                                  (2<<BR_DECC_SHIFT)     | \
169                                  BR_PS_8                | \
170                                  BR_MS_FCM              | \
171                                  BR_V)
172
173 /* NAND flash on CS2 */
174 #define CONFIG_SYS_OR2_PRELIM   (OR_AM_256KB    | \
175                                  OR_FCM_PGS     | \
176                                  OR_FCM_CSCT    | \
177                                  OR_FCM_CST     | \
178                                  OR_FCM_CHT     | \
179                                  OR_FCM_SCY_1   | \
180                                  OR_FCM_TRLX    | \
181                                  OR_FCM_EHTR)
182
183 /* NAND flash on CS3 */
184 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_NAND_BASE2  | \
185                                  (2<<BR_DECC_SHIFT)     | \
186                                  BR_PS_8                | \
187                                  BR_MS_FCM              | \
188                                  BR_V)
189 #define CONFIG_SYS_OR3_PRELIM   CONFIG_SYS_OR2_PRELIM
190
191 /*
192  * Use L1 as initial stack
193  */
194 #define CONFIG_SYS_INIT_RAM_LOCK        1
195 #define CONFIG_SYS_INIT_RAM_ADDR        0xe0000000
196 #define CONFIG_SYS_INIT_RAM_END         0x00004000
197
198 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* num bytes initial data */
199 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
200 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
201
202 #define CONFIG_SYS_MONITOR_LEN          (512 * 1024)    /* Reserve 512 KB for Mon */
203 #define CONFIG_SYS_MALLOC_LEN           (1024 * 1024)   /* Reserved for malloc */
204
205 /*
206  * Serial Port
207  */
208 #define CONFIG_CONS_INDEX               1
209 #define CONFIG_SYS_NS16550
210 #define CONFIG_SYS_NS16550_SERIAL
211 #define CONFIG_SYS_NS16550_REG_SIZE     1
212 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
213 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
214 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
215 #define CONFIG_SYS_BAUDRATE_TABLE       \
216         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
217 #define CONFIG_BAUDRATE                 115200
218 #define CONFIG_LOADS_ECHO               1       /* echo on for serial download */
219 #define CONFIG_SYS_LOADS_BAUD_CHANGE    1       /* allow baudrate change */
220
221 /*
222  * Use the HUSH parser
223  */
224 #define CONFIG_SYS_HUSH_PARSER
225 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
226
227 /*
228  * Pass open firmware flat tree
229  */
230 #define CONFIG_OF_LIBFDT                1
231 #define CONFIG_OF_BOARD_SETUP           1
232 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
233
234 #define CONFIG_SYS_64BIT_VSPRINTF       1
235 #define CONFIG_SYS_64BIT_STRTOUL        1
236
237 /*
238  * I2C
239  */
240 #define CONFIG_FSL_I2C                          /* Use FSL common I2C driver */
241 #define CONFIG_HARD_I2C                         /* I2C with hardware support */
242 #define CONFIG_SYS_I2C_SPEED            400000  /* I2C speed and slave address */
243 #define CONFIG_SYS_I2C_SLAVE            0x7F
244 #define CONFIG_SYS_I2C_OFFSET           0x3000
245 #define CONFIG_SYS_I2C2_OFFSET          0x3100
246 #define CONFIG_I2C_MULTI_BUS
247
248 /* PEX8518 slave I2C interface */
249 #define CONFIG_SYS_I2C_PEX8518_ADDR     0x70
250
251 /* I2C DS1631 temperature sensor */
252 #define CONFIG_SYS_I2C_DS1621_ADDR      0x48
253 #define CONFIG_DTT_DS1621
254 #define CONFIG_DTT_SENSORS              { 0 }
255
256 /* I2C EEPROM - AT24C128B */
257 #define CONFIG_SYS_I2C_EEPROM_ADDR              0x54
258 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN          2
259 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS       6       /* 64 byte pages */
260 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS   10      /* take up to 10 msec */
261
262 /* I2C RTC */
263 #define CONFIG_RTC_M41T11               1
264 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
265 #define CONFIG_SYS_M41T11_BASE_YEAR     2000
266
267 /* GPIO/EEPROM/SRAM */
268 #define CONFIG_DS4510
269 #define CONFIG_SYS_I2C_DS4510_ADDR      0x51
270
271 /* GPIO */
272 #define CONFIG_PCA953X
273 #define CONFIG_SYS_I2C_PCA953X_ADDR0    0x18
274 #define CONFIG_SYS_I2C_PCA953X_ADDR1    0x1c
275 #define CONFIG_SYS_I2C_PCA953X_ADDR2    0x1e
276 #define CONFIG_SYS_I2C_PCA953X_ADDR3    0x1f
277 #define CONFIG_SYS_I2C_PCA953X_ADDR     CONFIG_SYS_I2C_PCA953X_ADDR0
278
279 /*
280  * PU = pulled high, PD = pulled low
281  * I = input, O = output, IO = input/output
282  */
283 /* PCA9557 @ 0x18*/
284 #define CONFIG_SYS_PCA953X_C0_SER0_EN           0x01 /* PU; UART0 enable (1: enabled) */
285 #define CONFIG_SYS_PCA953X_C0_SER0_MODE         0x02 /* PU; UART0 serial mode select */
286 #define CONFIG_SYS_PCA953X_C0_SER1_EN           0x04 /* PU; UART1 enable (1: enabled) */
287 #define CONFIG_SYS_PCA953X_C0_SER1_MODE         0x08 /* PU; UART1 serial mode select */
288 #define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS     0x10 /* PU; Boot flash CS select */
289 #define CONFIG_SYS_PCA953X_NVM_WP               0x20 /* PU; Set to 0 to enable NVM writing */
290 #define CONFIG_SYS_PCA953X_C0_VCORE_VID2        0x40 /* VID2 of ISL6262 */
291 #define CONFIG_SYS_PCA953X_C0_VCORE_VID3        0x80 /* VID3 of ISL6262 */
292
293 /* PCA9557 @ 0x1c*/
294 #define CONFIG_SYS_PCA953X_XMC0_ROOT0           0x01 /* PU; Low if XMC is RC */
295 #define CONFIG_SYS_PCA953X_XMC0_MVMR0           0x02 /* XMC EEPROM write protect */
296 #define CONFIG_SYS_PCA953X_XMC0_WAKE            0x04 /* PU; XMC wake */
297 #define CONFIG_SYS_PCA953X_XMC0_BIST            0x08 /* PU; XMC built in self test */
298 #define CONFIG_SYS_PCA953X_XMC_PRESENT          0x10 /* PU; Low if XMC module installed */
299 #define CONFIG_SYS_PCA953X_PMC_PRESENT          0x20 /* PU; Low if PMC module installed */
300 #define CONFIG_SYS_PCA953X_PMC0_MONARCH         0x40 /* PMC monarch mode enable */
301 #define CONFIG_SYS_PCA953X_PMC0_EREADY          0x80 /* PU; PMC PCI eready */
302
303 /* PCA9557 @ 0x1e*/
304 #define CONFIG_SYS_PCA953X_P0_GA0               0x01 /* PU; VPX Geographical address */
305 #define CONFIG_SYS_PCA953X_P0_GA1               0x02 /* PU; VPX Geographical address */
306 #define CONFIG_SYS_PCA953X_P0_GA2               0x04 /* PU; VPX Geographical address */
307 #define CONFIG_SYS_PCA953X_P0_GA3               0x08 /* PU; VPX Geographical address */
308 #define CONFIG_SYS_PCA953X_P0_GA4               0x10 /* PU; VPX Geographical address */
309 #define CONFIG_SYS_PCA953X_P0_GAP               0x20 /* PU; tied to VPX P0.GAP */
310 #define CONFIG_SYS_PCA953X_P1_SYSEN             0x80 /* PU; Pulled high; tied to VPX P1.SYSCON */
311
312 /* PCA9557 @ 0x1f */
313 #define CONFIG_SYS_PCA953X_GPIO_VPX0            0x01 /* PU */
314 #define CONFIG_SYS_PCA953X_GPIO_VPX1            0x02 /* PU */
315 #define CONFIG_SYS_PCA953X_GPIO_VPX2            0x04 /* PU */
316 #define CONFIG_SYS_PCA953X_GPIO_VPX3            0x08 /* PU */
317 #define CONFIG_SYS_PCA953X_VPX_FRU_WRCTL        0x10 /* PD; I2C master source for FRU SEEPROM */
318
319 /*
320  * General PCI
321  * Memory space is mapped 1-1, but I/O space must start from 0.
322  */
323 /* PCIE1 - VPX P1 */
324 #define CONFIG_SYS_PCIE1_MEM_BASE       0x80000000
325 #define CONFIG_SYS_PCIE1_MEM_PHYS       CONFIG_SYS_PCIE1_MEM_BASE
326 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x40000000      /* 1G */
327 #define CONFIG_SYS_PCIE1_IO_BASE        0x00000000
328 #define CONFIG_SYS_PCIE1_IO_PHYS        0xe8000000
329 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00800000      /* 8M */
330
331 /* PCIE2 - PEX8518 */
332 #define CONFIG_SYS_PCIE2_MEM_BASE       0xc0000000
333 #define CONFIG_SYS_PCIE2_MEM_PHYS       CONFIG_SYS_PCIE2_MEM_BASE
334 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x10000000      /* 256M */
335 #define CONFIG_SYS_PCIE2_IO_BASE        0x00000000
336 #define CONFIG_SYS_PCIE2_IO_PHYS        0xe8800000
337 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00800000      /* 8M */
338
339 /*
340  * Networking options
341  */
342 #define CONFIG_TSEC_ENET                /* tsec ethernet support */
343 #define CONFIG_PHY_GIGE         1       /* Include GbE speed/duplex detection */
344 #define CONFIG_NET_MULTI        1
345 #define CONFIG_TSEC_TBI
346 #define CONFIG_MII              1       /* MII PHY management */
347 #define CONFIG_MII_DEFAULT_TSEC 1       /* Allow unregistered phys */
348 #define CONFIG_ETHPRIME         "eTSEC2"
349
350 #define CONFIG_TSEC1            1
351 #define CONFIG_TSEC1_NAME       "eTSEC1"
352 #define TSEC1_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
353 #define TSEC1_PHY_ADDR          1
354 #define TSEC1_PHYIDX            0
355 #define CONFIG_HAS_ETH0
356
357 #define CONFIG_TSEC2            1
358 #define CONFIG_TSEC2_NAME       "eTSEC2"
359 #define TSEC2_FLAGS             (TSEC_GIGABIT | TSEC_REDUCED)
360 #define TSEC2_PHY_ADDR          2
361 #define TSEC2_PHYIDX            0
362 #define CONFIG_HAS_ETH1
363
364 /*
365  * Command configuration.
366  */
367 #include <config_cmd_default.h>
368
369 #define CONFIG_CMD_ASKENV
370 #define CONFIG_CMD_DATE
371 #define CONFIG_CMD_DHCP
372 #define CONFIG_CMD_DS4510
373 #define CONFIG_CMD_DS4510_INFO
374 #define CONFIG_CMD_DTT
375 #define CONFIG_CMD_EEPROM
376 #define CONFIG_CMD_ELF
377 #define CONFIG_CMD_SAVEENV
378 #define CONFIG_CMD_FLASH
379 #define CONFIG_CMD_I2C
380 #define CONFIG_CMD_JFFS2
381 #define CONFIG_CMD_MII
382 #define CONFIG_CMD_NET
383 #define CONFIG_CMD_PCA953X
384 #define CONFIG_CMD_PCA953X_INFO
385 #define CONFIG_CMD_PCI
386 #define CONFIG_CMD_PING
387 #define CONFIG_CMD_SNTP
388
389 /*
390  * Miscellaneous configurable options
391  */
392 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
393 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
394 #define CONFIG_SYS_PROMPT       "=> "           /* Monitor Command Prompt */
395 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
396 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
397 #define CONFIG_SYS_MAXARGS      16              /* max number of command args */
398 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE       /* Boot Argument Buffer Size */
399 #define CONFIG_SYS_HZ           1000            /* decrementer freq: 1ms ticks */
400 #define CONFIG_CMDLINE_EDITING  1               /* add command line history     */
401 #define CONFIG_LOADADDR         0x1000000       /* default location for tftp and bootm */
402 #define CONFIG_BOOTDELAY        3               /* -1 disables auto-boot */
403 #define CONFIG_PANIC_HANG                       /* do not reset board on panic */
404 #define CONFIG_PREBOOT                          /* enable preboot variable */
405 #define CONFIG_FIT              1
406 #define CONFIG_FIT_VERBOSE      1
407 #define CONFIG_INTEGRITY                        /* support booting INTEGRITY OS */
408
409 /*
410  * For booting Linux, the board info and command line data
411  * have to be in the first 16 MB of memory, since this is
412  * the maximum mapped by the Linux kernel during initialization.
413  */
414 #define CONFIG_SYS_BOOTMAPSZ    (16 << 20)      /* Initial Memory map for Linux*/
415
416 /*
417  * Boot Flags
418  */
419 #define BOOTFLAG_COLD           0x01            /* Normal Power-On: Boot from FLASH */
420 #define BOOTFLAG_WARM           0x02            /* Software reboot */
421
422 /*
423  * Environment Configuration
424  */
425 #define CONFIG_ENV_IS_IN_FLASH  1
426 #define CONFIG_ENV_SECT_SIZE    0x20000         /* 128k (one sector) for env */
427 #define CONFIG_ENV_SIZE         0x8000
428 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
429
430 /*
431  * Flash memory map:
432  * fff80000 - ffffffff     Pri U-Boot (512 KB)
433  * fff40000 - fff7ffff     Pri U-Boot Environment (256 KB)
434  * fff00000 - fff3ffff     Pri FDT (256KB)
435  * fef00000 - ffefffff     Pri OS image (16MB)
436  * f8000000 - feefffff     Pri OS Use/Filesystem (111MB)
437  *
438  * f7f80000 - f7ffffff     Sec U-Boot (512 KB)
439  * f7f40000 - f7f7ffff     Sec U-Boot Environment (256 KB)
440  * f7f00000 - f7f3ffff     Sec FDT (256KB)
441  * f6f00000 - f7efffff     Sec OS image (16MB)
442  * f0000000 - f6efffff     Sec OS Use/Filesystem (111MB)
443  */
444 #define CONFIG_UBOOT1_ENV_ADDR  MK_STR(0xfff80000)
445 #define CONFIG_UBOOT2_ENV_ADDR  MK_STR(0xf7f80000)
446 #define CONFIG_FDT1_ENV_ADDR    MK_STR(0xfff00000)
447 #define CONFIG_FDT2_ENV_ADDR    MK_STR(0xf7f00000)
448 #define CONFIG_OS1_ENV_ADDR     MK_STR(0xfef00000)
449 #define CONFIG_OS2_ENV_ADDR     MK_STR(0xf6f00000)
450
451 #define CONFIG_PROG_UBOOT1                                              \
452         "$download_cmd $loadaddr $ubootfile; "                          \
453         "if test $? -eq 0; then "                                       \
454                 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; "         \
455                 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; "               \
456                 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; "       \
457                 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; "          \
458                 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; "      \
459                 "if test $? -ne 0; then "                               \
460                         "echo PROGRAM FAILED; "                         \
461                 "else; "                                                \
462                         "echo PROGRAM SUCCEEDED; "                      \
463                 "fi; "                                                  \
464         "else; "                                                        \
465                 "echo DOWNLOAD FAILED; "                                \
466         "fi;"
467
468 #define CONFIG_PROG_UBOOT2                                              \
469         "$download_cmd $loadaddr $ubootfile; "                          \
470         "if test $? -eq 0; then "                                       \
471                 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; "         \
472                 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; "               \
473                 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; "       \
474                 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; "          \
475                 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; "      \
476                 "if test $? -ne 0; then "                               \
477                         "echo PROGRAM FAILED; "                         \
478                 "else; "                                                \
479                         "echo PROGRAM SUCCEEDED; "                      \
480                 "fi; "                                                  \
481         "else; "                                                        \
482                 "echo DOWNLOAD FAILED; "                                \
483         "fi;"
484
485 #define CONFIG_BOOT_OS_NET                                              \
486         "$download_cmd $osaddr $osfile; "                               \
487         "if test $? -eq 0; then "                                       \
488                 "if test -n $fdtaddr; then "                            \
489                         "$download_cmd $fdtaddr $fdtfile; "             \
490                         "if test $? -eq 0; then "                       \
491                                 "bootm $osaddr - $fdtaddr; "            \
492                         "else; "                                        \
493                                 "echo FDT DOWNLOAD FAILED; "            \
494                         "fi; "                                          \
495                 "else; "                                                \
496                         "bootm $osaddr; "                               \
497                 "fi; "                                                  \
498         "else; "                                                        \
499                 "echo OS DOWNLOAD FAILED; "                             \
500         "fi;"
501
502 #define CONFIG_PROG_OS1                                                 \
503         "$download_cmd $osaddr $osfile; "                               \
504         "if test $? -eq 0; then "                                       \
505                 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; "              \
506                 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "        \
507                 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; "       \
508                 "if test $? -ne 0; then "                               \
509                         "echo OS PROGRAM FAILED; "                      \
510                 "else; "                                                \
511                         "echo OS PROGRAM SUCCEEDED; "                   \
512                 "fi; "                                                  \
513         "else; "                                                        \
514                 "echo OS DOWNLOAD FAILED; "                             \
515         "fi;"
516
517 #define CONFIG_PROG_OS2                                                 \
518         "$download_cmd $osaddr $osfile; "                               \
519         "if test $? -eq 0; then "                                       \
520                 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; "              \
521                 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "        \
522                 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; "       \
523                 "if test $? -ne 0; then "                               \
524                         "echo OS PROGRAM FAILED; "                      \
525                 "else; "                                                \
526                         "echo OS PROGRAM SUCCEEDED; "                   \
527                 "fi; "                                                  \
528         "else; "                                                        \
529                 "echo OS DOWNLOAD FAILED; "                             \
530         "fi;"
531
532 #define CONFIG_PROG_FDT1                                                \
533         "$download_cmd $fdtaddr $fdtfile; "                             \
534         "if test $? -eq 0; then "                                       \
535                 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;"              \
536                 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "      \
537                 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; "     \
538                 "if test $? -ne 0; then "                               \
539                         "echo FDT PROGRAM FAILED; "                     \
540                 "else; "                                                \
541                         "echo FDT PROGRAM SUCCEEDED; "                  \
542                 "fi; "                                                  \
543         "else; "                                                        \
544                 "echo FDT DOWNLOAD FAILED; "                            \
545         "fi;"
546
547 #define CONFIG_PROG_FDT2                                                \
548         "$download_cmd $fdtaddr $fdtfile; "                             \
549         "if test $? -eq 0; then "                                       \
550                 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;"              \
551                 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "      \
552                 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; "     \
553                 "if test $? -ne 0; then "                               \
554                         "echo FDT PROGRAM FAILED; "                     \
555                 "else; "                                                \
556                         "echo FDT PROGRAM SUCCEEDED; "                  \
557                 "fi; "                                                  \
558         "else; "                                                        \
559                 "echo FDT DOWNLOAD FAILED; "                            \
560         "fi;"
561
562 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
563         "autoload=yes\0"                                                \
564         "download_cmd=tftp\0"                                           \
565         "console_args=console=ttyS0,115200\0"                           \
566         "root_args=root=/dev/nfs rw\0"                                  \
567         "misc_args=ip=on\0"                                             \
568         "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
569         "bootfile=/home/user/file\0"                                    \
570         "osfile=/home/user/uImage-XPedite5370\0"                        \
571         "fdtfile=/home/user/xpedite5370.dtb\0"                          \
572         "ubootfile=/home/user/u-boot.bin\0"                             \
573         "fdtaddr=c00000\0"                                              \
574         "osaddr=0x1000000\0"                                            \
575         "loadaddr=0x1000000\0"                                          \
576         "prog_uboot1="CONFIG_PROG_UBOOT1"\0"                            \
577         "prog_uboot2="CONFIG_PROG_UBOOT2"\0"                            \
578         "prog_os1="CONFIG_PROG_OS1"\0"                                  \
579         "prog_os2="CONFIG_PROG_OS2"\0"                                  \
580         "prog_fdt1="CONFIG_PROG_FDT1"\0"                                \
581         "prog_fdt2="CONFIG_PROG_FDT2"\0"                                \
582         "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0"          \
583         "bootcmd_flash1=run set_bootargs; "                             \
584                 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
585         "bootcmd_flash2=run set_bootargs; "                             \
586                 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
587         "bootcmd=run bootcmd_flash1\0"
588 #endif  /* __CONFIG_H */