2 * (C) Copyright 2002, 2003
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <garyj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the MPL VCMA9 board.
10 * SPDX-License-Identifier: GPL-2.0+
17 #define MACH_TYPE_MPL_VCMA9 227
20 * High Level Configuration Options
23 #define CONFIG_ARM920T /* This is an ARM920T Core */
24 #define CONFIG_S3C24X0 /* in a SAMSUNG S3C24x0-type SoC */
25 #define CONFIG_S3C2410 /* specifically a SAMSUNG S3C2410 SoC */
26 #define CONFIG_VCMA9 /* on a MPL VCMA9 Board */
27 #define CONFIG_MACH_TYPE MACH_TYPE_MPL_VCMA9 /* Machine type */
29 #define CONFIG_SYS_TEXT_BASE 0x0
31 #define CONFIG_SYS_GENERIC_BOARD
33 #define CONFIG_SYS_ARM_CACHE_WRITETHROUGH
35 /* input clock of PLL (VCMA9 has 12MHz input clock) */
36 #define CONFIG_SYS_CLK_FREQ 12000000
38 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
39 #define CONFIG_SETUP_MEMORY_TAGS
40 #define CONFIG_INITRD_TAG
45 #define CONFIG_BOOTP_BOOTFILESIZE
46 #define CONFIG_BOOTP_BOOTPATH
47 #define CONFIG_BOOTP_GATEWAY
48 #define CONFIG_BOOTP_HOSTNAME
51 * Command line configuration.
53 #include <config_cmd_default.h>
55 #define CONFIG_CMD_CACHE
56 #define CONFIG_CMD_EEPROM
57 #define CONFIG_CMD_I2C
58 #define CONFIG_CMD_USB
59 #define CONFIG_CMD_REGINFO
60 #define CONFIG_CMD_DATE
61 #define CONFIG_CMD_ELF
62 #define CONFIG_CMD_DHCP
63 #define CONFIG_CMD_PING
64 #define CONFIG_CMD_BSP
65 #define CONFIG_CMD_NAND
66 #define CONFIG_CMD_NAND_YAFFS
68 #define CONFIG_BOARD_LATE_INIT
70 #define CONFIG_SYS_HUSH_PARSER
71 #define CONFIG_CMDLINE_EDITING
75 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
76 * address 0x50 with 16bit addressing
78 #define CONFIG_SYS_I2C
80 /* we use the built-in I2C controller */
81 #define CONFIG_SYS_I2C_S3C24X0
82 #define CONFIG_SYS_I2C_S3C24X0_SPEED 100000 /* I2C speed */
83 #define CONFIG_SYS_I2C_S3C24X0_SLAVE 0x7F /* I2C slave addr */
85 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
86 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
87 /* use EEPROM for environment vars */
88 #define CONFIG_ENV_IS_IN_EEPROM 1
89 /* environment starts at offset 0 */
90 #define CONFIG_ENV_OFFSET 0x000
91 /* 2KB should be more than enough */
92 #define CONFIG_ENV_SIZE 0x800
94 #undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
95 /* 64 bytes page write mode on 24C256 */
96 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
97 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
102 #define CONFIG_CS8900 /* we have a CS8900 on-board */
103 #define CONFIG_CS8900_BASE 0x20000300
104 #define CONFIG_CS8900_BUS16
107 * select serial console configuration
109 #define CONFIG_S3C24X0_SERIAL
110 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
112 /* USB support (currently only works with D-cache off) */
113 #define CONFIG_USB_OHCI
114 #define CONFIG_USB_OHCI_S3C24XX
115 #define CONFIG_USB_KEYBOARD
116 #define CONFIG_USB_STORAGE
117 #define CONFIG_DOS_PARTITION
119 /* Enable needed helper functions */
120 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
123 #define CONFIG_RTC_S3C24X0
126 /* allow to overwrite serial and ethaddr */
127 #define CONFIG_ENV_OVERWRITE
129 #define CONFIG_BAUDRATE 9600
131 #define CONFIG_BOOTDELAY 5
132 #define CONFIG_BOOT_RETRY_TIME -1
133 #define CONFIG_RESET_TO_RETRY
134 #define CONFIG_ZERO_BOOTDELAY_CHECK
136 #define CONFIG_NETMASK 255.255.255.0
137 #define CONFIG_IPADDR 10.0.0.110
138 #define CONFIG_SERVERIP 10.0.0.1
140 #if defined(CONFIG_CMD_KGDB)
141 /* speed to run kgdb serial port */
142 #define CONFIG_KGDB_BAUDRATE 115200
145 /* Miscellaneous configurable options */
146 #define CONFIG_SYS_LONGHELP /* undef to save memory */
147 #define CONFIG_SYS_PROMPT "VCMA9 # "
148 #define CONFIG_SYS_CBSIZE 256
149 /* Print Buffer Size */
150 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
151 #define CONFIG_SYS_MAXARGS 16
152 /* Boot Argument Buffer Size */
153 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
155 #define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
156 #define CONFIG_DISPLAY_BOARDINFO /* Display board info */
158 #define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
159 #define CONFIG_SYS_MEMTEST_END 0x31FFFFFF /* 32 MB in DRAM */
161 #define CONFIG_SYS_ALT_MEMTEST
162 #define CONFIG_SYS_LOAD_ADDR 0x30800000
164 /* we configure PWM Timer 4 to 1ms 1000Hz */
166 /* support additional compression methods */
172 /*#define VERSION_TAG "released"*/
173 #define VERSION_TAG "unstable"
174 #define CONFIG_IDENT_STRING "\n(c) 2003 - 2011 by MPL AG Switzerland, " \
175 "MEV-10080-001 " VERSION_TAG
177 /* Physical Memory Map */
178 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
179 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
180 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
182 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
184 /* FLASH and environment organization */
186 #define CONFIG_SYS_FLASH_CFI
187 #define CONFIG_FLASH_CFI_DRIVER
188 #define CONFIG_FLASH_CFI_LEGACY
189 #define CONFIG_SYS_FLASH_LEGACY_512Kx16
190 #define CONFIG_FLASH_SHOW_PROGRESS 45
191 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
192 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
193 #define CONFIG_SYS_MAX_FLASH_SECT (19)
196 * Size of malloc() pool
197 * BZIP2 / LZO / LZMA need a lot of RAM
199 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
200 #define CONFIG_SYS_MONITOR_LEN (512 * 1024)
201 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
203 /* NAND configuration */
204 #ifdef CONFIG_CMD_NAND
205 #define CONFIG_NAND_S3C2410
206 #define CONFIG_SYS_S3C2410_NAND_HWECC
207 #define CONFIG_SYS_MAX_NAND_DEVICE 1
208 #define CONFIG_SYS_NAND_BASE 0x4E000000
209 #define CONFIG_S3C24XX_CUSTOM_NAND_TIMING
210 #define CONFIG_S3C24XX_TACLS 1
211 #define CONFIG_S3C24XX_TWRPH0 5
212 #define CONFIG_S3C24XX_TWRPH1 3
215 #define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
218 #define CONFIG_CMD_FAT
219 #define CONFIG_CMD_UBI
220 #define CONFIG_CMD_UBIFS
221 #define CONFIG_CMD_JFFS2
222 #define CONFIG_YAFFS2
223 #define CONFIG_RBTREE
224 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
225 #define CONFIG_MTD_PARTITIONS
226 #define CONFIG_CMD_MTDPARTS
229 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
230 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
231 GENERATED_GBL_DATA_SIZE)
233 #define CONFIG_BOARD_EARLY_INIT_F
235 #endif /* __CONFIG_H */