powerpc/mpc85xx: Add board support for ucp1020
[oweals/u-boot.git] / include / configs / UCP1020.h
1 /*
2  * Copyright 2013-2015 Arcturus Networks, Inc.
3  *           http://www.arcturusnetworks.com/products/ucp1020/
4  * based on include/configs/p1_p2_rdb_pc.h
5  * original copyright follows:
6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 /*
12  * QorIQ uCP1020-xx boards configuration file
13  */
14 #ifndef __CONFIG_H
15 #define __CONFIG_H
16
17 #define CONFIG_SYS_GENERIC_BOARD
18 #define CONFIG_DISPLAY_BOARDINFO
19
20 #define CONFIG_FSL_ELBC
21 #define CONFIG_PCI
22 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
23 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
24 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
25 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
26 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
27 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
28
29 #if defined(CONFIG_TARTGET_UCP1020T1)
30
31 #define CONFIG_UCP1020_REV_1_3
32
33 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
34 #define CONFIG_P1020
35
36 #define CONFIG_TSEC_ENET
37 #define CONFIG_TSEC1
38 #define CONFIG_TSEC3
39 #define CONFIG_HAS_ETH0
40 #define CONFIG_HAS_ETH1
41 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
42 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
43 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
44 #define CONFIG_IPADDR           10.80.41.229
45 #define CONFIG_SERVERIP         10.80.41.227
46 #define CONFIG_NETMASK          255.255.252.0
47 #define CONFIG_ETHPRIME         "eTSEC3"
48
49 #ifndef CONFIG_SPI_FLASH
50 #define CONFIG_SPI_FLASH        y
51 #endif
52 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
53
54 #define CONFIG_MMC
55 #define CONFIG_SYS_L2_SIZE      (256 << 10)
56
57 #define CONFIG_LAST_STAGE_INIT
58
59 #if !defined(CONFIG_DONGLE)
60 #define CONFIG_SILENT_CONSOLE
61 #endif
62
63 #endif
64
65 #if defined(CONFIG_TARGET_UCP1020)
66
67 #define CONFIG_UCP1020
68 #define CONFIG_UCP1020_REV_1_3
69
70 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
71 #define CONFIG_P1020
72
73 #define CONFIG_TSEC_ENET
74 #define CONFIG_TSEC1
75 #define CONFIG_TSEC2
76 #define CONFIG_TSEC3
77 #define CONFIG_HAS_ETH0
78 #define CONFIG_HAS_ETH1
79 #define CONFIG_HAS_ETH2
80 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
81 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
82 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
83 #define CONFIG_IPADDR           192.168.1.81
84 #define CONFIG_IPADDR1          192.168.1.82
85 #define CONFIG_IPADDR2          192.168.1.83
86 #define CONFIG_SERVERIP         192.168.1.80
87 #define CONFIG_GATEWAYIP        102.168.1.1
88 #define CONFIG_NETMASK          255.255.255.0
89 #define CONFIG_ETHPRIME         "eTSEC1"
90
91 #ifndef CONFIG_SPI_FLASH
92 #define CONFIG_SPI_FLASH        y
93 #endif
94 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
95
96 #define CONFIG_MMC
97 #define CONFIG_SYS_L2_SIZE      (256 << 10)
98
99 #define CONFIG_LAST_STAGE_INIT
100
101 #endif
102
103 #ifdef CONFIG_SDCARD
104 #define CONFIG_RAMBOOT_SDCARD
105 #define CONFIG_SYS_RAMBOOT
106 #define CONFIG_SYS_EXTRA_ENV_RELOC
107 #define CONFIG_SYS_TEXT_BASE            0x11000000
108 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
109 #endif
110
111 #ifdef CONFIG_SPIFLASH
112 #define CONFIG_RAMBOOT_SPIFLASH
113 #define CONFIG_SYS_RAMBOOT
114 #define CONFIG_SYS_EXTRA_ENV_RELOC
115 #define CONFIG_SYS_TEXT_BASE            0x11000000
116 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
117 #endif
118
119 #ifndef CONFIG_SYS_TEXT_BASE
120 #define CONFIG_SYS_TEXT_BASE            0xeff80000
121 #endif
122 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
123
124 #ifndef CONFIG_RESET_VECTOR_ADDRESS
125 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
126 #endif
127
128 #ifndef CONFIG_SYS_MONITOR_BASE
129 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
130 #endif
131
132 /* High Level Configuration Options */
133 #define CONFIG_BOOKE
134 #define CONFIG_E500
135 /* #define CONFIG_MPC85xx */
136
137 #define CONFIG_MP
138
139 #define CONFIG_FSL_LAW
140
141 #define CONFIG_ENV_OVERWRITE
142
143 #define CONFIG_CMD_SATA
144 #define CONFIG_SATA_SIL
145 #define CONFIG_SYS_SATA_MAX_DEVICE      2
146 #define CONFIG_LIBATA
147 #define CONFIG_LBA48
148
149 #define CONFIG_SYS_CLK_FREQ     66666666
150 #define CONFIG_DDR_CLK_FREQ     66666666
151
152 #define CONFIG_HWCONFIG
153
154 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
155 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
156 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
157 /*
158  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
159  * there will be one entry in this array for each two (dummy) sensors in
160  * CONFIG_DTT_SENSORS.
161  *
162  * For uCP1020 module:
163  * - only one ADM1021/NCT72
164  * - i2c addr 0x41
165  * - conversion rate 0x02 = 0.25 conversions/second
166  * - ALERT output disabled
167  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
168  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
169  */
170 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
171                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
172
173 #define CONFIG_CMD_DTT
174
175 /*
176  * These can be toggled for performance analysis, otherwise use default.
177  */
178 #define CONFIG_L2_CACHE
179 #define CONFIG_BTB
180
181 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
182
183 #define CONFIG_ENABLE_36BIT_PHYS
184
185 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
186 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
187 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
188
189 #define CONFIG_SYS_CCSRBAR              0xffe00000
190 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
191
192 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
193        SPL code*/
194 #ifdef CONFIG_SPL_BUILD
195 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
196 #endif
197
198 /* DDR Setup */
199 #define CONFIG_DDR_ECC_ENABLE
200 #define CONFIG_SYS_FSL_DDR3
201 #ifndef CONFIG_DDR_ECC_ENABLE
202 #define CONFIG_SYS_DDR_RAW_TIMING
203 #define CONFIG_DDR_SPD
204 #endif
205 #define CONFIG_SYS_SPD_BUS_NUM 1
206 #undef CONFIG_FSL_DDR_INTERACTIVE
207
208 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
209 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
210 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
211 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
212 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
213
214 #define CONFIG_NUM_DDR_CONTROLLERS      1
215 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
216
217 /* Default settings for DDR3 */
218 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
219 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
220 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
221 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
222 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
223 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
224
225 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
226 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
227 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
228 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
229
230 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
231 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
232 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
233 #define CONFIG_SYS_DDR_RCW_1            0x00000000
234 #define CONFIG_SYS_DDR_RCW_2            0x00000000
235 #ifdef CONFIG_DDR_ECC_ENABLE
236 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
237 #else
238 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
239 #endif
240 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
241 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
242 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
243
244 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
245 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
246 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
247 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
248 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
249 #define CONFIG_SYS_DDR_MODE_1           0x40461520
250 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
251 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
252
253 #undef CONFIG_CLOCKS_IN_MHZ
254
255 /*
256  * Memory map
257  *
258  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
259  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
260  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
261  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
262  *   (early boot only)
263  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
264  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
265  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
266  */
267
268 /*
269  * Local Bus Definitions
270  */
271 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
272 #define CONFIG_SYS_FLASH_BASE           0xec000000
273
274 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
275
276 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
277         | BR_PS_16 | BR_V)
278
279 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
280
281 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
282 #define CONFIG_SYS_FLASH_QUIET_TEST
283 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
284
285 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
286
287 #undef CONFIG_SYS_FLASH_CHECKSUM
288 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
289 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
290
291 #define CONFIG_FLASH_CFI_DRIVER
292 #define CONFIG_SYS_FLASH_CFI
293 #define CONFIG_SYS_FLASH_EMPTY_INFO
294 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
295
296 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
297
298 #define CONFIG_SYS_INIT_RAM_LOCK
299 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
300 /* Initial L1 address */
301 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
302 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
303 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
304 /* Size of used area in RAM */
305 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
306
307 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
308                                         GENERATED_GBL_DATA_SIZE)
309 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
310
311 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
312 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
313
314 #define CONFIG_SYS_PMC_BASE     0xff980000
315 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
316 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
317                                         BR_PS_8 | BR_V)
318 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
319                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
320                                  OR_GPCM_EAD)
321
322 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
323 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
324 #ifdef CONFIG_NAND_FSL_ELBC
325 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
326 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
327 #endif
328
329 /* Serial Port - controlled on board with jumper J8
330  * open - index 2
331  * shorted - index 1
332  */
333 #define CONFIG_CONS_INDEX               1
334 #undef CONFIG_SERIAL_SOFTWARE_FIFO
335 #define CONFIG_SYS_NS16550
336 #define CONFIG_SYS_NS16550_SERIAL
337 #define CONFIG_SYS_NS16550_REG_SIZE     1
338 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
339 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
340 #define CONFIG_NS16550_MIN_FUNCTIONS
341 #endif
342
343 #define CONFIG_SYS_BAUDRATE_TABLE       \
344         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
345
346 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
347 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
348
349 /* Use the HUSH parser */
350 #define CONFIG_SYS_HUSH_PARSER
351
352 /*
353  * Pass open firmware flat tree
354  */
355 #define CONFIG_OF_LIBFDT
356 #define CONFIG_OF_BOARD_SETUP
357 #define CONFIG_OF_STDOUT_VIA_ALIAS
358
359 /* new uImage format support */
360 #define CONFIG_FIT
361 #define CONFIG_FIT_VERBOSE      /* enable fit_format_{error,warning}() */
362
363 /* I2C */
364 #define CONFIG_SYS_I2C
365 #define CONFIG_SYS_I2C_FSL
366 #define CONFIG_SYS_FSL_I2C_SPEED        400000
367 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
368 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
369 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
370 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
371 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
372 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
373 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
374
375 #define CONFIG_RTC_DS1337
376 #define CONFIG_SYS_RTC_DS1337_NOOSC
377 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
378 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
379 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
380 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
381
382 /*
383  * eSPI - Enhanced SPI
384  */
385 #define CONFIG_HARD_SPI
386 #define CONFIG_FSL_ESPI
387
388 #define CONFIG_SPI_FLASH_SST            1
389 #define CONFIG_SPI_FLASH_STMICRO        1
390 #define CONFIG_SPI_FLASH_WINBOND        1
391 #define CONFIG_CMD_SF                   1
392 #define CONFIG_CMD_SPI                  1
393 #define CONFIG_SF_DEFAULT_SPEED         10000000
394 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
395
396 #if defined(CONFIG_PCI)
397 /*
398  * General PCI
399  * Memory space is mapped 1-1, but I/O space must start from 0.
400  */
401
402 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
403 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
404 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
405 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
406 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
407 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
408 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
409 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
410 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
411 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
412
413 /* controller 1, Slot 2, tgtid 1, Base address a000 */
414 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
415 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
416 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
417 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
418 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
419 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
420 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
421 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
422 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
423
424 #define CONFIG_PCI_PNP  /* do pci plug-and-play */
425 #define CONFIG_E1000    /* Defind e1000 pci Ethernet card*/
426 #define CONFIG_CMD_PCI
427 #define CONFIG_CMD_NET
428
429 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
430 #define CONFIG_DOS_PARTITION
431 #endif /* CONFIG_PCI */
432
433 /*
434  * Environment
435  */
436 #ifdef CONFIG_ENV_FIT_UCBOOT
437
438 #define CONFIG_ENV_IS_IN_FLASH
439 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
440 #define CONFIG_ENV_SIZE         0x20000
441 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
442
443 #else
444
445 #define CONFIG_ENV_SPI_BUS      0
446 #define CONFIG_ENV_SPI_CS       0
447 #define CONFIG_ENV_SPI_MAX_HZ   10000000
448 #define CONFIG_ENV_SPI_MODE     0
449
450 #ifdef CONFIG_RAMBOOT_SPIFLASH
451
452 #define CONFIG_ENV_IS_IN_SPI_FLASH
453 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
454 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
455 #define CONFIG_ENV_SECT_SIZE    0x1000
456
457 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
458 /* Address and size of Redundant Environment Sector     */
459 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
460 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
461 #endif
462
463 #elif defined(CONFIG_RAMBOOT_SDCARD)
464 #define CONFIG_ENV_IS_IN_MMC
465 #define CONFIG_FSL_FIXED_MMC_LOCATION
466 #define CONFIG_ENV_SIZE         0x2000
467 #define CONFIG_SYS_MMC_ENV_DEV  0
468
469 #elif defined(CONFIG_SYS_RAMBOOT)
470 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
471 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
472 #define CONFIG_ENV_SIZE         0x2000
473
474 #else
475 #define CONFIG_ENV_IS_IN_FLASH
476 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
477 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
478 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
479 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
480 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
481 /* Address and size of Redundant Environment Sector     */
482 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
483 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
484 #endif
485
486 #endif
487
488 #endif  /* CONFIG_ENV_FIT_UCBOOT */
489
490 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
491 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
492
493 /*
494  * Command line configuration.
495  */
496 #include <config_cmd_default.h>
497
498 #define CONFIG_CMD_IRQ
499 #define CONFIG_CMD_PING
500 #define CONFIG_CMD_I2C
501 #define CONFIG_CMD_MII
502 #define CONFIG_CMD_DATE
503 #define CONFIG_CMD_ELF
504 #define CONFIG_CMD_I2C
505 #define CONFIG_CMD_IRQ
506 #define CONFIG_CMD_MII
507 #define CONFIG_CMD_PING
508 #define CONFIG_CMD_SETEXPR
509 #define CONFIG_CMD_REGINFO
510 #define CONFIG_CMD_ERRATA
511 #define CONFIG_CMD_CRAMFS
512 #define CONFIG_CRAMFS_CMDLINE
513
514 /*
515  * USB
516  */
517 #define CONFIG_HAS_FSL_DR_USB
518
519 #if defined(CONFIG_HAS_FSL_DR_USB)
520 #define CONFIG_USB_EHCI
521
522 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
523
524 #ifdef CONFIG_USB_EHCI
525 #define CONFIG_CMD_USB
526 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
527 #define CONFIG_USB_EHCI_FSL
528 #define CONFIG_USB_STORAGE
529 #endif
530 #endif
531
532 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
533
534 #ifdef CONFIG_MMC
535 #define CONFIG_FSL_ESDHC
536 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
537 #define CONFIG_CMD_MMC
538 #define CONFIG_MMC_SPI
539 #define CONFIG_CMD_MMC_SPI
540 #define CONFIG_GENERIC_MMC
541 #endif
542
543 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
544 #define CONFIG_CMD_EXT2
545 #define CONFIG_CMD_FAT
546 #define CONFIG_DOS_PARTITION
547 #endif
548
549 /* Misc Extra Settings */
550 #define CONFIG_CMD_GPIO                 1
551 #undef CONFIG_WATCHDOG  /* watchdog disabled */
552
553 /*
554  * Miscellaneous configurable options
555  */
556 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
557 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
558 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
559 #define CONFIG_SYS_PROMPT       "B$ "           /* Monitor Command Prompt */
560 #if defined(CONFIG_CMD_KGDB)
561 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
562 #else
563 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
564 #endif
565 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
566         /* Print Buffer Size */
567 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
568 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
569 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
570
571 /*
572  * For booting Linux, the board info and command line data
573  * have to be in the first 64 MB of memory, since this is
574  * the maximum mapped by the Linux kernel during initialization.
575  */
576 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
577 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
578
579 #if defined(CONFIG_CMD_KGDB)
580 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
581 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
582 #endif
583
584 /*
585  * Environment Configuration
586  */
587
588 #if defined(CONFIG_TSEC_ENET)
589
590 #if defined(CONFIG_UCP1020_REV_1_2)
591 #define CONFIG_PHY_MICREL_KSZ9021
592 #elif defined(CONFIG_UCP1020_REV_1_3)
593 #define CONFIG_PHY_MICREL_KSZ9031
594 #else
595 #error "UCP1020 module revision is not defined !!!"
596 #endif
597
598 #define CONFIG_CMD_DHCP
599 #define CONFIG_BOOTP_SERVERIP
600
601 #define CONFIG_MII              /* MII PHY management */
602 #define CONFIG_TSEC1_NAME       "eTSEC1"
603 #define CONFIG_TSEC2_NAME       "eTSEC2"
604 #define CONFIG_TSEC3_NAME       "eTSEC3"
605
606 #define TSEC1_PHY_ADDR  4
607 #define TSEC2_PHY_ADDR  0
608 #define TSEC2_PHY_ADDR_SGMII    0x00
609 #define TSEC3_PHY_ADDR  6
610
611 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
612 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
613 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
614
615 #define TSEC1_PHYIDX    0
616 #define TSEC2_PHYIDX    0
617 #define TSEC3_PHYIDX    0
618
619 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
620
621 #endif
622
623 #define CONFIG_HOSTNAME         UCP1020
624 #define CONFIG_ROOTPATH         "/opt/nfsroot"
625 #define CONFIG_BOOTFILE         "uImage"
626 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
627
628 /* default location for tftp and bootm */
629 #define CONFIG_LOADADDR         1000000
630
631 /*
632  * Autobooting
633  */
634 #define CONFIG_AUTOBOOT_KEYED
635 #define CONFIG_AUTOBOOT_STOP_STR        "\x1b"
636 #define DEBUG_BOOTKEYS                  0
637 #undef CONFIG_AUTOBOOT_DELAY_STR
638 #undef CONFIG_BOOTARGS
639 #define CONFIG_AUTOBOOT_PROMPT  "Autobooting in %d seconds, "   \
640                                 "press \"<Esc>\" to stop\n", bootdelay
641
642 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
643
644 #define CONFIG_BAUDRATE 115200
645
646 #if defined(CONFIG_DONGLE)
647
648 #define CONFIG_BOOTDELAY 1      /* autoboot after 1 seconds */
649 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
650 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
651 "bootfile=uImage\0"                                                     \
652 "consoledev=ttyS0\0"                                                    \
653 "cramfsfile=image.cramfs\0"                                             \
654 "dtbaddr=0x00c00000\0"                                                  \
655 "dtbfile=image.dtb\0"                                                   \
656 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
657 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
658 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
659 "fileaddr=0x01000000\0"                                                 \
660 "filesize=0x00080000\0"                                                 \
661 "flashmbr=sf probe 0; "                                                 \
662         "tftp $loadaddr $mbr; "                                         \
663         "sf erase $mbr_offset +$filesize; "                             \
664         "sf write $loadaddr $mbr_offset $filesize\0"                    \
665 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
666         "protect off $nor_recoveryaddr +$filesize; "                    \
667         "erase $nor_recoveryaddr +$filesize; "                          \
668         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
669         "protect on $nor_recoveryaddr +$filesize\0 "                    \
670 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
671         "protect off $nor_ubootaddr +$filesize; "                       \
672         "erase $nor_ubootaddr +$filesize; "                             \
673         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
674         "protect on $nor_ubootaddr +$filesize\0 "                       \
675 "flashworking=tftp $workingaddr $cramfsfile; "                          \
676         "protect off $nor_workingaddr +$filesize; "                     \
677         "erase $nor_workingaddr +$filesize; "                           \
678         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
679         "protect on $nor_workingaddr +$filesize\0 "                     \
680 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
681 "kerneladdr=0x01100000\0"                                               \
682 "kernelfile=uImage\0"                                                   \
683 "loadaddr=0x01000000\0"                                                 \
684 "mbr=uCP1020d.mbr\0"                                                    \
685 "mbr_offset=0x00000000\0"                                               \
686 "mmbr=uCP1020Quiet.mbr\0"                                               \
687 "mmcpart=0:2\0"                                                         \
688 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
689         "mmc erase 1 1; "                                               \
690         "mmc write $loadaddr 1 1\0"                                     \
691 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
692         "mmc erase 0x40 0x400; "                                        \
693         "mmc write $loadaddr 0x40 0x400\0"                              \
694 "netdev=eth0\0"                                                         \
695 "nor_recoveryaddr=0xEC0A0000\0"                                         \
696 "nor_ubootaddr=0xEFF80000\0"                                            \
697 "nor_workingaddr=0xECFA0000\0"                                          \
698 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
699         " console=$consoledev,$baudrate $othbootargs; "                 \
700         "run norloadrecovery; "                                         \
701         "bootm $kerneladdr - $dtbaddr\0"                                \
702 "norbootworking=setenv bootargs $workingbootargs"                       \
703         " console=$consoledev,$baudrate $othbootargs; "                 \
704         "run norloadworking; "                                          \
705         "bootm $kerneladdr - $dtbaddr\0"                                \
706 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
707         "setenv cramfsaddr $nor_recoveryaddr; "                         \
708         "cramfsload $dtbaddr $dtbfile; "                                \
709         "cramfsload $kerneladdr $kernelfile\0"                          \
710 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
711         "setenv cramfsaddr $nor_workingaddr; "                          \
712         "cramfsload $dtbaddr $dtbfile; "                                \
713         "cramfsload $kerneladdr $kernelfile\0"                          \
714 "prog_spi_mbr=run spi__mbr\0"                                           \
715 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
716 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
717         "run spi__cramfs\0"                                             \
718 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
719         " console=$consoledev,$baudrate $othbootargs; "                 \
720         "tftp $rootfsaddr $rootfsfile; "                                \
721         "tftp $loadaddr $kernelfile; "                                  \
722         "tftp $dtbaddr $dtbfile; "                                      \
723         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
724 "ramdisk_size=120000\0"                                                 \
725 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
726 "recoveryaddr=0x02F00000\0"                                             \
727 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
728 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
729         "mw.l 0xffe0f008 0x00400000\0"                                  \
730 "rootfsaddr=0x02F00000\0"                                               \
731 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
732 "rootpath=/opt/nfsroot\0"                                               \
733 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
734         "protect off 0xeC000000 +$filesize; "                           \
735         "erase 0xEC000000 +$filesize; "                                 \
736         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
737         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
738         "protect on 0xeC000000 +$filesize\0"                            \
739 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
740         "protect off 0xeFF80000 +$filesize; "                           \
741         "erase 0xEFF80000 +$filesize; "                                 \
742         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
743         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
744         "protect on 0xeFF80000 +$filesize\0"                            \
745 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
746         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
747         "sf write $loadaddr 0x8000 $filesize\0"                         \
748 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
749         "protect off 0xec0a0000 +$filesize; "                           \
750         "erase 0xeC0A0000 +$filesize; "                                 \
751         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
752         "protect on 0xec0a0000 +$filesize\0"                            \
753 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
754         "sf probe 1; sf erase 0 +$filesize; "                           \
755         "sf write $loadaddr 0 $filesize\0"                              \
756 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
757         "sf probe 0; sf erase 0 +$filesize; "                           \
758         "sf write $loadaddr 0 $filesize\0"                              \
759 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
760         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
761         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
762         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
763         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
764         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
765 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
766 "ubootaddr=0x01000000\0"                                                \
767 "ubootfile=u-boot.bin\0"                                                \
768 "ubootd=u-boot4dongle.bin\0"                                            \
769 "upgrade=run flashworking\0"                                            \
770 "usb_phy_type=ulpi\0 "                                                  \
771 "workingaddr=0x02F00000\0"                                              \
772 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
773
774 #else
775
776 #if defined(CONFIG_UCP1020T1)
777
778 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
779 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
780 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
781 "bootfile=uImage\0"                                                     \
782 "consoledev=ttyS0\0"                                                    \
783 "cramfsfile=image.cramfs\0"                                             \
784 "dtbaddr=0x00c00000\0"                                                  \
785 "dtbfile=image.dtb\0"                                                   \
786 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
787 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
788 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
789 "fileaddr=0x01000000\0"                                                 \
790 "filesize=0x00080000\0"                                                 \
791 "flashmbr=sf probe 0; "                                                 \
792         "tftp $loadaddr $mbr; "                                         \
793         "sf erase $mbr_offset +$filesize; "                             \
794         "sf write $loadaddr $mbr_offset $filesize\0"                    \
795 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
796         "protect off $nor_recoveryaddr +$filesize; "                    \
797         "erase $nor_recoveryaddr +$filesize; "                          \
798         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
799         "protect on $nor_recoveryaddr +$filesize\0 "                    \
800 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
801         "protect off $nor_ubootaddr +$filesize; "                       \
802         "erase $nor_ubootaddr +$filesize; "                             \
803         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
804         "protect on $nor_ubootaddr +$filesize\0 "                       \
805 "flashworking=tftp $workingaddr $cramfsfile; "                          \
806         "protect off $nor_workingaddr +$filesize; "                     \
807         "erase $nor_workingaddr +$filesize; "                           \
808         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
809         "protect on $nor_workingaddr +$filesize\0 "                     \
810 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
811 "kerneladdr=0x01100000\0"                                               \
812 "kernelfile=uImage\0"                                                   \
813 "loadaddr=0x01000000\0"                                                 \
814 "mbr=uCP1020.mbr\0"                                                     \
815 "mbr_offset=0x00000000\0"                                               \
816 "netdev=eth0\0"                                                         \
817 "nor_recoveryaddr=0xEC0A0000\0"                                         \
818 "nor_ubootaddr=0xEFF80000\0"                                            \
819 "nor_workingaddr=0xECFA0000\0"                                          \
820 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
821         " console=$consoledev,$baudrate $othbootargs; "                 \
822         "run norloadrecovery; "                                         \
823         "bootm $kerneladdr - $dtbaddr\0"                                \
824 "norbootworking=setenv bootargs $workingbootargs"                       \
825         " console=$consoledev,$baudrate $othbootargs; "                 \
826         "run norloadworking; "                                          \
827         "bootm $kerneladdr - $dtbaddr\0"                                \
828 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
829         "setenv cramfsaddr $nor_recoveryaddr; "                         \
830         "cramfsload $dtbaddr $dtbfile; "                                \
831         "cramfsload $kerneladdr $kernelfile\0"                          \
832 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
833         "setenv cramfsaddr $nor_workingaddr; "                          \
834         "cramfsload $dtbaddr $dtbfile; "                                \
835         "cramfsload $kerneladdr $kernelfile\0"                          \
836 "othbootargs=quiet\0"                                                   \
837 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
838         " console=$consoledev,$baudrate $othbootargs; "                 \
839         "tftp $rootfsaddr $rootfsfile; "                                \
840         "tftp $loadaddr $kernelfile; "                                  \
841         "tftp $dtbaddr $dtbfile; "                                      \
842         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
843 "ramdisk_size=120000\0"                                                 \
844 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
845 "recoveryaddr=0x02F00000\0"                                             \
846 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
847 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
848         "mw.l 0xffe0f008 0x00400000\0"                                  \
849 "rootfsaddr=0x02F00000\0"                                               \
850 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
851 "rootpath=/opt/nfsroot\0"                                               \
852 "silent=1\0"                                                            \
853 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
854         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
855         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
856         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
857         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
858         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
859 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
860 "ubootaddr=0x01000000\0"                                                \
861 "ubootfile=u-boot.bin\0"                                                \
862 "upgrade=run flashworking\0"                                            \
863 "workingaddr=0x02F00000\0"                                              \
864 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
865
866 #else /* For Arcturus Modules */
867
868 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
869 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
870 "bootcmd=run norkernel\0"                                               \
871 "bootfile=uImage\0"                                                     \
872 "consoledev=ttyS0\0"                                                    \
873 "dtbaddr=0x00c00000\0"                                                  \
874 "dtbfile=image.dtb\0"                                                   \
875 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
876 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
877 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
878 "fileaddr=0x01000000\0"                                                 \
879 "filesize=0x00080000\0"                                                 \
880 "flashmbr=sf probe 0; "                                                 \
881         "tftp $loadaddr $mbr; "                                         \
882         "sf erase $mbr_offset +$filesize; "                             \
883         "sf write $loadaddr $mbr_offset $filesize\0"                    \
884 "flashuboot=tftp $loadaddr $ubootfile; "                                \
885         "protect off $nor_ubootaddr0 +$filesize; "                      \
886         "erase $nor_ubootaddr0 +$filesize; "                            \
887         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
888         "protect on $nor_ubootaddr0 +$filesize; "                       \
889         "protect off $nor_ubootaddr1 +$filesize; "                      \
890         "erase $nor_ubootaddr1 +$filesize; "                            \
891         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
892         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
893 "format0=protect off $part0base +$part0size; "                          \
894         "erase $part0base +$part0size\0"                                \
895 "format1=protect off $part1base +$part1size; "                          \
896         "erase $part1base +$part1size\0"                                \
897 "format2=protect off $part2base +$part2size; "                          \
898         "erase $part2base +$part2size\0"                                \
899 "format3=protect off $part3base +$part3size; "                          \
900         "erase $part3base +$part3size\0"                                \
901 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
902 "kerneladdr=0x01100000\0"                                               \
903 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
904 "kernelfile=uImage\0"                                                   \
905 "loadaddr=0x01000000\0"                                                 \
906 "mbr=uCP1020.mbr\0"                                                     \
907 "mbr_offset=0x00000000\0"                                               \
908 "netdev=eth0\0"                                                         \
909 "nor_ubootaddr0=0xEC000000\0"                                           \
910 "nor_ubootaddr1=0xEFF80000\0"                                           \
911 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
912         "run norkernelload; "                                           \
913         "bootm $kerneladdr - $dtbaddr\0"                                \
914 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
915         "setenv cramfsaddr $part0base; "                                \
916         "cramfsload $dtbaddr $dtbfile; "                                \
917         "cramfsload $kerneladdr $kernelfile\0"                          \
918 "part0base=0xEC100000\0"                                                \
919 "part0size=0x00700000\0"                                                \
920 "part1base=0xEC800000\0"                                                \
921 "part1size=0x02000000\0"                                                \
922 "part2base=0xEE800000\0"                                                \
923 "part2size=0x00800000\0"                                                \
924 "part3base=0xEF000000\0"                                                \
925 "part3size=0x00F80000\0"                                                \
926 "partENVbase=0xEC080000\0"                                              \
927 "partENVsize=0x00080000\0"                                              \
928 "program0=tftp part0-000000.bin; "                                      \
929         "protect off $part0base +$filesize; "                           \
930         "erase $part0base +$filesize; "                                 \
931         "cp.b $loadaddr $part0base $filesize; "                         \
932         "echo Verifying...; "                                           \
933         "cmp.b $loadaddr $part0base $filesize\0"                        \
934 "program1=tftp part1-000000.bin; "                                      \
935         "protect off $part1base +$filesize; "                           \
936         "erase $part1base +$filesize; "                                 \
937         "cp.b $loadaddr $part1base $filesize; "                         \
938         "echo Verifying...; "                                           \
939         "cmp.b $loadaddr $part1base $filesize\0"                        \
940 "program2=tftp part2-000000.bin; "                                      \
941         "protect off $part2base +$filesize; "                           \
942         "erase $part2base +$filesize; "                                 \
943         "cp.b $loadaddr $part2base $filesize; "                         \
944         "echo Verifying...; "                                           \
945         "cmp.b $loadaddr $part2base $filesize\0"                        \
946 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
947         "  console=$consoledev,$baudrate $othbootargs; "                \
948         "tftp $rootfsaddr $rootfsfile; "                                \
949         "tftp $loadaddr $kernelfile; "                                  \
950         "tftp $dtbaddr $dtbfile; "                                      \
951         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
952 "ramdisk_size=120000\0"                                                 \
953 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
954 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
955         "mw.l 0xffe0f008 0x00400000\0"                                  \
956 "rootfsaddr=0x02F00000\0"                                               \
957 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
958 "rootpath=/opt/nfsroot\0"                                               \
959 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
960         "sf probe 0; sf erase 0 +$filesize; "                           \
961         "sf write $loadaddr 0 $filesize\0"                              \
962 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
963         "protect off 0xeC000000 +$filesize; "                           \
964         "erase 0xEC000000 +$filesize; "                                 \
965         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
966         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
967         "protect on 0xeC000000 +$filesize\0"                            \
968 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
969         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
970         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
971         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
972         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
973         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
974 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
975 "ubootfile=u-boot.bin\0"                                                \
976 "upgrade=run flashuboot\0"                                              \
977 "usb_phy_type=ulpi\0 "                                                  \
978 "boot_nfs= "                                                            \
979         "setenv bootargs root=/dev/nfs rw "                             \
980         "nfsroot=$serverip:$rootpath "                                  \
981         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
982         "console=$consoledev,$baudrate $othbootargs;"                   \
983         "tftp $loadaddr $bootfile;"                                     \
984         "tftp $fdtaddr $fdtfile;"                                       \
985         "bootm $loadaddr - $fdtaddr\0"                                  \
986 "boot_hd = "                                                            \
987         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
988         "console=$consoledev,$baudrate $othbootargs;"                   \
989         "usb start;"                                                    \
990         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
991         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
992         "bootm $loadaddr - $fdtaddr\0"                                  \
993 "boot_usb_fat = "                                                       \
994         "setenv bootargs root=/dev/ram rw "                             \
995         "console=$consoledev,$baudrate $othbootargs "                   \
996         "ramdisk_size=$ramdisk_size;"                                   \
997         "usb start;"                                                    \
998         "fatload usb 0:2 $loadaddr $bootfile;"                          \
999         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
1000         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
1001         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
1002 "boot_usb_ext2 = "                                                      \
1003         "setenv bootargs root=/dev/ram rw "                             \
1004         "console=$consoledev,$baudrate $othbootargs "                   \
1005         "ramdisk_size=$ramdisk_size;"                                   \
1006         "usb start;"                                                    \
1007         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
1008         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
1009         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
1010         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
1011 "boot_nor = "                                                           \
1012         "setenv bootargs root=/dev/$jffs2nor rw "                       \
1013         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
1014         "bootm $norbootaddr - $norfdtaddr\0 "                           \
1015 "boot_ram = "                                                           \
1016         "setenv bootargs root=/dev/ram rw "                             \
1017         "console=$consoledev,$baudrate $othbootargs "                   \
1018         "ramdisk_size=$ramdisk_size;"                                   \
1019         "tftp $ramdiskaddr $ramdiskfile;"                               \
1020         "tftp $loadaddr $bootfile;"                                     \
1021         "tftp $fdtaddr $fdtfile;"                                       \
1022         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
1023
1024 #endif
1025 #endif
1026
1027 #endif /* __CONFIG_H */