include/configs/UCP1020.h

   1 /*
   2  * Copyright 2013-2015 Arcturus Networks, Inc.
   3  *           http://www.arcturusnetworks.com/products/ucp1020/
   4  * based on include/configs/p1_p2_rdb_pc.h
   5  * original copyright follows:
   6  * Copyright 2009-2011 Freescale Semiconductor, Inc.
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10
  11 /*
  12  * QorIQ uCP1020-xx boards configuration file
  13  */
  14 #ifndef __CONFIG_H
  15 #define __CONFIG_H
  16
  17 #define CONFIG_SYS_GENERIC_BOARD
  18 #define CONFIG_DISPLAY_BOARDINFO
  19
  20 #define CONFIG_FSL_ELBC
  21 #define CONFIG_PCI
  22 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
  23 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
  24 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
  25 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
  26 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
  27 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
  28
  29 #if defined(CONFIG_TARTGET_UCP1020T1)
  30
  31 #define CONFIG_UCP1020_REV_1_3
  32
  33 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
  34 #define CONFIG_P1020
  35
  36 #define CONFIG_TSEC_ENET
  37 #define CONFIG_TSEC1
  38 #define CONFIG_TSEC3
  39 #define CONFIG_HAS_ETH0
  40 #define CONFIG_HAS_ETH1
  41 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
  42 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
  43 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
  44 #define CONFIG_IPADDR           10.80.41.229
  45 #define CONFIG_SERVERIP         10.80.41.227
  46 #define CONFIG_NETMASK          255.255.252.0
  47 #define CONFIG_ETHPRIME         "eTSEC3"
  48
  49 #ifndef CONFIG_SPI_FLASH
  50 #endif
  51 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  52
  53 #define CONFIG_MMC
  54 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  55
  56 #define CONFIG_LAST_STAGE_INIT
  57
  58 #if !defined(CONFIG_DONGLE)
  59 #define CONFIG_SILENT_CONSOLE
  60 #endif
  61
  62 #endif
  63
  64 #if defined(CONFIG_TARGET_UCP1020)
  65
  66 #define CONFIG_UCP1020
  67 #define CONFIG_UCP1020_REV_1_3
  68
  69 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
  70 #define CONFIG_P1020
  71
  72 #define CONFIG_TSEC_ENET
  73 #define CONFIG_TSEC1
  74 #define CONFIG_TSEC2
  75 #define CONFIG_TSEC3
  76 #define CONFIG_HAS_ETH0
  77 #define CONFIG_HAS_ETH1
  78 #define CONFIG_HAS_ETH2
  79 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
  80 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
  81 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
  82 #define CONFIG_IPADDR           192.168.1.81
  83 #define CONFIG_IPADDR1          192.168.1.82
  84 #define CONFIG_IPADDR2          192.168.1.83
  85 #define CONFIG_SERVERIP         192.168.1.80
  86 #define CONFIG_GATEWAYIP        102.168.1.1
  87 #define CONFIG_NETMASK          255.255.255.0
  88 #define CONFIG_ETHPRIME         "eTSEC1"
  89
  90 #ifndef CONFIG_SPI_FLASH
  91 #endif
  92 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
  93
  94 #define CONFIG_MMC
  95 #define CONFIG_SYS_L2_SIZE      (256 << 10)
  96
  97 #define CONFIG_LAST_STAGE_INIT
  98
  99 #endif
 100
 101 #ifdef CONFIG_SDCARD
 102 #define CONFIG_RAMBOOT_SDCARD
 103 #define CONFIG_SYS_RAMBOOT
 104 #define CONFIG_SYS_EXTRA_ENV_RELOC
 105 #define CONFIG_SYS_TEXT_BASE            0x11000000
 106 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 107 #endif
 108
 109 #ifdef CONFIG_SPIFLASH
 110 #define CONFIG_RAMBOOT_SPIFLASH
 111 #define CONFIG_SYS_RAMBOOT
 112 #define CONFIG_SYS_EXTRA_ENV_RELOC
 113 #define CONFIG_SYS_TEXT_BASE            0x11000000
 114 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
 115 #endif
 116
 117 #ifndef CONFIG_SYS_TEXT_BASE
 118 #define CONFIG_SYS_TEXT_BASE            0xeff80000
 119 #endif
 120 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
 121
 122 #ifndef CONFIG_RESET_VECTOR_ADDRESS
 123 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
 124 #endif
 125
 126 #ifndef CONFIG_SYS_MONITOR_BASE
 127 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
 128 #endif
 129
 130 /* High Level Configuration Options */
 131 #define CONFIG_BOOKE
 132 #define CONFIG_E500
 133 /* #define CONFIG_MPC85xx */
 134
 135 #define CONFIG_MP
 136
 137 #define CONFIG_FSL_LAW
 138
 139 #define CONFIG_ENV_OVERWRITE
 140
 141 #define CONFIG_CMD_SATA
 142 #define CONFIG_SATA_SIL
 143 #define CONFIG_SYS_SATA_MAX_DEVICE      2
 144 #define CONFIG_LIBATA
 145 #define CONFIG_LBA48
 146
 147 #define CONFIG_SYS_CLK_FREQ     66666666
 148 #define CONFIG_DDR_CLK_FREQ     66666666
 149
 150 #define CONFIG_HWCONFIG
 151
 152 #define CONFIG_DTT_ADM1021      1       /* ADM1021 temp sensor support  */
 153 #define CONFIG_SYS_DTT_BUS_NUM  1       /* The I2C bus for DTT          */
 154 #define CONFIG_DTT_SENSORS      { 0, 1 }        /* Sensor index */
 155 /*
 156  * ADM1021/NCT72 temp sensor configuration (see dtt/adm1021.c for details).
 157  * there will be one entry in this array for each two (dummy) sensors in
 158  * CONFIG_DTT_SENSORS.
 159  *
 160  * For uCP1020 module:
 161  * - only one ADM1021/NCT72
 162  * - i2c addr 0x41
 163  * - conversion rate 0x02 = 0.25 conversions/second
 164  * - ALERT output disabled
 165  * - local temp sensor enabled, min set to 0 deg, max set to 85 deg
 166  * - remote temp sensor enabled, min set to 0 deg, max set to 85 deg
 167  */
 168 #define CONFIG_SYS_DTT_ADM1021  { { CONFIG_SYS_I2C_NCT72_ADDR, \
 169                                          0x02, 0, 1, 0, 85, 1, 0, 85} }
 170
 171 #define CONFIG_CMD_DTT
 172
 173 /*
 174  * These can be toggled for performance analysis, otherwise use default.
 175  */
 176 #define CONFIG_L2_CACHE
 177 #define CONFIG_BTB
 178
 179 #define CONFIG_BOARD_EARLY_INIT_F       /* Call board_pre_init */
 180
 181 #define CONFIG_ENABLE_36BIT_PHYS
 182
 183 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
 184 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
 185 #define CONFIG_PANIC_HANG       /* do not reset board on panic */
 186
 187 #define CONFIG_SYS_CCSRBAR              0xffe00000
 188 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
 189
 190 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
 191        SPL code*/
 192 #ifdef CONFIG_SPL_BUILD
 193 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
 194 #endif
 195
 196 /* DDR Setup */
 197 #define CONFIG_DDR_ECC_ENABLE
 198 #define CONFIG_SYS_FSL_DDR3
 199 #ifndef CONFIG_DDR_ECC_ENABLE
 200 #define CONFIG_SYS_DDR_RAW_TIMING
 201 #define CONFIG_DDR_SPD
 202 #endif
 203 #define CONFIG_SYS_SPD_BUS_NUM 1
 204 #undef CONFIG_FSL_DDR_INTERACTIVE
 205
 206 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
 207 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
 208 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
 209 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
 210 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
 211
 212 #define CONFIG_NUM_DDR_CONTROLLERS      1
 213 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
 214
 215 /* Default settings for DDR3 */
 216 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
 217 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
 218 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
 219 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
 220 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
 221 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
 222
 223 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
 224 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
 225 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
 226 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
 227
 228 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
 229 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
 230 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
 231 #define CONFIG_SYS_DDR_RCW_1            0x00000000
 232 #define CONFIG_SYS_DDR_RCW_2            0x00000000
 233 #ifdef CONFIG_DDR_ECC_ENABLE
 234 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
 235 #else
 236 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
 237 #endif
 238 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
 239 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
 240 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
 241
 242 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
 243 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
 244 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
 245 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
 246 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
 247 #define CONFIG_SYS_DDR_MODE_1           0x40461520
 248 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
 249 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
 250
 251 #undef CONFIG_CLOCKS_IN_MHZ
 252
 253 /*
 254  * Memory map
 255  *
 256  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
 257  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
 258  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
 259  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
 260  *   (early boot only)
 261  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
 262  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
 263  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
 264  */
 265
 266 /*
 267  * Local Bus Definitions
 268  */
 269 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
 270 #define CONFIG_SYS_FLASH_BASE           0xec000000
 271
 272 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
 273
 274 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
 275         | BR_PS_16 | BR_V)
 276
 277 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
 278
 279 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
 280 #define CONFIG_SYS_FLASH_QUIET_TEST
 281 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
 282
 283 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
 284
 285 #undef CONFIG_SYS_FLASH_CHECKSUM
 286 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
 287 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
 288
 289 #define CONFIG_FLASH_CFI_DRIVER
 290 #define CONFIG_SYS_FLASH_CFI
 291 #define CONFIG_SYS_FLASH_EMPTY_INFO
 292 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 293
 294 #define CONFIG_BOARD_EARLY_INIT_R       /* call board_early_init_r function */
 295
 296 #define CONFIG_SYS_INIT_RAM_LOCK
 297 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
 298 /* Initial L1 address */
 299 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
 300 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
 301 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
 302 /* Size of used area in RAM */
 303 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
 304
 305 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
 306                                         GENERATED_GBL_DATA_SIZE)
 307 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
 308
 309 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
 310 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
 311
 312 #define CONFIG_SYS_PMC_BASE     0xff980000
 313 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
 314 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
 315                                         BR_PS_8 | BR_V)
 316 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
 317                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
 318                                  OR_GPCM_EAD)
 319
 320 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
 321 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
 322 #ifdef CONFIG_NAND_FSL_ELBC
 323 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
 324 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
 325 #endif
 326
 327 /* Serial Port - controlled on board with jumper J8
 328  * open - index 2
 329  * shorted - index 1
 330  */
 331 #define CONFIG_CONS_INDEX               1
 332 #undef CONFIG_SERIAL_SOFTWARE_FIFO
 333 #define CONFIG_SYS_NS16550
 334 #define CONFIG_SYS_NS16550_SERIAL
 335 #define CONFIG_SYS_NS16550_REG_SIZE     1
 336 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
 337 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
 338 #define CONFIG_NS16550_MIN_FUNCTIONS
 339 #endif
 340
 341 #define CONFIG_SYS_BAUDRATE_TABLE       \
 342         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
 343
 344 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
 345 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
 346
 347 /* Use the HUSH parser */
 348 #define CONFIG_SYS_HUSH_PARSER
 349
 350 /*
 351  * Pass open firmware flat tree
 352  */
 353 #define CONFIG_OF_LIBFDT
 354 #define CONFIG_OF_BOARD_SETUP
 355 #define CONFIG_OF_STDOUT_VIA_ALIAS
 356
 357 /* new uImage format support */
 358 #define CONFIG_FIT
 359 #define CONFIG_FIT_VERBOSE      /* enable fit_format_{error,warning}() */
 360
 361 /* I2C */
 362 #define CONFIG_SYS_I2C
 363 #define CONFIG_SYS_I2C_FSL
 364 #define CONFIG_SYS_FSL_I2C_SPEED        400000
 365 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
 366 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
 367 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
 368 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
 369 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
 370 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
 371 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
 372
 373 #define CONFIG_RTC_DS1337
 374 #define CONFIG_SYS_RTC_DS1337_NOOSC
 375 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
 376 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
 377 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
 378 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
 379
 380 /*
 381  * eSPI - Enhanced SPI
 382  */
 383 #define CONFIG_HARD_SPI
 384 #define CONFIG_FSL_ESPI
 385
 386 #define CONFIG_SPI_FLASH_SST            1
 387 #define CONFIG_SPI_FLASH_STMICRO        1
 388 #define CONFIG_SPI_FLASH_WINBOND        1
 389 #define CONFIG_CMD_SF                   1
 390 #define CONFIG_CMD_SPI                  1
 391 #define CONFIG_SF_DEFAULT_SPEED         10000000
 392 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
 393
 394 #if defined(CONFIG_PCI)
 395 /*
 396  * General PCI
 397  * Memory space is mapped 1-1, but I/O space must start from 0.
 398  */
 399
 400 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
 401 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
 402 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
 403 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
 404 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
 405 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
 406 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
 407 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
 408 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
 409 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
 410
 411 /* controller 1, Slot 2, tgtid 1, Base address a000 */
 412 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
 413 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
 414 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
 415 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
 416 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
 417 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
 418 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
 419 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
 420 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
 421
 422 #define CONFIG_PCI_PNP  /* do pci plug-and-play */
 423 #define CONFIG_E1000    /* Defind e1000 pci Ethernet card*/
 424 #define CONFIG_CMD_PCI
 425
 426 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
 427 #define CONFIG_DOS_PARTITION
 428 #endif /* CONFIG_PCI */
 429
 430 /*
 431  * Environment
 432  */
 433 #ifdef CONFIG_ENV_FIT_UCBOOT
 434
 435 #define CONFIG_ENV_IS_IN_FLASH
 436 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
 437 #define CONFIG_ENV_SIZE         0x20000
 438 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 439
 440 #else
 441
 442 #define CONFIG_ENV_SPI_BUS      0
 443 #define CONFIG_ENV_SPI_CS       0
 444 #define CONFIG_ENV_SPI_MAX_HZ   10000000
 445 #define CONFIG_ENV_SPI_MODE     0
 446
 447 #ifdef CONFIG_RAMBOOT_SPIFLASH
 448
 449 #define CONFIG_ENV_IS_IN_SPI_FLASH
 450 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
 451 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
 452 #define CONFIG_ENV_SECT_SIZE    0x1000
 453
 454 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 455 /* Address and size of Redundant Environment Sector     */
 456 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 457 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
 458 #endif
 459
 460 #elif defined(CONFIG_RAMBOOT_SDCARD)
 461 #define CONFIG_ENV_IS_IN_MMC
 462 #define CONFIG_FSL_FIXED_MMC_LOCATION
 463 #define CONFIG_ENV_SIZE         0x2000
 464 #define CONFIG_SYS_MMC_ENV_DEV  0
 465
 466 #elif defined(CONFIG_SYS_RAMBOOT)
 467 #define CONFIG_ENV_IS_NOWHERE   /* Store ENV in memory only */
 468 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
 469 #define CONFIG_ENV_SIZE         0x2000
 470
 471 #else
 472 #define CONFIG_ENV_IS_IN_FLASH
 473 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
 474 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
 475 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 476 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
 477 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
 478 /* Address and size of Redundant Environment Sector     */
 479 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
 480 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 481 #endif
 482
 483 #endif
 484
 485 #endif  /* CONFIG_ENV_FIT_UCBOOT */
 486
 487 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
 488 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
 489
 490 /*
 491  * Command line configuration.
 492  */
 493 #define CONFIG_CMD_IRQ
 494 #define CONFIG_CMD_PING
 495 #define CONFIG_CMD_I2C
 496 #define CONFIG_CMD_MII
 497 #define CONFIG_CMD_DATE
 498 #define CONFIG_CMD_ELF
 499 #define CONFIG_CMD_I2C
 500 #define CONFIG_CMD_IRQ
 501 #define CONFIG_CMD_MII
 502 #define CONFIG_CMD_PING
 503 #define CONFIG_CMD_REGINFO
 504 #define CONFIG_CMD_ERRATA
 505 #define CONFIG_CMD_CRAMFS
 506 #define CONFIG_CRAMFS_CMDLINE
 507
 508 /*
 509  * USB
 510  */
 511 #define CONFIG_HAS_FSL_DR_USB
 512
 513 #if defined(CONFIG_HAS_FSL_DR_USB)
 514 #define CONFIG_USB_EHCI
 515
 516 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 517
 518 #ifdef CONFIG_USB_EHCI
 519 #define CONFIG_CMD_USB
 520 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 521 #define CONFIG_USB_EHCI_FSL
 522 #define CONFIG_USB_STORAGE
 523 #endif
 524 #endif
 525
 526 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
 527
 528 #ifdef CONFIG_MMC
 529 #define CONFIG_FSL_ESDHC
 530 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
 531 #define CONFIG_CMD_MMC
 532 #define CONFIG_MMC_SPI
 533 #define CONFIG_CMD_MMC_SPI
 534 #define CONFIG_GENERIC_MMC
 535 #endif
 536
 537 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI) || defined(CONFIG_FSL_SATA)
 538 #define CONFIG_CMD_EXT2
 539 #define CONFIG_CMD_FAT
 540 #define CONFIG_DOS_PARTITION
 541 #endif
 542
 543 /* Misc Extra Settings */
 544 #define CONFIG_CMD_GPIO                 1
 545 #undef CONFIG_WATCHDOG  /* watchdog disabled */
 546
 547 /*
 548  * Miscellaneous configurable options
 549  */
 550 #define CONFIG_SYS_LONGHELP                     /* undef to save memory */
 551 #define CONFIG_CMDLINE_EDITING                  /* Command-line editing */
 552 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
 553 #define CONFIG_SYS_PROMPT       "B$ "           /* Monitor Command Prompt */
 554 #if defined(CONFIG_CMD_KGDB)
 555 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size */
 556 #else
 557 #define CONFIG_SYS_CBSIZE       256             /* Console I/O Buffer Size */
 558 #endif
 559 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 560         /* Print Buffer Size */
 561 #define CONFIG_SYS_MAXARGS      16      /* max number of command args */
 562 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE/* Boot Argument Buffer Size */
 563 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
 564
 565 /*
 566  * For booting Linux, the board info and command line data
 567  * have to be in the first 64 MB of memory, since this is
 568  * the maximum mapped by the Linux kernel during initialization.
 569  */
 570 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
 571 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
 572
 573 #if defined(CONFIG_CMD_KGDB)
 574 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
 575 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
 576 #endif
 577
 578 /*
 579  * Environment Configuration
 580  */
 581
 582 #if defined(CONFIG_TSEC_ENET)
 583
 584 #if defined(CONFIG_UCP1020_REV_1_2)
 585 #define CONFIG_PHY_MICREL_KSZ9021
 586 #elif defined(CONFIG_UCP1020_REV_1_3)
 587 #define CONFIG_PHY_MICREL_KSZ9031
 588 #else
 589 #error "UCP1020 module revision is not defined !!!"
 590 #endif
 591
 592 #define CONFIG_CMD_DHCP
 593 #define CONFIG_BOOTP_SERVERIP
 594
 595 #define CONFIG_MII              /* MII PHY management */
 596 #define CONFIG_TSEC1_NAME       "eTSEC1"
 597 #define CONFIG_TSEC2_NAME       "eTSEC2"
 598 #define CONFIG_TSEC3_NAME       "eTSEC3"
 599
 600 #define TSEC1_PHY_ADDR  4
 601 #define TSEC2_PHY_ADDR  0
 602 #define TSEC2_PHY_ADDR_SGMII    0x00
 603 #define TSEC3_PHY_ADDR  6
 604
 605 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 606 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 607 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
 608
 609 #define TSEC1_PHYIDX    0
 610 #define TSEC2_PHYIDX    0
 611 #define TSEC3_PHYIDX    0
 612
 613 #define CONFIG_PHY_GIGE 1       /* Include GbE speed/duplex detection */
 614
 615 #endif
 616
 617 #define CONFIG_HOSTNAME         UCP1020
 618 #define CONFIG_ROOTPATH         "/opt/nfsroot"
 619 #define CONFIG_BOOTFILE         "uImage"
 620 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
 621
 622 /* default location for tftp and bootm */
 623 #define CONFIG_LOADADDR         1000000
 624
 625 #define CONFIG_BOOTARGS /* the boot command will set bootargs */
 626
 627 #define CONFIG_BAUDRATE 115200
 628
 629 #if defined(CONFIG_DONGLE)
 630
 631 #define CONFIG_BOOTDELAY 1      /* autoboot after 1 seconds */
 632 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 633 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
 634 "bootfile=uImage\0"                                                     \
 635 "consoledev=ttyS0\0"                                                    \
 636 "cramfsfile=image.cramfs\0"                                             \
 637 "dtbaddr=0x00c00000\0"                                                  \
 638 "dtbfile=image.dtb\0"                                                   \
 639 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 640 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 641 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 642 "fileaddr=0x01000000\0"                                                 \
 643 "filesize=0x00080000\0"                                                 \
 644 "flashmbr=sf probe 0; "                                                 \
 645         "tftp $loadaddr $mbr; "                                         \
 646         "sf erase $mbr_offset +$filesize; "                             \
 647         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 648 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 649         "protect off $nor_recoveryaddr +$filesize; "                    \
 650         "erase $nor_recoveryaddr +$filesize; "                          \
 651         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 652         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 653 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 654         "protect off $nor_ubootaddr +$filesize; "                       \
 655         "erase $nor_ubootaddr +$filesize; "                             \
 656         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 657         "protect on $nor_ubootaddr +$filesize\0 "                       \
 658 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 659         "protect off $nor_workingaddr +$filesize; "                     \
 660         "erase $nor_workingaddr +$filesize; "                           \
 661         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 662         "protect on $nor_workingaddr +$filesize\0 "                     \
 663 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 664 "kerneladdr=0x01100000\0"                                               \
 665 "kernelfile=uImage\0"                                                   \
 666 "loadaddr=0x01000000\0"                                                 \
 667 "mbr=uCP1020d.mbr\0"                                                    \
 668 "mbr_offset=0x00000000\0"                                               \
 669 "mmbr=uCP1020Quiet.mbr\0"                                               \
 670 "mmcpart=0:2\0"                                                         \
 671 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 672         "mmc erase 1 1; "                                               \
 673         "mmc write $loadaddr 1 1\0"                                     \
 674 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
 675         "mmc erase 0x40 0x400; "                                        \
 676         "mmc write $loadaddr 0x40 0x400\0"                              \
 677 "netdev=eth0\0"                                                         \
 678 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 679 "nor_ubootaddr=0xEFF80000\0"                                            \
 680 "nor_workingaddr=0xECFA0000\0"                                          \
 681 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 682         " console=$consoledev,$baudrate $othbootargs; "                 \
 683         "run norloadrecovery; "                                         \
 684         "bootm $kerneladdr - $dtbaddr\0"                                \
 685 "norbootworking=setenv bootargs $workingbootargs"                       \
 686         " console=$consoledev,$baudrate $othbootargs; "                 \
 687         "run norloadworking; "                                          \
 688         "bootm $kerneladdr - $dtbaddr\0"                                \
 689 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 690         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 691         "cramfsload $dtbaddr $dtbfile; "                                \
 692         "cramfsload $kerneladdr $kernelfile\0"                          \
 693 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 694         "setenv cramfsaddr $nor_workingaddr; "                          \
 695         "cramfsload $dtbaddr $dtbfile; "                                \
 696         "cramfsload $kerneladdr $kernelfile\0"                          \
 697 "prog_spi_mbr=run spi__mbr\0"                                           \
 698 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
 699 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
 700         "run spi__cramfs\0"                                             \
 701 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 702         " console=$consoledev,$baudrate $othbootargs; "                 \
 703         "tftp $rootfsaddr $rootfsfile; "                                \
 704         "tftp $loadaddr $kernelfile; "                                  \
 705         "tftp $dtbaddr $dtbfile; "                                      \
 706         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 707 "ramdisk_size=120000\0"                                                 \
 708 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 709 "recoveryaddr=0x02F00000\0"                                             \
 710 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 711 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 712         "mw.l 0xffe0f008 0x00400000\0"                                  \
 713 "rootfsaddr=0x02F00000\0"                                               \
 714 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 715 "rootpath=/opt/nfsroot\0"                                               \
 716 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 717         "protect off 0xeC000000 +$filesize; "                           \
 718         "erase 0xEC000000 +$filesize; "                                 \
 719         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 720         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 721         "protect on 0xeC000000 +$filesize\0"                            \
 722 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
 723         "protect off 0xeFF80000 +$filesize; "                           \
 724         "erase 0xEFF80000 +$filesize; "                                 \
 725         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
 726         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
 727         "protect on 0xeFF80000 +$filesize\0"                            \
 728 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
 729         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
 730         "sf write $loadaddr 0x8000 $filesize\0"                         \
 731 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
 732         "protect off 0xec0a0000 +$filesize; "                           \
 733         "erase 0xeC0A0000 +$filesize; "                                 \
 734         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
 735         "protect on 0xec0a0000 +$filesize\0"                            \
 736 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 737         "sf probe 1; sf erase 0 +$filesize; "                           \
 738         "sf write $loadaddr 0 $filesize\0"                              \
 739 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
 740         "sf probe 0; sf erase 0 +$filesize; "                           \
 741         "sf write $loadaddr 0 $filesize\0"                              \
 742 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 743         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 744         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 745         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 746         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 747         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 748 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 749 "ubootaddr=0x01000000\0"                                                \
 750 "ubootfile=u-boot.bin\0"                                                \
 751 "ubootd=u-boot4dongle.bin\0"                                            \
 752 "upgrade=run flashworking\0"                                            \
 753 "usb_phy_type=ulpi\0 "                                                  \
 754 "workingaddr=0x02F00000\0"                                              \
 755 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 756
 757 #else
 758
 759 #if defined(CONFIG_UCP1020T1)
 760
 761 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
 762 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 763 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
 764 "bootfile=uImage\0"                                                     \
 765 "consoledev=ttyS0\0"                                                    \
 766 "cramfsfile=image.cramfs\0"                                             \
 767 "dtbaddr=0x00c00000\0"                                                  \
 768 "dtbfile=image.dtb\0"                                                   \
 769 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 770 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 771 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 772 "fileaddr=0x01000000\0"                                                 \
 773 "filesize=0x00080000\0"                                                 \
 774 "flashmbr=sf probe 0; "                                                 \
 775         "tftp $loadaddr $mbr; "                                         \
 776         "sf erase $mbr_offset +$filesize; "                             \
 777         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 778 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
 779         "protect off $nor_recoveryaddr +$filesize; "                    \
 780         "erase $nor_recoveryaddr +$filesize; "                          \
 781         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
 782         "protect on $nor_recoveryaddr +$filesize\0 "                    \
 783 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
 784         "protect off $nor_ubootaddr +$filesize; "                       \
 785         "erase $nor_ubootaddr +$filesize; "                             \
 786         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
 787         "protect on $nor_ubootaddr +$filesize\0 "                       \
 788 "flashworking=tftp $workingaddr $cramfsfile; "                          \
 789         "protect off $nor_workingaddr +$filesize; "                     \
 790         "erase $nor_workingaddr +$filesize; "                           \
 791         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
 792         "protect on $nor_workingaddr +$filesize\0 "                     \
 793 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 794 "kerneladdr=0x01100000\0"                                               \
 795 "kernelfile=uImage\0"                                                   \
 796 "loadaddr=0x01000000\0"                                                 \
 797 "mbr=uCP1020.mbr\0"                                                     \
 798 "mbr_offset=0x00000000\0"                                               \
 799 "netdev=eth0\0"                                                         \
 800 "nor_recoveryaddr=0xEC0A0000\0"                                         \
 801 "nor_ubootaddr=0xEFF80000\0"                                            \
 802 "nor_workingaddr=0xECFA0000\0"                                          \
 803 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
 804         " console=$consoledev,$baudrate $othbootargs; "                 \
 805         "run norloadrecovery; "                                         \
 806         "bootm $kerneladdr - $dtbaddr\0"                                \
 807 "norbootworking=setenv bootargs $workingbootargs"                       \
 808         " console=$consoledev,$baudrate $othbootargs; "                 \
 809         "run norloadworking; "                                          \
 810         "bootm $kerneladdr - $dtbaddr\0"                                \
 811 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
 812         "setenv cramfsaddr $nor_recoveryaddr; "                         \
 813         "cramfsload $dtbaddr $dtbfile; "                                \
 814         "cramfsload $kerneladdr $kernelfile\0"                          \
 815 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
 816         "setenv cramfsaddr $nor_workingaddr; "                          \
 817         "cramfsload $dtbaddr $dtbfile; "                                \
 818         "cramfsload $kerneladdr $kernelfile\0"                          \
 819 "othbootargs=quiet\0"                                                   \
 820 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 821         " console=$consoledev,$baudrate $othbootargs; "                 \
 822         "tftp $rootfsaddr $rootfsfile; "                                \
 823         "tftp $loadaddr $kernelfile; "                                  \
 824         "tftp $dtbaddr $dtbfile; "                                      \
 825         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 826 "ramdisk_size=120000\0"                                                 \
 827 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 828 "recoveryaddr=0x02F00000\0"                                             \
 829 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
 830 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 831         "mw.l 0xffe0f008 0x00400000\0"                                  \
 832 "rootfsaddr=0x02F00000\0"                                               \
 833 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 834 "rootpath=/opt/nfsroot\0"                                               \
 835 "silent=1\0"                                                            \
 836 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 837         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 838         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 839         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 840         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 841         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 842 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 843 "ubootaddr=0x01000000\0"                                                \
 844 "ubootfile=u-boot.bin\0"                                                \
 845 "upgrade=run flashworking\0"                                            \
 846 "workingaddr=0x02F00000\0"                                              \
 847 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
 848
 849 #else /* For Arcturus Modules */
 850
 851 #define CONFIG_BOOTDELAY 2 /* autoboot after 2 sec, -1 disables auto-boot */
 852 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
 853 "bootcmd=run norkernel\0"                                               \
 854 "bootfile=uImage\0"                                                     \
 855 "consoledev=ttyS0\0"                                                    \
 856 "dtbaddr=0x00c00000\0"                                                  \
 857 "dtbfile=image.dtb\0"                                                   \
 858 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
 859 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
 860 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
 861 "fileaddr=0x01000000\0"                                                 \
 862 "filesize=0x00080000\0"                                                 \
 863 "flashmbr=sf probe 0; "                                                 \
 864         "tftp $loadaddr $mbr; "                                         \
 865         "sf erase $mbr_offset +$filesize; "                             \
 866         "sf write $loadaddr $mbr_offset $filesize\0"                    \
 867 "flashuboot=tftp $loadaddr $ubootfile; "                                \
 868         "protect off $nor_ubootaddr0 +$filesize; "                      \
 869         "erase $nor_ubootaddr0 +$filesize; "                            \
 870         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
 871         "protect on $nor_ubootaddr0 +$filesize; "                       \
 872         "protect off $nor_ubootaddr1 +$filesize; "                      \
 873         "erase $nor_ubootaddr1 +$filesize; "                            \
 874         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
 875         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
 876 "format0=protect off $part0base +$part0size; "                          \
 877         "erase $part0base +$part0size\0"                                \
 878 "format1=protect off $part1base +$part1size; "                          \
 879         "erase $part1base +$part1size\0"                                \
 880 "format2=protect off $part2base +$part2size; "                          \
 881         "erase $part2base +$part2size\0"                                \
 882 "format3=protect off $part3base +$part3size; "                          \
 883         "erase $part3base +$part3size\0"                                \
 884 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
 885 "kerneladdr=0x01100000\0"                                               \
 886 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
 887 "kernelfile=uImage\0"                                                   \
 888 "loadaddr=0x01000000\0"                                                 \
 889 "mbr=uCP1020.mbr\0"                                                     \
 890 "mbr_offset=0x00000000\0"                                               \
 891 "netdev=eth0\0"                                                         \
 892 "nor_ubootaddr0=0xEC000000\0"                                           \
 893 "nor_ubootaddr1=0xEFF80000\0"                                           \
 894 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
 895         "run norkernelload; "                                           \
 896         "bootm $kerneladdr - $dtbaddr\0"                                \
 897 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
 898         "setenv cramfsaddr $part0base; "                                \
 899         "cramfsload $dtbaddr $dtbfile; "                                \
 900         "cramfsload $kerneladdr $kernelfile\0"                          \
 901 "part0base=0xEC100000\0"                                                \
 902 "part0size=0x00700000\0"                                                \
 903 "part1base=0xEC800000\0"                                                \
 904 "part1size=0x02000000\0"                                                \
 905 "part2base=0xEE800000\0"                                                \
 906 "part2size=0x00800000\0"                                                \
 907 "part3base=0xEF000000\0"                                                \
 908 "part3size=0x00F80000\0"                                                \
 909 "partENVbase=0xEC080000\0"                                              \
 910 "partENVsize=0x00080000\0"                                              \
 911 "program0=tftp part0-000000.bin; "                                      \
 912         "protect off $part0base +$filesize; "                           \
 913         "erase $part0base +$filesize; "                                 \
 914         "cp.b $loadaddr $part0base $filesize; "                         \
 915         "echo Verifying...; "                                           \
 916         "cmp.b $loadaddr $part0base $filesize\0"                        \
 917 "program1=tftp part1-000000.bin; "                                      \
 918         "protect off $part1base +$filesize; "                           \
 919         "erase $part1base +$filesize; "                                 \
 920         "cp.b $loadaddr $part1base $filesize; "                         \
 921         "echo Verifying...; "                                           \
 922         "cmp.b $loadaddr $part1base $filesize\0"                        \
 923 "program2=tftp part2-000000.bin; "                                      \
 924         "protect off $part2base +$filesize; "                           \
 925         "erase $part2base +$filesize; "                                 \
 926         "cp.b $loadaddr $part2base $filesize; "                         \
 927         "echo Verifying...; "                                           \
 928         "cmp.b $loadaddr $part2base $filesize\0"                        \
 929 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
 930         "  console=$consoledev,$baudrate $othbootargs; "                \
 931         "tftp $rootfsaddr $rootfsfile; "                                \
 932         "tftp $loadaddr $kernelfile; "                                  \
 933         "tftp $dtbaddr $dtbfile; "                                      \
 934         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
 935 "ramdisk_size=120000\0"                                                 \
 936 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
 937 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
 938         "mw.l 0xffe0f008 0x00400000\0"                                  \
 939 "rootfsaddr=0x02F00000\0"                                               \
 940 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
 941 "rootpath=/opt/nfsroot\0"                                               \
 942 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
 943         "sf probe 0; sf erase 0 +$filesize; "                           \
 944         "sf write $loadaddr 0 $filesize\0"                              \
 945 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
 946         "protect off 0xeC000000 +$filesize; "                           \
 947         "erase 0xEC000000 +$filesize; "                                 \
 948         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
 949         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
 950         "protect on 0xeC000000 +$filesize\0"                            \
 951 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
 952         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 953         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
 954         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
 955         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
 956         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
 957 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
 958 "ubootfile=u-boot.bin\0"                                                \
 959 "upgrade=run flashuboot\0"                                              \
 960 "usb_phy_type=ulpi\0 "                                                  \
 961 "boot_nfs= "                                                            \
 962         "setenv bootargs root=/dev/nfs rw "                             \
 963         "nfsroot=$serverip:$rootpath "                                  \
 964         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
 965         "console=$consoledev,$baudrate $othbootargs;"                   \
 966         "tftp $loadaddr $bootfile;"                                     \
 967         "tftp $fdtaddr $fdtfile;"                                       \
 968         "bootm $loadaddr - $fdtaddr\0"                                  \
 969 "boot_hd = "                                                            \
 970         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
 971         "console=$consoledev,$baudrate $othbootargs;"                   \
 972         "usb start;"                                                    \
 973         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
 974         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
 975         "bootm $loadaddr - $fdtaddr\0"                                  \
 976 "boot_usb_fat = "                                                       \
 977         "setenv bootargs root=/dev/ram rw "                             \
 978         "console=$consoledev,$baudrate $othbootargs "                   \
 979         "ramdisk_size=$ramdisk_size;"                                   \
 980         "usb start;"                                                    \
 981         "fatload usb 0:2 $loadaddr $bootfile;"                          \
 982         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
 983         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
 984         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 985 "boot_usb_ext2 = "                                                      \
 986         "setenv bootargs root=/dev/ram rw "                             \
 987         "console=$consoledev,$baudrate $othbootargs "                   \
 988         "ramdisk_size=$ramdisk_size;"                                   \
 989         "usb start;"                                                    \
 990         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
 991         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
 992         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
 993         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
 994 "boot_nor = "                                                           \
 995         "setenv bootargs root=/dev/$jffs2nor rw "                       \
 996         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
 997         "bootm $norbootaddr - $norfdtaddr\0 "                           \
 998 "boot_ram = "                                                           \
 999         "setenv bootargs root=/dev/ram rw "                             \
1000         "console=$consoledev,$baudrate $othbootargs "                   \
1001         "ramdisk_size=$ramdisk_size;"                                   \
1002         "tftp $ramdiskaddr $ramdiskfile;"                               \
1003         "tftp $loadaddr $bootfile;"                                     \
1004         "tftp $fdtaddr $fdtfile;"                                       \
1005         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
1006
1007 #endif
1008 #endif
1009
1010 #endif /* __CONFIG_H */