ARM: configs: Add da850evm_nand to boot from NAND
[oweals/u-boot.git] / include / configs / UCP1020.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2013-2015 Arcturus Networks, Inc.
4  *           http://www.arcturusnetworks.com/products/ucp1020/
5  * based on include/configs/p1_p2_rdb_pc.h
6  * original copyright follows:
7  * Copyright 2009-2011 Freescale Semiconductor, Inc.
8  */
9
10 /*
11  * QorIQ uCP1020-xx boards configuration file
12  */
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15
16 #define CONFIG_PCIE1    /* PCIE controller 1 (slot 1) */
17 #define CONFIG_PCIE2    /* PCIE controller 2 (slot 2) */
18 #define CONFIG_FSL_PCI_INIT     /* Use common FSL init code */
19 #define CONFIG_PCI_INDIRECT_BRIDGE      /* indirect PCI bridge support */
20 #define CONFIG_FSL_PCIE_RESET   /* need PCIe reset errata */
21 #define CONFIG_SYS_PCI_64BIT    /* enable 64-bit PCI resources */
22
23 #if defined(CONFIG_TARTGET_UCP1020T1)
24
25 #define CONFIG_UCP1020_REV_1_3
26
27 #define CONFIG_BOARDNAME "uCP1020-64EE512-0U1-XR-T1"
28
29 #define CONFIG_TSEC1
30 #define CONFIG_TSEC3
31 #define CONFIG_HAS_ETH0
32 #define CONFIG_HAS_ETH1
33 #define CONFIG_ETHADDR          00:19:D3:FF:FF:FF
34 #define CONFIG_ETH1ADDR         00:19:D3:FF:FF:FE
35 #define CONFIG_ETH2ADDR         00:19:D3:FF:FF:FD
36 #define CONFIG_IPADDR           10.80.41.229
37 #define CONFIG_SERVERIP         10.80.41.227
38 #define CONFIG_NETMASK          255.255.252.0
39 #define CONFIG_ETHPRIME         "eTSEC3"
40
41 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
42
43 #define CONFIG_SYS_L2_SIZE      (256 << 10)
44
45 #endif
46
47 #if defined(CONFIG_TARGET_UCP1020)
48
49 #define CONFIG_UCP1020
50 #define CONFIG_UCP1020_REV_1_3
51
52 #define CONFIG_BOARDNAME_LOCAL "uCP1020-64EEE512-OU1-XR"
53
54 #define CONFIG_TSEC1
55 #define CONFIG_TSEC2
56 #define CONFIG_TSEC3
57 #define CONFIG_HAS_ETH0
58 #define CONFIG_HAS_ETH1
59 #define CONFIG_HAS_ETH2
60 #define CONFIG_ETHADDR          00:06:3B:FF:FF:FF
61 #define CONFIG_ETH1ADDR         00:06:3B:FF:FF:FE
62 #define CONFIG_ETH2ADDR         00:06:3B:FF:FF:FD
63 #define CONFIG_IPADDR           192.168.1.81
64 #define CONFIG_IPADDR1          192.168.1.82
65 #define CONFIG_IPADDR2          192.168.1.83
66 #define CONFIG_SERVERIP         192.168.1.80
67 #define CONFIG_GATEWAYIP        102.168.1.1
68 #define CONFIG_NETMASK          255.255.255.0
69 #define CONFIG_ETHPRIME         "eTSEC1"
70
71 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
72
73 #define CONFIG_SYS_L2_SIZE      (256 << 10)
74
75 #endif
76
77 #ifdef CONFIG_SDCARD
78 #define CONFIG_RAMBOOT_SDCARD
79 #define CONFIG_SYS_RAMBOOT
80 #define CONFIG_SYS_EXTRA_ENV_RELOC
81 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
82 #endif
83
84 #ifdef CONFIG_SPIFLASH
85 #define CONFIG_RAMBOOT_SPIFLASH
86 #define CONFIG_SYS_RAMBOOT
87 #define CONFIG_SYS_EXTRA_ENV_RELOC
88 #define CONFIG_RESET_VECTOR_ADDRESS     0x1107fffc
89 #endif
90
91 #define CONFIG_SYS_TEXT_BASE_NOR        0xeff80000
92
93 #ifndef CONFIG_RESET_VECTOR_ADDRESS
94 #define CONFIG_RESET_VECTOR_ADDRESS     0xeffffffc
95 #endif
96
97 #ifndef CONFIG_SYS_MONITOR_BASE
98 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE    /* start of monitor */
99 #endif
100
101 #define CONFIG_ENV_OVERWRITE
102
103 #define CONFIG_SYS_SATA_MAX_DEVICE      2
104 #define CONFIG_LBA48
105
106 #define CONFIG_SYS_CLK_FREQ     66666666
107 #define CONFIG_DDR_CLK_FREQ     66666666
108
109 #define CONFIG_HWCONFIG
110
111 /*
112  * These can be toggled for performance analysis, otherwise use default.
113  */
114 #define CONFIG_L2_CACHE
115 #define CONFIG_BTB
116
117 #define CONFIG_ENABLE_36BIT_PHYS
118
119 #define CONFIG_SYS_MEMTEST_START        0x00200000      /* memtest works on */
120 #define CONFIG_SYS_MEMTEST_END          0x1fffffff
121
122 #define CONFIG_SYS_CCSRBAR              0xffe00000
123 #define CONFIG_SYS_CCSRBAR_PHYS_LOW     CONFIG_SYS_CCSRBAR
124
125 /* IN case of NAND bootloader relocate CCSRBAR in RAMboot code not in the 4k
126        SPL code*/
127 #ifdef CONFIG_SPL_BUILD
128 #define CONFIG_SYS_CCSR_DO_NOT_RELOCATE
129 #endif
130
131 /* DDR Setup */
132 #define CONFIG_DDR_ECC_ENABLE
133 #ifndef CONFIG_DDR_ECC_ENABLE
134 #define CONFIG_SYS_DDR_RAW_TIMING
135 #define CONFIG_DDR_SPD
136 #endif
137 #define CONFIG_SYS_SPD_BUS_NUM 1
138 #undef CONFIG_FSL_DDR_INTERACTIVE
139
140 #define CONFIG_SYS_SDRAM_SIZE_LAW       LAW_SIZE_512M
141 #define CONFIG_CHIP_SELECTS_PER_CTRL    1
142 #define CONFIG_SYS_SDRAM_SIZE           (1u << (CONFIG_SYS_SDRAM_SIZE_LAW - 19))
143 #define CONFIG_SYS_DDR_SDRAM_BASE       0x00000000
144 #define CONFIG_SYS_SDRAM_BASE           CONFIG_SYS_DDR_SDRAM_BASE
145
146 #define CONFIG_DIMM_SLOTS_PER_CTLR      1
147
148 /* Default settings for DDR3 */
149 #define CONFIG_SYS_DDR_CS0_BNDS         0x0000003f
150 #define CONFIG_SYS_DDR_CS0_CONFIG       0x80014302
151 #define CONFIG_SYS_DDR_CS0_CONFIG_2     0x00000000
152 #define CONFIG_SYS_DDR_CS1_BNDS         0x0040007f
153 #define CONFIG_SYS_DDR_CS1_CONFIG       0x80014302
154 #define CONFIG_SYS_DDR_CS1_CONFIG_2     0x00000000
155
156 #define CONFIG_SYS_DDR_DATA_INIT        0xdeadbeef
157 #define CONFIG_SYS_DDR_INIT_ADDR        0x00000000
158 #define CONFIG_SYS_DDR_INIT_EXT_ADDR    0x00000000
159 #define CONFIG_SYS_DDR_MODE_CONTROL     0x00000000
160
161 #define CONFIG_SYS_DDR_ZQ_CONTROL       0x89080600
162 #define CONFIG_SYS_DDR_WRLVL_CONTROL    0x8655A608
163 #define CONFIG_SYS_DDR_SR_CNTR          0x00000000
164 #define CONFIG_SYS_DDR_RCW_1            0x00000000
165 #define CONFIG_SYS_DDR_RCW_2            0x00000000
166 #ifdef CONFIG_DDR_ECC_ENABLE
167 #define CONFIG_SYS_DDR_CONTROL          0xE70C0000      /* Type = DDR3 & ECC */
168 #else
169 #define CONFIG_SYS_DDR_CONTROL          0xC70C0000      /* Type = DDR3 */
170 #endif
171 #define CONFIG_SYS_DDR_CONTROL_2        0x04401050
172 #define CONFIG_SYS_DDR_TIMING_4         0x00220001
173 #define CONFIG_SYS_DDR_TIMING_5         0x03402400
174
175 #define CONFIG_SYS_DDR_TIMING_3         0x00020000
176 #define CONFIG_SYS_DDR_TIMING_0         0x00330004
177 #define CONFIG_SYS_DDR_TIMING_1         0x6f6B4846
178 #define CONFIG_SYS_DDR_TIMING_2         0x0FA8C8CF
179 #define CONFIG_SYS_DDR_CLK_CTRL         0x03000000
180 #define CONFIG_SYS_DDR_MODE_1           0x40461520
181 #define CONFIG_SYS_DDR_MODE_2           0x8000c000
182 #define CONFIG_SYS_DDR_INTERVAL         0x0C300000
183
184 #undef CONFIG_CLOCKS_IN_MHZ
185
186 /*
187  * Memory map
188  *
189  * 0x0000_0000 0x7fff_ffff      DDR             Up to 2GB cacheable
190  * 0x8000_0000 0xdfff_ffff      PCI Express Mem 1G non-cacheable(PCIe * 2)
191  * 0xec00_0000 0xefff_ffff      NOR flash       Up to 64M non-cacheable CS0/1
192  * 0xf8f8_0000 0xf8ff_ffff      L2 SRAM         Up to 256K cacheable
193  *   (early boot only)
194  * 0xffc0_0000 0xffc3_ffff      PCI IO range    256k non-cacheable
195  * 0xffd0_0000 0xffd0_3fff      L1 for stack    16K cacheable
196  * 0xffe0_0000 0xffef_ffff      CCSR            1M non-cacheable
197  */
198
199 /*
200  * Local Bus Definitions
201  */
202 #define CONFIG_SYS_MAX_FLASH_SECT       512     /* 64M */
203 #define CONFIG_SYS_FLASH_BASE           0xec000000
204
205 #define CONFIG_SYS_FLASH_BASE_PHYS      CONFIG_SYS_FLASH_BASE
206
207 #define CONFIG_FLASH_BR_PRELIM (BR_PHYS_ADDR(CONFIG_SYS_FLASH_BASE_PHYS) \
208         | BR_PS_16 | BR_V)
209
210 #define CONFIG_FLASH_OR_PRELIM          0xfc000ff7
211
212 #define CONFIG_SYS_FLASH_BANKS_LIST     {CONFIG_SYS_FLASH_BASE_PHYS}
213 #define CONFIG_SYS_FLASH_QUIET_TEST
214 #define CONFIG_FLASH_SHOW_PROGRESS      45      /* count down from 45/5: 9..1 */
215
216 #define CONFIG_SYS_MAX_FLASH_BANKS      1       /* number of banks */
217
218 #undef CONFIG_SYS_FLASH_CHECKSUM
219 #define CONFIG_SYS_FLASH_ERASE_TOUT     60000   /* Flash Erase Timeout (ms) */
220 #define CONFIG_SYS_FLASH_WRITE_TOUT     500     /* Flash Write Timeout (ms) */
221
222 #define CONFIG_FLASH_CFI_DRIVER
223 #define CONFIG_SYS_FLASH_CFI
224 #define CONFIG_SYS_FLASH_EMPTY_INFO
225 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
226
227 #define CONFIG_SYS_INIT_RAM_LOCK
228 #define CONFIG_SYS_INIT_RAM_ADDR        0xffd00000 /* stack in RAM */
229 /* Initial L1 address */
230 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS   CONFIG_SYS_INIT_RAM_ADDR
231 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_HIGH 0
232 #define CONFIG_SYS_INIT_RAM_ADDR_PHYS_LOW CONFIG_SYS_INIT_RAM_ADDR_PHYS
233 /* Size of used area in RAM */
234 #define CONFIG_SYS_INIT_RAM_SIZE        0x00004000
235
236 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
237                                         GENERATED_GBL_DATA_SIZE)
238 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
239
240 #define CONFIG_SYS_MONITOR_LEN  (256 * 1024)/* Reserve 256 kB for Mon */
241 #define CONFIG_SYS_MALLOC_LEN   (1024 * 1024)/* Reserved for malloc */
242
243 #define CONFIG_SYS_PMC_BASE     0xff980000
244 #define CONFIG_SYS_PMC_BASE_PHYS        CONFIG_SYS_PMC_BASE
245 #define CONFIG_PMC_BR_PRELIM    (BR_PHYS_ADDR(CONFIG_SYS_PMC_BASE_PHYS) | \
246                                         BR_PS_8 | BR_V)
247 #define CONFIG_PMC_OR_PRELIM    (OR_AM_64KB | OR_GPCM_CSNT | OR_GPCM_XACS | \
248                                  OR_GPCM_SCY | OR_GPCM_TRLX | OR_GPCM_EHTR | \
249                                  OR_GPCM_EAD)
250
251 #define CONFIG_SYS_BR0_PRELIM   CONFIG_FLASH_BR_PRELIM  /* NOR Base Address */
252 #define CONFIG_SYS_OR0_PRELIM   CONFIG_FLASH_OR_PRELIM  /* NOR Options */
253 #ifdef CONFIG_NAND_FSL_ELBC
254 #define CONFIG_SYS_BR1_PRELIM   CONFIG_SYS_NAND_BR_PRELIM /* NAND Base Addr */
255 #define CONFIG_SYS_OR1_PRELIM   CONFIG_SYS_NAND_OR_PRELIM /* NAND Options */
256 #endif
257
258 /* Serial Port - controlled on board with jumper J8
259  * open - index 2
260  * shorted - index 1
261  */
262 #undef CONFIG_SERIAL_SOFTWARE_FIFO
263 #define CONFIG_SYS_NS16550_SERIAL
264 #define CONFIG_SYS_NS16550_REG_SIZE     1
265 #define CONFIG_SYS_NS16550_CLK          get_bus_freq(0)
266 #if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_INIT_MINIMAL)
267 #define CONFIG_NS16550_MIN_FUNCTIONS
268 #endif
269
270 #define CONFIG_SYS_BAUDRATE_TABLE       \
271         {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
272
273 #define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR + 0x4500)
274 #define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR + 0x4600)
275
276 /* I2C */
277 #define CONFIG_SYS_I2C
278 #define CONFIG_SYS_I2C_FSL
279 #define CONFIG_SYS_FSL_I2C_SPEED        400000
280 #define CONFIG_SYS_FSL_I2C_SLAVE        0x7F
281 #define CONFIG_SYS_FSL_I2C_OFFSET       0x3000
282 #define CONFIG_SYS_FSL_I2C2_SPEED       400000
283 #define CONFIG_SYS_FSL_I2C2_SLAVE       0x7F
284 #define CONFIG_SYS_FSL_I2C2_OFFSET      0x3100
285 #define CONFIG_SYS_I2C_NOPROBES         { {0, 0x29} }
286 #define CONFIG_SYS_SPD_BUS_NUM          1 /* For rom_loc and flash bank */
287
288 #define CONFIG_RTC_DS1337
289 #define CONFIG_RTC_DS1337_NOOSC
290 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
291 #define CONFIG_SYS_I2C_PCA9557_ADDR     0x18
292 #define CONFIG_SYS_I2C_NCT72_ADDR       0x4C
293 #define CONFIG_SYS_I2C_IDT6V49205B      0x69
294
295 /*
296  * eSPI - Enhanced SPI
297  */
298 #define CONFIG_HARD_SPI
299
300 #define CONFIG_SF_DEFAULT_SPEED         10000000
301 #define CONFIG_SF_DEFAULT_MODE          SPI_MODE_0
302
303 #if defined(CONFIG_PCI)
304 /*
305  * General PCI
306  * Memory space is mapped 1-1, but I/O space must start from 0.
307  */
308
309 /* controller 2, direct to uli, tgtid 2, Base address 9000 */
310 #define CONFIG_SYS_PCIE2_NAME           "PCIe SLOT CON9"
311 #define CONFIG_SYS_PCIE2_MEM_VIRT       0xa0000000
312 #define CONFIG_SYS_PCIE2_MEM_BUS        0xa0000000
313 #define CONFIG_SYS_PCIE2_MEM_PHYS       0xa0000000
314 #define CONFIG_SYS_PCIE2_MEM_SIZE       0x20000000      /* 512M */
315 #define CONFIG_SYS_PCIE2_IO_VIRT        0xffc10000
316 #define CONFIG_SYS_PCIE2_IO_BUS         0x00000000
317 #define CONFIG_SYS_PCIE2_IO_PHYS        0xffc10000
318 #define CONFIG_SYS_PCIE2_IO_SIZE        0x00010000      /* 64k */
319
320 /* controller 1, Slot 2, tgtid 1, Base address a000 */
321 #define CONFIG_SYS_PCIE1_NAME           "PCIe SLOT CON10"
322 #define CONFIG_SYS_PCIE1_MEM_VIRT       0x80000000
323 #define CONFIG_SYS_PCIE1_MEM_BUS        0x80000000
324 #define CONFIG_SYS_PCIE1_MEM_PHYS       0x80000000
325 #define CONFIG_SYS_PCIE1_MEM_SIZE       0x20000000      /* 512M */
326 #define CONFIG_SYS_PCIE1_IO_VIRT        0xffc00000
327 #define CONFIG_SYS_PCIE1_IO_BUS         0x00000000
328 #define CONFIG_SYS_PCIE1_IO_PHYS        0xffc00000
329 #define CONFIG_SYS_PCIE1_IO_SIZE        0x00010000      /* 64k */
330
331 #define CONFIG_PCI_SCAN_SHOW    /* show pci devices on startup */
332 #endif /* CONFIG_PCI */
333
334 /*
335  * Environment
336  */
337 #ifdef CONFIG_ENV_FIT_UCBOOT
338
339 #define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x20000)
340 #define CONFIG_ENV_SIZE         0x20000
341 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
342
343 #else
344
345 #define CONFIG_ENV_SPI_BUS      0
346 #define CONFIG_ENV_SPI_CS       0
347 #define CONFIG_ENV_SPI_MAX_HZ   10000000
348 #define CONFIG_ENV_SPI_MODE     0
349
350 #ifdef CONFIG_RAMBOOT_SPIFLASH
351
352 #define CONFIG_ENV_SIZE         0x3000          /* 12KB */
353 #define CONFIG_ENV_OFFSET       0x2000          /* 8KB */
354 #define CONFIG_ENV_SECT_SIZE    0x1000
355
356 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
357 /* Address and size of Redundant Environment Sector     */
358 #define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
359 #define CONFIG_ENV_SIZE_REDUND          CONFIG_ENV_SIZE
360 #endif
361
362 #elif defined(CONFIG_RAMBOOT_SDCARD)
363 #define CONFIG_FSL_FIXED_MMC_LOCATION
364 #define CONFIG_ENV_SIZE         0x2000
365 #define CONFIG_SYS_MMC_ENV_DEV  0
366
367 #elif defined(CONFIG_SYS_RAMBOOT)
368 #define CONFIG_ENV_ADDR         (CONFIG_SYS_MONITOR_BASE - 0x1000)
369 #define CONFIG_ENV_SIZE         0x2000
370
371 #else
372 #define CONFIG_ENV_BASE         (CONFIG_SYS_FLASH_BASE)
373 #define CONFIG_ENV_SECT_SIZE    0x20000 /* 128K (one sector) */
374 #define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
375 #define CONFIG_ENV_ADDR         (CONFIG_ENV_BASE + 0xC0000)
376 #if defined(CONFIG_SYS_REDUNDAND_ENVIRONMENT)
377 /* Address and size of Redundant Environment Sector     */
378 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR + CONFIG_ENV_SIZE)
379 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
380 #endif
381
382 #endif
383
384 #endif  /* CONFIG_ENV_FIT_UCBOOT */
385
386 #define CONFIG_LOADS_ECHO               /* echo on for serial download */
387 #define CONFIG_SYS_LOADS_BAUD_CHANGE    /* allow baudrate change */
388
389 /*
390  * USB
391  */
392 #define CONFIG_HAS_FSL_DR_USB
393
394 #if defined(CONFIG_HAS_FSL_DR_USB)
395 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
396
397 #ifdef CONFIG_USB_EHCI_HCD
398 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
399 #define CONFIG_USB_EHCI_FSL
400 #endif
401 #endif
402
403 #undef CONFIG_WATCHDOG                  /* watchdog disabled */
404
405 #ifdef CONFIG_MMC
406 #define CONFIG_SYS_FSL_ESDHC_ADDR       CONFIG_SYS_MPC85xx_ESDHC_ADDR
407 #define CONFIG_MMC_SPI
408 #endif
409
410 /* Misc Extra Settings */
411 #undef CONFIG_WATCHDOG  /* watchdog disabled */
412
413 /*
414  * Miscellaneous configurable options
415  */
416 #define CONFIG_SYS_LOAD_ADDR    0x2000000       /* default load address */
417 #define CONFIG_SYS_HZ           1000    /* decrementer freq: 1ms tick */
418
419 /*
420  * For booting Linux, the board info and command line data
421  * have to be in the first 64 MB of memory, since this is
422  * the maximum mapped by the Linux kernel during initialization.
423  */
424 #define CONFIG_SYS_BOOTMAPSZ    (64 << 20)      /* Initial Memory for Linux*/
425 #define CONFIG_SYS_BOOTM_LEN    (64 << 20)      /* Increase max gunzip size */
426
427 #if defined(CONFIG_CMD_KGDB)
428 #define CONFIG_KGDB_BAUDRATE    230400  /* speed to run kgdb serial port */
429 #define CONFIG_KGDB_SER_INDEX   2       /* which serial port to use */
430 #endif
431
432 /*
433  * Environment Configuration
434  */
435
436 #if defined(CONFIG_TSEC_ENET)
437
438 #if defined(CONFIG_UCP1020_REV_1_2) || defined(CONFIG_UCP1020_REV_1_3)
439 #else
440 #error "UCP1020 module revision is not defined !!!"
441 #endif
442
443 #define CONFIG_BOOTP_SERVERIP
444
445 #define CONFIG_TSEC1_NAME       "eTSEC1"
446 #define CONFIG_TSEC2_NAME       "eTSEC2"
447 #define CONFIG_TSEC3_NAME       "eTSEC3"
448
449 #define TSEC1_PHY_ADDR  4
450 #define TSEC2_PHY_ADDR  0
451 #define TSEC2_PHY_ADDR_SGMII    0x00
452 #define TSEC3_PHY_ADDR  6
453
454 #define TSEC1_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
455 #define TSEC2_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
456 #define TSEC3_FLAGS     (TSEC_GIGABIT | TSEC_REDUCED)
457
458 #define TSEC1_PHYIDX    0
459 #define TSEC2_PHYIDX    0
460 #define TSEC3_PHYIDX    0
461
462 #endif
463
464 #define CONFIG_HOSTNAME         "UCP1020"
465 #define CONFIG_ROOTPATH         "/opt/nfsroot"
466 #define CONFIG_BOOTFILE         "uImage"
467 #define CONFIG_UBOOTPATH        u-boot.bin /* U-Boot image on TFTP server */
468
469 /* default location for tftp and bootm */
470 #define CONFIG_LOADADDR         1000000
471
472 #if defined(CONFIG_DONGLE)
473
474 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
475 "bootcmd=run prog_spi_mbrbootcramfs\0"                                  \
476 "bootfile=uImage\0"                                                     \
477 "consoledev=ttyS0\0"                                                    \
478 "cramfsfile=image.cramfs\0"                                             \
479 "dtbaddr=0x00c00000\0"                                                  \
480 "dtbfile=image.dtb\0"                                                   \
481 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
482 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
483 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
484 "fileaddr=0x01000000\0"                                                 \
485 "filesize=0x00080000\0"                                                 \
486 "flashmbr=sf probe 0; "                                                 \
487         "tftp $loadaddr $mbr; "                                         \
488         "sf erase $mbr_offset +$filesize; "                             \
489         "sf write $loadaddr $mbr_offset $filesize\0"                    \
490 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
491         "protect off $nor_recoveryaddr +$filesize; "                    \
492         "erase $nor_recoveryaddr +$filesize; "                          \
493         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
494         "protect on $nor_recoveryaddr +$filesize\0 "                    \
495 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
496         "protect off $nor_ubootaddr +$filesize; "                       \
497         "erase $nor_ubootaddr +$filesize; "                             \
498         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
499         "protect on $nor_ubootaddr +$filesize\0 "                       \
500 "flashworking=tftp $workingaddr $cramfsfile; "                          \
501         "protect off $nor_workingaddr +$filesize; "                     \
502         "erase $nor_workingaddr +$filesize; "                           \
503         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
504         "protect on $nor_workingaddr +$filesize\0 "                     \
505 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
506 "kerneladdr=0x01100000\0"                                               \
507 "kernelfile=uImage\0"                                                   \
508 "loadaddr=0x01000000\0"                                                 \
509 "mbr=uCP1020d.mbr\0"                                                    \
510 "mbr_offset=0x00000000\0"                                               \
511 "mmbr=uCP1020Quiet.mbr\0"                                               \
512 "mmcpart=0:2\0"                                                         \
513 "mmc__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
514         "mmc erase 1 1; "                                               \
515         "mmc write $loadaddr 1 1\0"                                     \
516 "mmc__uboot=fatload mmc $mmcpart $loadaddr $ubootfile; "                \
517         "mmc erase 0x40 0x400; "                                        \
518         "mmc write $loadaddr 0x40 0x400\0"                              \
519 "netdev=eth0\0"                                                         \
520 "nor_recoveryaddr=0xEC0A0000\0"                                         \
521 "nor_ubootaddr=0xEFF80000\0"                                            \
522 "nor_workingaddr=0xECFA0000\0"                                          \
523 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
524         " console=$consoledev,$baudrate $othbootargs; "                 \
525         "run norloadrecovery; "                                         \
526         "bootm $kerneladdr - $dtbaddr\0"                                \
527 "norbootworking=setenv bootargs $workingbootargs"                       \
528         " console=$consoledev,$baudrate $othbootargs; "                 \
529         "run norloadworking; "                                          \
530         "bootm $kerneladdr - $dtbaddr\0"                                \
531 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
532         "setenv cramfsaddr $nor_recoveryaddr; "                         \
533         "cramfsload $dtbaddr $dtbfile; "                                \
534         "cramfsload $kerneladdr $kernelfile\0"                          \
535 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
536         "setenv cramfsaddr $nor_workingaddr; "                          \
537         "cramfsload $dtbaddr $dtbfile; "                                \
538         "cramfsload $kerneladdr $kernelfile\0"                          \
539 "prog_spi_mbr=run spi__mbr\0"                                           \
540 "prog_spi_mbrboot=run spi__mbr; run spi__boot1; run spi__boot2\0"       \
541 "prog_spi_mbrbootcramfs=run spi__mbr; run spi__boot1; run spi__boot2; " \
542         "run spi__cramfs\0"                                             \
543 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
544         " console=$consoledev,$baudrate $othbootargs; "                 \
545         "tftp $rootfsaddr $rootfsfile; "                                \
546         "tftp $loadaddr $kernelfile; "                                  \
547         "tftp $dtbaddr $dtbfile; "                                      \
548         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
549 "ramdisk_size=120000\0"                                                 \
550 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
551 "recoveryaddr=0x02F00000\0"                                             \
552 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
553 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
554         "mw.l 0xffe0f008 0x00400000\0"                                  \
555 "rootfsaddr=0x02F00000\0"                                               \
556 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
557 "rootpath=/opt/nfsroot\0"                                               \
558 "spi__boot1=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
559         "protect off 0xeC000000 +$filesize; "                           \
560         "erase 0xEC000000 +$filesize; "                                 \
561         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
562         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
563         "protect on 0xeC000000 +$filesize\0"                            \
564 "spi__boot2=fatload mmc $mmcpart $loadaddr u-boot.bin; "                \
565         "protect off 0xeFF80000 +$filesize; "                           \
566         "erase 0xEFF80000 +$filesize; "                                 \
567         "cp.b $loadaddr 0xEFF80000 $filesize; "                         \
568         "cmp.b $loadaddr 0xEFF80000 $filesize; "                        \
569         "protect on 0xeFF80000 +$filesize\0"                            \
570 "spi__bootd=fatload mmc $mmcpart $loadaddr $ubootd; "                   \
571         "sf probe 0; sf erase 0x8000 +$filesize; "                      \
572         "sf write $loadaddr 0x8000 $filesize\0"                         \
573 "spi__cramfs=fatload mmc $mmcpart $loadaddr image.cramfs; "             \
574         "protect off 0xec0a0000 +$filesize; "                           \
575         "erase 0xeC0A0000 +$filesize; "                                 \
576         "cp.b $loadaddr 0xeC0A0000 $filesize; "                         \
577         "protect on 0xec0a0000 +$filesize\0"                            \
578 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
579         "sf probe 1; sf erase 0 +$filesize; "                           \
580         "sf write $loadaddr 0 $filesize\0"                              \
581 "spi__mbrd=fatload mmc $mmcpart $loadaddr $mbr; "                       \
582         "sf probe 0; sf erase 0 +$filesize; "                           \
583         "sf write $loadaddr 0 $filesize\0"                              \
584 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
585         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
586         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
587         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
588         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
589         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
590 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
591 "ubootaddr=0x01000000\0"                                                \
592 "ubootfile=u-boot.bin\0"                                                \
593 "ubootd=u-boot4dongle.bin\0"                                            \
594 "upgrade=run flashworking\0"                                            \
595 "usb_phy_type=ulpi\0 "                                                  \
596 "workingaddr=0x02F00000\0"                                              \
597 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
598
599 #else
600
601 #if defined(CONFIG_UCP1020T1)
602
603 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
604 "bootcmd=run releasefpga; run norbootworking || run norbootrecovery\0"  \
605 "bootfile=uImage\0"                                                     \
606 "consoledev=ttyS0\0"                                                    \
607 "cramfsfile=image.cramfs\0"                                             \
608 "dtbaddr=0x00c00000\0"                                                  \
609 "dtbfile=image.dtb\0"                                                   \
610 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
611 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
612 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
613 "fileaddr=0x01000000\0"                                                 \
614 "filesize=0x00080000\0"                                                 \
615 "flashmbr=sf probe 0; "                                                 \
616         "tftp $loadaddr $mbr; "                                         \
617         "sf erase $mbr_offset +$filesize; "                             \
618         "sf write $loadaddr $mbr_offset $filesize\0"                    \
619 "flashrecovery=tftp $recoveryaddr $cramfsfile; "                        \
620         "protect off $nor_recoveryaddr +$filesize; "                    \
621         "erase $nor_recoveryaddr +$filesize; "                          \
622         "cp.b $recoveryaddr $nor_recoveryaddr $filesize; "              \
623         "protect on $nor_recoveryaddr +$filesize\0 "                    \
624 "flashuboot=tftp $ubootaddr $ubootfile; "                               \
625         "protect off $nor_ubootaddr +$filesize; "                       \
626         "erase $nor_ubootaddr +$filesize; "                             \
627         "cp.b $ubootaddr $nor_ubootaddr $filesize; "                    \
628         "protect on $nor_ubootaddr +$filesize\0 "                       \
629 "flashworking=tftp $workingaddr $cramfsfile; "                          \
630         "protect off $nor_workingaddr +$filesize; "                     \
631         "erase $nor_workingaddr +$filesize; "                           \
632         "cp.b $workingaddr $nor_workingaddr $filesize; "                \
633         "protect on $nor_workingaddr +$filesize\0 "                     \
634 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
635 "kerneladdr=0x01100000\0"                                               \
636 "kernelfile=uImage\0"                                                   \
637 "loadaddr=0x01000000\0"                                                 \
638 "mbr=uCP1020.mbr\0"                                                     \
639 "mbr_offset=0x00000000\0"                                               \
640 "netdev=eth0\0"                                                         \
641 "nor_recoveryaddr=0xEC0A0000\0"                                         \
642 "nor_ubootaddr=0xEFF80000\0"                                            \
643 "nor_workingaddr=0xECFA0000\0"                                          \
644 "norbootrecovery=setenv bootargs $recoverybootargs"                     \
645         " console=$consoledev,$baudrate $othbootargs; "                 \
646         "run norloadrecovery; "                                         \
647         "bootm $kerneladdr - $dtbaddr\0"                                \
648 "norbootworking=setenv bootargs $workingbootargs"                       \
649         " console=$consoledev,$baudrate $othbootargs; "                 \
650         "run norloadworking; "                                          \
651         "bootm $kerneladdr - $dtbaddr\0"                                \
652 "norloadrecovery=mw.l $kerneladdr 0x0 0x00a00000; "                     \
653         "setenv cramfsaddr $nor_recoveryaddr; "                         \
654         "cramfsload $dtbaddr $dtbfile; "                                \
655         "cramfsload $kerneladdr $kernelfile\0"                          \
656 "norloadworking=mw.l $kerneladdr 0x0 0x00a00000; "                      \
657         "setenv cramfsaddr $nor_workingaddr; "                          \
658         "cramfsload $dtbaddr $dtbfile; "                                \
659         "cramfsload $kerneladdr $kernelfile\0"                          \
660 "othbootargs=quiet\0"                                                   \
661 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
662         " console=$consoledev,$baudrate $othbootargs; "                 \
663         "tftp $rootfsaddr $rootfsfile; "                                \
664         "tftp $loadaddr $kernelfile; "                                  \
665         "tftp $dtbaddr $dtbfile; "                                      \
666         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
667 "ramdisk_size=120000\0"                                                 \
668 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
669 "recoveryaddr=0x02F00000\0"                                             \
670 "recoverybootargs=root=/dev/mtdblock0 rootfstype=cramfs ro\0"           \
671 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
672         "mw.l 0xffe0f008 0x00400000\0"                                  \
673 "rootfsaddr=0x02F00000\0"                                               \
674 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
675 "rootpath=/opt/nfsroot\0"                                               \
676 "silent=1\0"                                                            \
677 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
678         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
679         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
680         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
681         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
682         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
683 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
684 "ubootaddr=0x01000000\0"                                                \
685 "ubootfile=u-boot.bin\0"                                                \
686 "upgrade=run flashworking\0"                                            \
687 "workingaddr=0x02F00000\0"                                              \
688 "workingbootargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"
689
690 #else /* For Arcturus Modules */
691
692 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
693 "bootcmd=run norkernel\0"                                               \
694 "bootfile=uImage\0"                                                     \
695 "consoledev=ttyS0\0"                                                    \
696 "dtbaddr=0x00c00000\0"                                                  \
697 "dtbfile=image.dtb\0"                                                   \
698 "ethaddr=" __stringify(CONFIG_ETHADDR) "\0"                             \
699 "eth1addr=" __stringify(CONFIG_ETH1ADDR) "\0"                           \
700 "eth2addr=" __stringify(CONFIG_ETH2ADDR) "\0"                           \
701 "fileaddr=0x01000000\0"                                                 \
702 "filesize=0x00080000\0"                                                 \
703 "flashmbr=sf probe 0; "                                                 \
704         "tftp $loadaddr $mbr; "                                         \
705         "sf erase $mbr_offset +$filesize; "                             \
706         "sf write $loadaddr $mbr_offset $filesize\0"                    \
707 "flashuboot=tftp $loadaddr $ubootfile; "                                \
708         "protect off $nor_ubootaddr0 +$filesize; "                      \
709         "erase $nor_ubootaddr0 +$filesize; "                            \
710         "cp.b $loadaddr $nor_ubootaddr0 $filesize; "                    \
711         "protect on $nor_ubootaddr0 +$filesize; "                       \
712         "protect off $nor_ubootaddr1 +$filesize; "                      \
713         "erase $nor_ubootaddr1 +$filesize; "                            \
714         "cp.b $loadaddr $nor_ubootaddr1 $filesize; "                    \
715         "protect on $nor_ubootaddr1 +$filesize\0 "                      \
716 "format0=protect off $part0base +$part0size; "                          \
717         "erase $part0base +$part0size\0"                                \
718 "format1=protect off $part1base +$part1size; "                          \
719         "erase $part1base +$part1size\0"                                \
720 "format2=protect off $part2base +$part2size; "                          \
721         "erase $part2base +$part2size\0"                                \
722 "format3=protect off $part3base +$part3size; "                          \
723         "erase $part3base +$part3size\0"                                \
724 "hwconfig=usb1:dr_mode=host,phy_type=ulpi\0 "                           \
725 "kerneladdr=0x01100000\0"                                               \
726 "kernelargs=root=/dev/mtdblock1 rootfstype=cramfs ro\0"                 \
727 "kernelfile=uImage\0"                                                   \
728 "loadaddr=0x01000000\0"                                                 \
729 "mbr=uCP1020.mbr\0"                                                     \
730 "mbr_offset=0x00000000\0"                                               \
731 "netdev=eth0\0"                                                         \
732 "nor_ubootaddr0=0xEC000000\0"                                           \
733 "nor_ubootaddr1=0xEFF80000\0"                                           \
734 "norkernel=setenv bootargs $kernelargs console=$consoledev,$baudrate; " \
735         "run norkernelload; "                                           \
736         "bootm $kerneladdr - $dtbaddr\0"                                \
737 "norkernelload=mw.l $kerneladdr 0x0 0x00a00000; "                       \
738         "setenv cramfsaddr $part0base; "                                \
739         "cramfsload $dtbaddr $dtbfile; "                                \
740         "cramfsload $kerneladdr $kernelfile\0"                          \
741 "part0base=0xEC100000\0"                                                \
742 "part0size=0x00700000\0"                                                \
743 "part1base=0xEC800000\0"                                                \
744 "part1size=0x02000000\0"                                                \
745 "part2base=0xEE800000\0"                                                \
746 "part2size=0x00800000\0"                                                \
747 "part3base=0xEF000000\0"                                                \
748 "part3size=0x00F80000\0"                                                \
749 "partENVbase=0xEC080000\0"                                              \
750 "partENVsize=0x00080000\0"                                              \
751 "program0=tftp part0-000000.bin; "                                      \
752         "protect off $part0base +$filesize; "                           \
753         "erase $part0base +$filesize; "                                 \
754         "cp.b $loadaddr $part0base $filesize; "                         \
755         "echo Verifying...; "                                           \
756         "cmp.b $loadaddr $part0base $filesize\0"                        \
757 "program1=tftp part1-000000.bin; "                                      \
758         "protect off $part1base +$filesize; "                           \
759         "erase $part1base +$filesize; "                                 \
760         "cp.b $loadaddr $part1base $filesize; "                         \
761         "echo Verifying...; "                                           \
762         "cmp.b $loadaddr $part1base $filesize\0"                        \
763 "program2=tftp part2-000000.bin; "                                      \
764         "protect off $part2base +$filesize; "                           \
765         "erase $part2base +$filesize; "                                 \
766         "cp.b $loadaddr $part2base $filesize; "                         \
767         "echo Verifying...; "                                           \
768         "cmp.b $loadaddr $part2base $filesize\0"                        \
769 "ramboot=setenv bootargs root=/dev/ram ramdisk_size=$ramdisk_size ro"   \
770         "  console=$consoledev,$baudrate $othbootargs; "                \
771         "tftp $rootfsaddr $rootfsfile; "                                \
772         "tftp $loadaddr $kernelfile; "                                  \
773         "tftp $dtbaddr $dtbfile; "                                      \
774         "bootm $loadaddr $rootfsaddr $dtbaddr\0"                        \
775 "ramdisk_size=120000\0"                                                 \
776 "ramdiskfile=rootfs.ext2.gz.uboot\0"                                    \
777 "releasefpga=mw.l 0xffe0f000 0x00400000; mw.l 0xffe0f004 0x00000000; "  \
778         "mw.l 0xffe0f008 0x00400000\0"                                  \
779 "rootfsaddr=0x02F00000\0"                                               \
780 "rootfsfile=rootfs.ext2.gz.uboot\0"                                     \
781 "rootpath=/opt/nfsroot\0"                                               \
782 "spi__mbr=fatload mmc $mmcpart $loadaddr $mmbr; "                       \
783         "sf probe 0; sf erase 0 +$filesize; "                           \
784         "sf write $loadaddr 0 $filesize\0"                              \
785 "spi__boot=fatload mmc $mmcpart $loadaddr u-boot.bin; "                 \
786         "protect off 0xeC000000 +$filesize; "                           \
787         "erase 0xEC000000 +$filesize; "                                 \
788         "cp.b $loadaddr 0xEC000000 $filesize; "                         \
789         "cmp.b $loadaddr 0xEC000000 $filesize; "                        \
790         "protect on 0xeC000000 +$filesize\0"                            \
791 "tftpflash=tftpboot $loadaddr $uboot; "                                 \
792         "protect off " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
793         "erase " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; "  \
794         "cp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize; " \
795         "protect on " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " +$filesize; " \
796         "cmp.b $loadaddr " __stringify(CONFIG_SYS_TEXT_BASE_NOR) " $filesize\0"\
797 "uboot= " __stringify(CONFIG_UBOOTPATH) "\0"                            \
798 "ubootfile=u-boot.bin\0"                                                \
799 "upgrade=run flashuboot\0"                                              \
800 "usb_phy_type=ulpi\0 "                                                  \
801 "boot_nfs= "                                                            \
802         "setenv bootargs root=/dev/nfs rw "                             \
803         "nfsroot=$serverip:$rootpath "                                  \
804         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
805         "console=$consoledev,$baudrate $othbootargs;"                   \
806         "tftp $loadaddr $bootfile;"                                     \
807         "tftp $fdtaddr $fdtfile;"                                       \
808         "bootm $loadaddr - $fdtaddr\0"                                  \
809 "boot_hd = "                                                            \
810         "setenv bootargs root=/dev/$bdev rw rootdelay=30 "              \
811         "console=$consoledev,$baudrate $othbootargs;"                   \
812         "usb start;"                                                    \
813         "ext2load usb 0:1 $loadaddr /boot/$bootfile;"                   \
814         "ext2load usb 0:1 $fdtaddr /boot/$fdtfile;"                     \
815         "bootm $loadaddr - $fdtaddr\0"                                  \
816 "boot_usb_fat = "                                                       \
817         "setenv bootargs root=/dev/ram rw "                             \
818         "console=$consoledev,$baudrate $othbootargs "                   \
819         "ramdisk_size=$ramdisk_size;"                                   \
820         "usb start;"                                                    \
821         "fatload usb 0:2 $loadaddr $bootfile;"                          \
822         "fatload usb 0:2 $fdtaddr $fdtfile;"                            \
823         "fatload usb 0:2 $ramdiskaddr $ramdiskfile;"                    \
824         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
825 "boot_usb_ext2 = "                                                      \
826         "setenv bootargs root=/dev/ram rw "                             \
827         "console=$consoledev,$baudrate $othbootargs "                   \
828         "ramdisk_size=$ramdisk_size;"                                   \
829         "usb start;"                                                    \
830         "ext2load usb 0:4 $loadaddr $bootfile;"                         \
831         "ext2load usb 0:4 $fdtaddr $fdtfile;"                           \
832         "ext2load usb 0:4 $ramdiskaddr $ramdiskfile;"                   \
833         "bootm $loadaddr $ramdiskaddr $fdtaddr\0 "                      \
834 "boot_nor = "                                                           \
835         "setenv bootargs root=/dev/$jffs2nor rw "                       \
836         "console=$consoledev,$baudrate rootfstype=jffs2 $othbootargs;"  \
837         "bootm $norbootaddr - $norfdtaddr\0 "                           \
838 "boot_ram = "                                                           \
839         "setenv bootargs root=/dev/ram rw "                             \
840         "console=$consoledev,$baudrate $othbootargs "                   \
841         "ramdisk_size=$ramdisk_size;"                                   \
842         "tftp $ramdiskaddr $ramdiskfile;"                               \
843         "tftp $loadaddr $bootfile;"                                     \
844         "tftp $fdtaddr $fdtfile;"                                       \
845         "bootm $loadaddr $ramdiskaddr $fdtaddr\0"
846
847 #endif
848 #endif
849
850 #endif /* __CONFIG_H */