2 * (C) Copyright 2003-2014
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * (C) Copyright 2004-2006
6 * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
19 #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */
20 #define CONFIG_TQM5200 1 /* ... on TQM5200 module */
21 #undef CONFIG_TQM5200_REV100 /* define for revision 100 modules */
22 #define CONFIG_DISPLAY_BOARDINFO
25 * Valid values for CONFIG_SYS_TEXT_BASE are:
26 * 0xFC000000 boot low (standard configuration with room for
27 * max 64 MByte Flash ROM)
28 * 0xFFF00000 boot high (for a backup copy of U-Boot)
29 * 0x00100000 boot from RAM (for testing only)
31 #ifndef CONFIG_SYS_TEXT_BASE
32 #define CONFIG_SYS_TEXT_BASE 0xFC000000
35 /* On a Cameron or on a FO300 board or ... */
36 #if !defined(CONFIG_CAM5200) && !defined(CONFIG_CHARON) \
37 && !defined(CONFIG_FO300)
38 #define CONFIG_STK52XX 1 /* ... on a STK52XX board */
41 #define CONFIG_SYS_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
43 #define CONFIG_HIGH_BATS 1 /* High BATs supported */
46 * Serial console configuration
48 #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
49 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
50 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
51 #define CONFIG_BOOTCOUNT_LIMIT 1
54 #define CONFIG_SYS_DEVICE_NULLDEV 1 /* enable null device */
55 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
56 #define CONFIG_BOARD_EARLY_INIT_F 1 /* used to detect S1 switch position */
57 #define CONFIG_USB_BIN_FIXUP 1 /* for a buggy USB device */
59 #define FO300_SILENT_CONSOLE_WHEN_S1_CLOSED 1 /* silent console on PSC1 when S1 */
60 /* switch is closed */
63 #undef FO300_SILENT_CONSOLE_WHEN_S1_CLOSED /* silent console on PSC1 when S1 */
65 #endif /* CONFIG_FO300 */
67 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
68 #define CONFIG_PS2KBD /* AT-PS/2 Keyboard */
69 #define CONFIG_PS2MULT /* .. on PS/2 Multiplexer */
70 #define CONFIG_PS2SERIAL 6 /* .. on PSC6 */
71 #define CONFIG_PS2MULT_DELAY (CONFIG_SYS_HZ/2) /* Initial delay */
72 #define CONFIG_BOARD_EARLY_INIT_R
73 #endif /* CONFIG_STK52XX */
77 * 0x40000000 - 0x4fffffff - PCI Memory
78 * 0x50000000 - 0x50ffffff - PCI IO Space
80 #if defined(CONFIG_CHARON) || defined(CONFIG_STK52XX)
82 #define CONFIG_PCI_PNP 1
83 /* #define CONFIG_PCI_SCAN_SHOW 1 */
85 #define CONFIG_PCI_MEM_BUS 0x40000000
86 #define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
87 #define CONFIG_PCI_MEM_SIZE 0x10000000
89 #define CONFIG_PCI_IO_BUS 0x50000000
90 #define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
91 #define CONFIG_PCI_IO_SIZE 0x01000000
93 #define CONFIG_EEPRO100 1
94 #define CONFIG_SYS_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
95 #define CONFIG_NS8382X 1
96 #endif /* CONFIG_STK52XX */
101 #ifndef CONFIG_TQM5200S /* No graphics controller on TQM5200S */
103 #define CONFIG_VIDEO_SM501
104 #define CONFIG_VIDEO_SM501_32BPP
105 #define CONFIG_CFB_CONSOLE
106 #define CONFIG_VIDEO_LOGO
109 #define CONFIG_CONSOLE_EXTRA_INFO
111 #define CONFIG_VIDEO_BMP_LOGO
114 #define CONFIG_VGA_AS_SINGLE_DEVICE
115 #define CONFIG_VIDEO_SW_CURSOR
116 #define CONFIG_SPLASH_SCREEN
117 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
118 #endif /* #ifndef CONFIG_TQM5200S */
121 #define CONFIG_MAC_PARTITION
122 #define CONFIG_DOS_PARTITION
123 #define CONFIG_ISO_PARTITION
126 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
127 defined(CONFIG_STK52XX)
128 #define CONFIG_USB_OHCI_NEW
129 #define CONFIG_SYS_OHCI_BE_CONTROLLER
130 #define CONFIG_USB_STORAGE
132 #undef CONFIG_SYS_USB_OHCI_BOARD_INIT
133 #define CONFIG_SYS_USB_OHCI_CPU_INIT
134 #define CONFIG_SYS_USB_OHCI_REGS_BASE MPC5XXX_USB
135 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "mpc5200"
136 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
140 #ifndef CONFIG_CAM5200
142 #define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
143 CONFIG_SYS_POST_CPU | \
148 /* preserve space for the post_word at end of on-chip SRAM */
149 #define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
155 #define CONFIG_BOOTP_BOOTFILESIZE
156 #define CONFIG_BOOTP_BOOTPATH
157 #define CONFIG_BOOTP_GATEWAY
158 #define CONFIG_BOOTP_HOSTNAME
161 * Command line configuration.
163 #define CONFIG_CMD_DATE
164 #define CONFIG_CMD_EEPROM
165 #define CONFIG_CMD_JFFS2
166 #define CONFIG_CMD_REGINFO
167 #define CONFIG_CMD_BSP
170 #define CONFIG_CMD_BMP
174 #define CONFIG_CMD_PCI
175 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
178 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
179 defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
180 #define CONFIG_CMD_IDE
183 #if defined(CONFIG_CHARON) || defined(CONFIG_FO300) || \
184 defined(CONFIG_STK52XX)
185 #define CONFIG_CFG_USB
186 #define CONFIG_CFG_FAT
190 #define CONFIG_CMD_DIAG
193 #define CONFIG_TIMESTAMP /* display image timestamps */
195 #if (CONFIG_SYS_TEXT_BASE != 0xFFF00000)
196 # define CONFIG_SYS_LOWBOOT 1 /* Boot low */
202 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
204 #define CONFIG_PREBOOT "echo;" \
205 "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \
208 #undef CONFIG_BOOTARGS
210 #if defined(CONFIG_TQM5200_B) && !defined(CONFIG_SYS_LOWBOOT)
212 "update=protect off FFF00000 +${filesize};" \
213 "erase FFF00000 +${filesize};" \
214 "cp.b 200000 FFF00000 ${filesize};" \
215 "protect on FFF00000 +${filesize}\0"
216 #else /* default lowboot configuration */
218 "update=protect off FC000000 +${filesize};" \
219 "erase FC000000 +${filesize};" \
220 "cp.b 200000 FC000000 ${filesize};" \
221 "protect on FC000000 +${filesize}\0"
224 #if defined(CONFIG_TQM5200)
225 #define CUSTOM_ENV_SETTINGS \
226 "hostname=tqm5200\0" \
227 "bootfile=/tftpboot/tqm5200/uImage\0" \
228 "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
229 "u-boot=/tftpboot/tqm5200/u-boot.bin\0"
230 #elif defined(CONFIG_CAM5200)
231 #define CUSTOM_ENV_SETTINGS \
232 "bootfile=cam5200/uImage\0" \
233 "u-boot=cam5200/u-boot.bin\0" \
234 "setup=tftp 200000 cam5200/setup.img; source 200000\0"
237 #if defined(CONFIG_TQM5200_B)
238 #define ENV_FLASH_LAYOUT \
239 "fdt_addr=FC100000\0" \
240 "kernel_addr=FC140000\0" \
241 "ramdisk_addr=FC600000\0"
242 #elif defined(CONFIG_CHARON)
243 #define ENV_FLASH_LAYOUT \
244 "fdt_addr=FDFC0000\0" \
245 "kernel_addr=FC0A0000\0" \
246 "ramdisk_addr=FC200000\0"
247 #else /* !CONFIG_TQM5200_B */
248 #define ENV_FLASH_LAYOUT \
249 "fdt_addr=FC0A0000\0" \
250 "kernel_addr=FC0C0000\0" \
251 "ramdisk_addr=FC300000\0"
254 #define CONFIG_EXTRA_ENV_SETTINGS \
256 "console=ttyPSC0\0" \
258 "kernel_addr_r=400000\0" \
259 "fdt_addr_r=600000\0" \
260 "rootpath=/opt/eldk/ppc_6xx\0" \
261 "ramargs=setenv bootargs root=/dev/ram rw\0" \
262 "nfsargs=setenv bootargs root=/dev/nfs rw " \
263 "nfsroot=${serverip}:${rootpath}\0" \
264 "addip=setenv bootargs ${bootargs} " \
265 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
266 ":${hostname}:${netdev}:off panic=1\0" \
267 "addcons=setenv bootargs ${bootargs} " \
268 "console=${console},${baudrate}\0" \
269 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
270 "flash_self_old=sete console ttyS0; " \
271 "run ramargs addip addcons addmtd; " \
272 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
273 "flash_self=run ramargs addip addcons;" \
274 "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
275 "flash_nfs_old=sete console ttyS0; run nfsargs addip addcons;" \
276 "bootm ${kernel_addr}\0" \
277 "flash_nfs=run nfsargs addip addcons;" \
278 "bootm ${kernel_addr} - ${fdt_addr}\0" \
279 "net_nfs_old=tftp ${kernel_addr_r} ${bootfile};" \
280 "sete console ttyS0; run nfsargs addip addcons;bootm\0" \
281 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
282 "tftp ${fdt_addr_r} ${fdt_file}; " \
283 "run nfsargs addip addcons addmtd; " \
284 "bootm ${kernel_addr_r} - ${fdt_addr_r}\0" \
285 CUSTOM_ENV_SETTINGS \
286 "load=tftp 200000 ${u-boot}\0" \
290 #define CONFIG_BOOTCOMMAND "run net_nfs"
293 * IPB Bus clocking configuration.
295 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
297 #if defined(CONFIG_SYS_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
299 * PCI Bus clocking configuration
301 * Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
302 * CONFIG_SYS_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
303 * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
305 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
311 #define CONFIG_HARD_I2C 1 /* I2C with hardware support */
312 #ifdef CONFIG_TQM5200_REV100
313 #define CONFIG_SYS_I2C_MODULE 1 /* Select I2C module #1 for rev. 100 board */
315 #define CONFIG_SYS_I2C_MODULE 2 /* Select I2C module #2 for all other revs */
319 * I2C clock frequency
321 * Please notice, that the resulting clock frequency could differ from the
322 * configured value. This is because the I2C clock is derived from system
323 * clock over a frequency divider with only a few divider values. U-Boot
324 * calculates the best approximation for CONFIG_SYS_I2C_SPEED. However the calculated
325 * approximation allways lies below the configured value, never above.
327 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
328 #define CONFIG_SYS_I2C_SLAVE 0x7F
331 * EEPROM configuration for onboard EEPROM M24C32 (M24C64 should work
332 * also). For other EEPROMs configuration should be verified. On Mini-FAP the
333 * EEPROM (24C64) is on the same I2C address (but on other I2C bus), so the
334 * same configuration could be used.
336 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* 1010000x */
337 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
338 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* =32 Bytes per write */
339 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
342 * HW-Monitor configuration on Mini-FAP
344 #if defined (CONFIG_MINIFAP)
345 #define CONFIG_SYS_I2C_HWMON_ADDR 0x2C
348 /* List of I2C addresses to be verified by POST */
349 #if defined (CONFIG_MINIFAP)
350 #undef CONFIG_SYS_POST_I2C_ADDRS
351 #define CONFIG_SYS_POST_I2C_ADDRS {CONFIG_SYS_I2C_EEPROM_ADDR, \
352 CONFIG_SYS_I2C_HWMON_ADDR, \
353 CONFIG_SYS_I2C_SLAVE}
357 * Flash configuration
359 #define CONFIG_SYS_FLASH_BASE 0xFC000000
361 #if defined(CONFIG_CAM5200) && defined(CONFIG_CAM5200_NIOSFLASH)
362 #define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max num of flash banks
364 #define CONFIG_SYS_FLASH_WORD_SIZE unsigned int /* main flash device with */
365 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
366 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
368 #define CONFIG_SYS_FLASH_ADDR0 0x555
369 #define CONFIG_SYS_FLASH_ADDR1 0x2AA
370 #define CONFIG_SYS_FLASH_2ND_16BIT_DEV 1 /* NIOS flash is a 16bit device */
371 #define CONFIG_SYS_MAX_FLASH_SECT 128
373 /* use CFI flash driver */
374 #define CONFIG_SYS_FLASH_CFI 1 /* Flash is CFI conformant */
375 #define CONFIG_FLASH_CFI_DRIVER 1 /* Use the common driver */
376 #define CONFIG_FLASH_CFI_MTD /* with MTD support */
377 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_BOOTCS_START }
378 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks
380 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
383 #define CONFIG_SYS_FLASH_EMPTY_INFO
384 #define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MByte */
385 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
387 #if defined (CONFIG_CAM5200)
388 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000)
389 #elif defined(CONFIG_TQM5200_B)
390 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00080000)
392 # define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00060000)
395 /* Dynamic MTD partition support */
396 #define CONFIG_CMD_MTDPARTS
397 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
398 #define MTDIDS_DEFAULT "nor0=fc000000.flash"
400 #if defined(CONFIG_STK52XX)
401 # if defined(CONFIG_TQM5200_B)
402 # if defined(CONFIG_SYS_LOWBOOT)
403 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:1m(firmware)," \
410 # else /* highboot */
411 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:2560k(kernel),"\
417 # endif /* CONFIG_SYS_LOWBOOT */
418 # else /* !CONFIG_TQM5200_B */
419 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
426 # endif /* CONFIG_TQM5200_B */
427 #elif defined (CONFIG_CAM5200)
428 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:768k(firmware),"\
432 #elif defined (CONFIG_CHARON)
433 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
439 #elif defined (CONFIG_FO300)
440 # define MTDPARTS_DEFAULT "mtdparts=fc000000.flash:640k(firmware),"\
447 # error "Unknown Carrier Board"
448 #endif /* CONFIG_STK52XX */
451 * Environment settings
453 #define CONFIG_ENV_IS_IN_FLASH 1
454 #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */
455 #if defined(CONFIG_TQM5200_B) || defined (CONFIG_CAM5200)
456 #define CONFIG_ENV_SECT_SIZE 0x40000
458 #define CONFIG_ENV_SECT_SIZE 0x20000
459 #endif /* CONFIG_TQM5200_B */
460 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
461 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
466 #define CONFIG_SYS_MBAR 0xF0000000
467 #define CONFIG_SYS_SDRAM_BASE 0x00000000
468 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
470 /* Use ON-Chip SRAM until RAM will be available */
471 #define CONFIG_SYS_INIT_RAM_ADDR MPC5XXX_SRAM
473 /* preserve space for the post_word at end of on-chip SRAM */
474 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_POST_SIZE
476 #define CONFIG_SYS_INIT_RAM_SIZE MPC5XXX_SRAM_SIZE
479 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
480 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
482 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
483 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
484 # define CONFIG_SYS_RAMBOOT 1
487 #if defined (CONFIG_CAM5200)
488 # define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
489 #elif defined(CONFIG_TQM5200_B)
490 # define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
492 # define CONFIG_SYS_MONITOR_LEN (384 << 10) /* Reserve 384 kB for Monitor */
495 #define CONFIG_SYS_MALLOC_LEN (1024 << 10) /* Reserve 1024 kB for malloc() */
496 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
499 * Ethernet configuration
501 #define CONFIG_MPC5xxx_FEC 1
502 #define CONFIG_MPC5xxx_FEC_MII100
504 * Define CONFIG_MPC5xxx_FEC_MII10 to force FEC at 10Mb
506 /* #define CONFIG_MPC5xxx_FEC_MII10 */
507 #define CONFIG_PHY_ADDR 0x00
512 * use CS1: Bit 0 (mask: 0x80000000):
513 * 1 -> Pin gpio_wkup_6 as second SDRAM chip select (mem_cs1).
514 * use ALT CAN position: Bits 2-3 (mask: 0x30000000):
515 * 00 -> No Alternatives, CAN1/2 on PSC2 according to PSC2 setting.
516 * SPI on PSC3 according to PSC3 setting. Use for CAM5200.
517 * 01 -> CAN1 on I2C1, CAN2 on Tmr0/1.
518 * Use for REV200 STK52XX boards and FO300 boards. Do not use
519 * with REV100 modules (because, there I2C1 is used as I2C bus).
520 * use ATA: Bits 6-7 (mask 0x03000000):
521 * 00 -> No ATA chip selects, csb_4/5 used as normal chip selects.
522 * Use for CAM5200 board.
523 * 01 -> ATA cs0/1 on csb_4/5. Use for the remaining boards.
524 * use PSC6: Bits 9-11 (mask 0x00700000):
525 * 000 -> use PSC6_0 to PSC6_3 as GPIO, PSC6 could not be used as
526 * UART, CODEC or IrDA.
527 * GPIO on PSC6_3 is used in post_hotkeys_pressed() to
528 * enable extended POST tests.
529 * Use for MINI-FAP and TQM5200_IB boards.
530 * 101 -> use PSC6 as UART. Pins PSC6_0 to PSC6_3 are used.
531 * Extended POST test is not available.
532 * Use for STK52xx, FO300 and CAM5200 boards.
533 * WARNING: When the extended POST is enabled, these bits will
534 * be overridden by this code as GPIOs!
535 * use PCI_DIS: Bit 16 (mask 0x00008000):
536 * 1 -> disable PCI controller (on CAM5200 board).
537 * use USB: Bits 18-19 (mask 0x00003000):
538 * 10 -> two UARTs (on FO300 and CAM5200).
539 * use PSC3: Bits 20-23 (mask: 0x00000f00):
540 * 0000 -> All PSC3 pins are GPIOs.
541 * 1100 -> UART/SPI (on FO300 board).
542 * 0100 -> UART (on CAM5200 board).
543 * use PSC2: Bits 25:27 (mask: 0x00000030):
544 * 000 -> All PSC2 pins are GPIOs.
545 * 100 -> UART (on CAM5200 board).
546 * 001 -> CAN1/2 on PSC2 pins.
547 * Use for REV100 STK52xx boards
548 * 01x -> Use AC97 (on FO300 board).
549 * use PSC1: Bits 29-31 (mask: 0x00000007):
550 * 100 -> UART (on all boards).
552 #if !defined(CONFIG_SYS_GPS_PORT_CONFIG)
553 #if defined (CONFIG_MINIFAP)
554 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91000004
555 #elif defined (CONFIG_STK52XX)
556 # if defined (CONFIG_STK52XX_REV100)
557 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81500014
558 # else /* STK52xx REV200 and above */
559 # if defined (CONFIG_TQM5200_REV100)
560 # error TQM5200 REV100 not supported on STK52XX REV200 or above
561 # else/* TQM5200 REV200 and above */
562 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91500404
565 #elif defined (CONFIG_FO300)
566 # define CONFIG_SYS_GPS_PORT_CONFIG 0x91502c24
567 #elif defined (CONFIG_CAM5200)
568 # define CONFIG_SYS_GPS_PORT_CONFIG 0x8050A444
569 #else /* TMQ5200 Inbetriebnahme-Board */
570 # define CONFIG_SYS_GPS_PORT_CONFIG 0x81000004
577 #if defined (CONFIG_STK52XX) && !defined (CONFIG_STK52XX_REV100)
578 # define CONFIG_RTC_M41T11 1
579 # define CONFIG_SYS_I2C_RTC_ADDR 0x68
580 # define CONFIG_SYS_M41T11_BASE_YEAR 1900 /* because Linux uses the same base
583 # define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
587 * Miscellaneous configurable options
589 #define CONFIG_SYS_LONGHELP /* undef to save memory */
591 #define CONFIG_CMDLINE_EDITING 1 /* add command line history */
593 #define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
594 #if defined(CONFIG_CMD_KGDB)
595 #define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
598 #if defined(CONFIG_CMD_KGDB)
599 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
601 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
603 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
604 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
605 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
607 /* Enable an alternate, more extensive memory test */
608 #define CONFIG_SYS_ALT_MEMTEST
610 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
611 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
613 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
616 * Various low-level settings
618 #define CONFIG_SYS_HID0_INIT HID0_ICE | HID0_ICFI
619 #define CONFIG_SYS_HID0_FINAL HID0_ICE
621 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
622 #define CONFIG_SYS_BOOTCS_SIZE CONFIG_SYS_FLASH_SIZE
623 #ifdef CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
624 #define CONFIG_SYS_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
626 #define CONFIG_SYS_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
628 #define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
629 #define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
631 #define CONFIG_LAST_STAGE_INIT
634 * SRAM - Do not map below 2 GB in address space, because this area is used
635 * for SDRAM autosizing.
637 #define CONFIG_SYS_CS2_START 0xE5000000
638 #define CONFIG_SYS_CS2_SIZE 0x100000 /* 1 MByte */
639 #define CONFIG_SYS_CS2_CFG 0x0004D930
642 * Grafic controller - Do not map below 2 GB in address space, because this
643 * area is used for SDRAM autosizing.
645 #define SM501_FB_BASE 0xE0000000
646 #define CONFIG_SYS_CS1_START (SM501_FB_BASE)
647 #define CONFIG_SYS_CS1_SIZE 0x4000000 /* 64 MByte */
648 #define CONFIG_SYS_CS1_CFG 0x8F48FF70
649 #define SM501_MMIO_BASE CONFIG_SYS_CS1_START + 0x03E00000
651 #define CONFIG_SYS_CS_BURST 0x00000000
652 #define CONFIG_SYS_CS_DEADCYCLE 0x33333311 /* 1 dead cycle for flash and SM501 */
654 #if defined(CONFIG_CAM5200)
655 #define CONFIG_SYS_CS4_START 0xB0000000
656 #define CONFIG_SYS_CS4_SIZE 0x00010000
657 #define CONFIG_SYS_CS4_CFG 0x01019C10
659 #define CONFIG_SYS_CS5_START 0xD0000000
660 #define CONFIG_SYS_CS5_SIZE 0x01208000
661 #define CONFIG_SYS_CS5_CFG 0x1414BF10
664 #define CONFIG_SYS_RESET_ADDRESS 0xff000000
666 /*-----------------------------------------------------------------------
668 *-----------------------------------------------------------------------
670 #define CONFIG_USB_CLOCK 0x0001BBBB
671 #define CONFIG_USB_CONFIG 0x00001000
673 /*-----------------------------------------------------------------------
674 * IDE/ATA stuff Supports IDE harddisk
675 *-----------------------------------------------------------------------
678 #undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
680 #undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
681 #undef CONFIG_IDE_LED /* LED for ide not supported */
683 #define CONFIG_IDE_RESET /* reset for ide supported */
684 #define CONFIG_IDE_PREINIT
686 #define CONFIG_SYS_IDE_MAXBUS 1 /* max. 1 IDE bus */
687 #define CONFIG_SYS_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
689 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0000
691 #define CONFIG_SYS_ATA_BASE_ADDR MPC5XXX_ATA
693 /* Offset for data I/O */
694 #define CONFIG_SYS_ATA_DATA_OFFSET (0x0060)
696 /* Offset for normal register accesses */
697 #define CONFIG_SYS_ATA_REG_OFFSET (CONFIG_SYS_ATA_DATA_OFFSET)
699 /* Offset for alternate registers */
700 #define CONFIG_SYS_ATA_ALT_OFFSET (0x005C)
702 /* Interval between registers */
703 #define CONFIG_SYS_ATA_STRIDE 4
705 /* Support ATAPI devices */
706 #define CONFIG_ATAPI 1
708 /*-----------------------------------------------------------------------
709 * Open firmware flat tree support
710 *-----------------------------------------------------------------------
712 #define OF_CPU "PowerPC,5200@0"
713 #define OF_SOC "soc5200@f0000000"
714 #define OF_TBCLK (bd->bi_busfreq / 4)
715 #define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
717 #endif /* __CONFIG_H */