sunxi: Add support for using MII phy-s with the GMAC nic
[oweals/u-boot.git] / include / configs / MVSMR.h
1 /*
2  * (C) Copyright 2003-2004
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * (C) Copyright 2004-2010
6  * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
7  *
8  * SPDX-License-Identifier:     GPL-2.0+
9  */
10
11 #ifndef __CONFIG_H
12 #define __CONFIG_H
13
14 #include <version.h>
15
16 #define CONFIG_MPC5200  1
17
18 #ifndef CONFIG_SYS_TEXT_BASE
19 #define CONFIG_SYS_TEXT_BASE    0xFF800000
20 #endif
21 #define CONFIG_SYS_LDSCRIPT     "board/matrix_vision/mvsmr/u-boot.lds"
22
23 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
24
25 #define CONFIG_MISC_INIT_R      1
26
27 #define CONFIG_SYS_CACHELINE_SIZE       32
28 #ifdef CONFIG_CMD_KGDB
29 #define CONFIG_SYS_CACHELINE_SHIFT      5
30 #endif
31
32 #define CONFIG_PSC_CONSOLE      1
33 #define CONFIG_BAUDRATE         115200
34 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200,\
35                                                 230400}
36
37 #define CONFIG_PCI              1
38 #define CONFIG_PCI_PNP          1
39 #undef  CONFIG_PCI_SCAN_SHOW
40 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
41
42 #define CONFIG_PCI_MEM_BUS      0x40000000
43 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
44 #define CONFIG_PCI_MEM_SIZE     0x10000000
45
46 #define CONFIG_PCI_IO_BUS       0x50000000
47 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
48 #define CONFIG_PCI_IO_SIZE      0x01000000
49
50 #define CONFIG_SYS_XLB_PIPELINING       1
51 #define CONFIG_HIGH_BATS        1
52
53 #define MV_CI                   mvSMR
54 #define MV_VCI                  mvSMR
55 #define MV_FPGA_DATA            0xff840000
56 #define MV_FPGA_SIZE            0x1ff88
57 #define MV_KERNEL_ADDR          0xfff00000
58 #define MV_SCRIPT_ADDR          0xff806000
59 #define MV_INITRD_ADDR          0xff880000
60 #define MV_INITRD_LENGTH        0x00240000
61 #define MV_SCRATCH_ADDR         0xffcc0000
62 #define MV_SCRATCH_LENGTH       MV_INITRD_LENGTH
63
64 #define CONFIG_SHOW_BOOT_PROGRESS 1
65
66 #define MV_KERNEL_ADDR_RAM      0x00100000
67 #define MV_INITRD_ADDR_RAM      0x00400000
68
69 /*
70  * Supported commands
71  */
72 #include <config_cmd_default.h>
73
74 #define CONFIG_CMD_CACHE
75 #define CONFIG_CMD_DHCP
76 #define CONFIG_CMD_FPGA
77 #define CONFIG_CMD_FPGA_LOADMK
78 #define CONFIG_CMD_I2C
79 #define CONFIG_CMD_MII
80 #define CONFIG_CMD_NET
81 #define CONFIG_CMD_PCI
82 #define CONFIG_CMD_PING
83 #define CONFIG_CMD_SDRAM
84
85 #define CONFIG_BOOTP_BOOTFILESIZE
86 #define CONFIG_BOOTP_BOOTPATH
87 #define CONFIG_BOOTP_DNS
88 #define CONFIG_BOOTP_DNS2
89 #define CONFIG_BOOTP_GATEWAY
90 #define CONFIG_BOOTP_HOSTNAME
91 #define CONFIG_BOOTP_NTPSERVER
92 #define CONFIG_BOOTP_RANDOM_DELAY
93 #define CONFIG_BOOTP_SEND_HOSTNAME
94 #define CONFIG_BOOTP_SUBNETMASK
95 #define CONFIG_BOOTP_VENDOREX
96 #define CONFIG_LIB_RAND
97
98 /*
99  * Autoboot
100  */
101 #define CONFIG_BOOTDELAY                1
102 #define CONFIG_AUTOBOOT_KEYED
103 #define CONFIG_AUTOBOOT_STOP_STR        "abcdefg"
104 #define CONFIG_ZERO_BOOTDELAY_CHECK
105
106 #define CONFIG_BOOTCOMMAND      "source ${script_addr}"
107 #define CONFIG_BOOTARGS         "root=/dev/ram ro rootfstype=squashfs" \
108                                         " allocate=6M"
109
110 #define CONFIG_EXTRA_ENV_SETTINGS                               \
111         "console_nr=0\0"                                        \
112         "console=no\0"                                          \
113         "stdin=serial\0"                                        \
114         "stdout=serial\0"                                       \
115         "stderr=serial\0"                                       \
116         "fpga=0\0"                                              \
117         "fpgadata=" __stringify(MV_FPGA_DATA) "\0"                      \
118         "fpgadatasize=" __stringify(MV_FPGA_SIZE) "\0"          \
119         "mv_kernel_addr=" __stringify(MV_KERNEL_ADDR) "\0"              \
120         "mv_kernel_addr_ram=" __stringify(MV_KERNEL_ADDR_RAM) "\0"      \
121         "script_addr=" __stringify(MV_SCRIPT_ADDR) "\0"         \
122         "mv_initrd_addr=" __stringify(MV_INITRD_ADDR) "\0"              \
123         "mv_initrd_addr_ram=" __stringify(MV_INITRD_ADDR_RAM) "\0"      \
124         "mv_initrd_length=" __stringify(MV_INITRD_LENGTH) "\0"  \
125         "mv_scratch_addr=" __stringify(MV_SCRATCH_ADDR) "\0"            \
126         "mv_scratch_length=" __stringify(MV_SCRATCH_LENGTH) "\0"        \
127         "mv_version=" U_BOOT_VERSION "\0"                       \
128         "dhcp_client_id=" __stringify(MV_CI) "\0"                       \
129         "dhcp_vendor-class-identifier=" __stringify(MV_VCI) "\0"        \
130         "netretry=no\0"                                         \
131         "use_static_ipaddr=no\0"                                \
132         "static_ipaddr=192.168.0.101\0"                         \
133         "static_netmask=255.255.255.0\0"                        \
134         "static_gateway=0.0.0.0\0"                              \
135         "initrd_name=uInitrd.mvsmr-rfs\0"                       \
136         "zcip=yes\0"                                            \
137         "netboot=no\0"                                          \
138         ""
139
140 /*
141  * IPB Bus clocking configuration.
142  */
143 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
144
145 /*
146  * Flash configuration
147  */
148 #undef  CONFIG_FLASH_16BIT
149 #define CONFIG_SYS_FLASH_CFI
150 #define CONFIG_FLASH_CFI_DRIVER
151 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
152 #define CONFIG_SYS_FLASH_EMPTY_INFO
153
154 #define CONFIG_SYS_FLASH_ERASE_TOUT     50000
155 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
156
157 #define CONFIG_SYS_MAX_FLASH_BANKS      1
158 #define CONFIG_SYS_MAX_FLASH_SECT       256
159
160 #define CONFIG_SYS_LOWBOOT
161 #define CONFIG_SYS_FLASH_BASE           CONFIG_SYS_TEXT_BASE
162 #define CONFIG_SYS_FLASH_SIZE           0x00800000
163
164 /*
165  * Environment settings
166  */
167 #define CONFIG_ENV_IS_IN_FLASH
168 #undef  CONFIG_SYS_FLASH_PROTECTION
169 #define CONFIG_OVERWRITE_ETHADDR_ONCE
170
171 #define CONFIG_ENV_OFFSET       0x8000
172 #define CONFIG_ENV_SIZE         0x2000
173 #define CONFIG_ENV_SECT_SIZE    0x2000
174
175 /* used by linker script to wrap code around */
176 #define CONFIG_SCRIPT_OFFSET    0x6000
177 #define CONFIG_SCRIPT_SECT_SIZE 0x2000
178
179 /*
180  * Memory map
181  */
182 #define CONFIG_SYS_MBAR         0xF0000000
183 #define CONFIG_SYS_SDRAM_BASE   0x00000000
184 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
185
186 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
187 #define CONFIG_SYS_INIT_RAM_SIZE        MPC5XXX_SRAM_SIZE
188
189 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - \
190                                                 GENERATED_GBL_DATA_SIZE)
191 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
192
193 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
194 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
195 #define CONFIG_SYS_RAMBOOT              1
196 #endif
197
198 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
199 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
200 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)
201 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
202
203 /*
204  * I2C configuration
205  */
206 #define CONFIG_HARD_I2C         1
207 #define CONFIG_SYS_I2C_MODULE   1
208 #define CONFIG_SYS_I2C_SPEED    86000
209 #define CONFIG_SYS_I2C_SLAVE    0x7F
210
211 /*
212  * Ethernet configuration
213  */
214 #define CONFIG_NET_RETRY_COUNT 5
215
216 #define CONFIG_MPC5xxx_FEC
217 #define CONFIG_MPC5xxx_FEC_MII100
218 #define CONFIG_PHY_ADDR         0x00
219 #define CONFIG_NETDEV           eth0
220
221 /*
222  * Miscellaneous configurable options
223  */
224 #define CONFIG_SYS_HUSH_PARSER
225 #define CONFIG_CMDLINE_EDITING
226 #undef  CONFIG_SYS_LONGHELP
227 #ifdef CONFIG_CMD_KGDB
228 #define CONFIG_SYS_CBSIZE               1024
229 #else
230 #define CONFIG_SYS_CBSIZE               256
231 #endif
232 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
233 #define CONFIG_SYS_MAXARGS              16
234 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
235
236 #define CONFIG_SYS_MEMTEST_START        0x00800000
237 #define CONFIG_SYS_MEMTEST_END          0x02f00000
238
239 /* default load address */
240 #define CONFIG_SYS_LOAD_ADDR            0x02000000
241 /* default location for tftp and bootm */
242 #define CONFIG_LOADADDR                 0x00200000
243
244 /*
245  * Various low-level settings
246  */
247 #define CONFIG_SYS_GPS_PORT_CONFIG      0x00050044
248
249 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
250 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
251
252 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
253 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
254 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
255 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
256 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
257
258 #define CONFIG_SYS_CS_BURST             0x000000f0
259 #define CONFIG_SYS_CS_DEADCYCLE         0x33333303
260
261 #define CONFIG_SYS_RESET_ADDRESS        0x00000100
262
263 #undef FPGA_DEBUG
264 #undef CONFIG_SYS_FPGA_PROG_FEEDBACK
265 #define CONFIG_FPGA
266 #define CONFIG_FPGA_XILINX      1
267 #define CONFIG_FPGA_SPARTAN2    1
268 #define CONFIG_FPGA_COUNT       1
269
270 #endif