at91: Introduction of at91sam9g45 SOC.
[oweals/u-boot.git] / include / configs / MVBC_P.h
1 /*
2  * (C) Copyright 2003-2004
3  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4  *
5  * (C) Copyright 2004-2008
6  * Matrix-Vision GmbH, andre.schwarz@matrix-vision.de
7  *
8  * See file CREDITS for list of people who contributed to this
9  * project.
10  *
11  * This program is free software; you can redistribute it and/or
12  * modify it under the terms of the GNU General Public License as
13  * published by the Free Software Foundation; either version 2 of
14  * the License, or (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24  * MA 02111-1307 USA
25  */
26
27 #ifndef __CONFIG_H
28 #define __CONFIG_H
29
30 #include <version.h>
31
32 #define CONFIG_MPC5xxx  1
33 #define CONFIG_MPC5200  1
34
35 #define CONFIG_SYS_MPC5XXX_CLKIN        33000000
36
37 #define BOOTFLAG_COLD           0x01
38 #define BOOTFLAG_WARM           0x02
39
40 #define CONFIG_MISC_INIT_R      1
41
42 #define CONFIG_SYS_CACHELINE_SIZE       32
43 #ifdef CONFIG_CMD_KGDB
44 #define CONFIG_SYS_CACHELINE_SHIFT      5
45 #endif
46
47 #define CONFIG_PSC_CONSOLE      1
48 #define CONFIG_BAUDRATE         115200
49 #define CONFIG_SYS_BAUDRATE_TABLE       {9600, 19200, 38400, 57600, 115200, 230400}
50
51 #define CONFIG_PCI              1
52 #define CONFIG_PCI_PNP          1
53 #undef  CONFIG_PCI_SCAN_SHOW
54 #define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
55
56 #define CONFIG_PCI_MEM_BUS      0x40000000
57 #define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
58 #define CONFIG_PCI_MEM_SIZE     0x10000000
59
60 #define CONFIG_PCI_IO_BUS       0x50000000
61 #define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
62 #define CONFIG_PCI_IO_SIZE      0x01000000
63
64 #define CONFIG_SYS_XLB_PIPELINING       1
65 #define CONFIG_HIGH_BATS        1
66
67 #define MV_CI                   mvBlueCOUGAR-P
68 #define MV_VCI                  mvBlueCOUGAR-P
69 #define MV_FPGA_DATA            0xff860000
70 #define MV_FPGA_SIZE            0x0003c886
71 #define MV_KERNEL_ADDR          0xffc00000
72 #define MV_INITRD_ADDR          0xff900000
73 #define MV_INITRD_LENGTH        0x00300000
74 #define MV_SCRATCH_ADDR         0x00000000
75 #define MV_SCRATCH_LENGTH       MV_INITRD_LENGTH
76 #define MV_SOURCE_ADDR          0xff840000
77 #define MV_SOURCE_ADDR2         0xff850000
78 #define MV_DTB_ADDR             0xfffc0000
79
80 #define CONFIG_SHOW_BOOT_PROGRESS 1
81
82 #define MV_KERNEL_ADDR_RAM      0x00100000
83 #define MV_DTB_ADDR_RAM         0x00600000
84 #define MV_INITRD_ADDR_RAM      0x01000000
85
86 /* pass open firmware flat tree */
87 #define CONFIG_OF_LIBFDT        1
88 #define CONFIG_OF_BOARD_SETUP   1
89
90 #define OF_CPU                  "PowerPC,5200@0"
91 #define OF_SOC                  "soc5200@f0000000"
92 #define OF_TBCLK                (bd->bi_busfreq / 4)
93 #define MV_DTB_NAME             mvbc-p.dtb
94 #define CONFIG_OF_STDOUT_VIA_ALIAS      1
95
96 /*
97  * Supported commands
98  */
99 #include <config_cmd_default.h>
100
101 #define CONFIG_CMD_CACHE
102 #define CONFIG_CMD_NET
103 #define CONFIG_CMD_PING
104 #define CONFIG_CMD_DHCP
105 #define CONFIG_CMD_SDRAM
106 #define CONFIG_CMD_PCI
107 #define CONFIG_CMD_FPGA
108
109 #undef CONFIG_WATCHDOG
110
111 #define CONFIG_BOOTP_VENDOREX
112 #define CONFIG_BOOTP_SUBNETMASK
113 #define CONFIG_BOOTP_GATEWAY
114 #define CONFIG_BOOTP_DNS
115 #define CONFIG_BOOTP_DNS2
116 #define CONFIG_BOOTP_HOSTNAME
117 #define CONFIG_BOOTP_BOOTFILESIZE
118 #define CONFIG_BOOTP_BOOTPATH
119 #define CONFIG_BOOTP_NTPSERVER
120 #define CONFIG_BOOTP_RANDOM_DELAY
121 #define CONFIG_BOOTP_SEND_HOSTNAME
122
123 /*
124  * Autoboot
125  */
126 #define CONFIG_BOOTDELAY                2
127 #define CONFIG_AUTOBOOT_KEYED
128 #define CONFIG_AUTOBOOT_STOP_STR        "s"
129 #define CONFIG_ZERO_BOOTDELAY_CHECK
130 #define CONFIG_RESET_TO_RETRY           1000
131
132 #define CONFIG_BOOTCOMMAND      "if imi ${autoscr_addr}; \
133                                         then source ${autoscr_addr};    \
134                                         else source ${autoscr_addr2};   \
135                                 fi;"
136
137 #define CONFIG_BOOTARGS         "root=/dev/ram ro rootfstype=squashfs"
138 #define CONFIG_ENV_OVERWRITE
139
140 #define XMK_STR(x)      #x
141 #define MK_STR(x)       XMK_STR(x)
142
143 #define CONFIG_EXTRA_ENV_SETTINGS                               \
144         "console_nr=0\0"                                        \
145         "console=yes\0"                                         \
146         "stdin=serial\0"                                        \
147         "stdout=serial\0"                                       \
148         "stderr=serial\0"                                       \
149         "fpga=0\0"                                              \
150         "fpgadata=" MK_STR(MV_FPGA_DATA) "\0"                   \
151         "fpgadatasize=" MK_STR(MV_FPGA_SIZE) "\0"               \
152         "autoscr_addr=" MK_STR(MV_SOURCE_ADDR) "\0"             \
153         "autoscr_addr2=" MK_STR(MV_SOURCE_ADDR2) "\0"           \
154         "mv_kernel_addr=" MK_STR(MV_KERNEL_ADDR) "\0"           \
155         "mv_kernel_addr_ram=" MK_STR(MV_KERNEL_ADDR_RAM) "\0"   \
156         "mv_initrd_addr=" MK_STR(MV_INITRD_ADDR) "\0"           \
157         "mv_initrd_addr_ram=" MK_STR(MV_INITRD_ADDR_RAM) "\0"   \
158         "mv_initrd_length=" MK_STR(MV_INITRD_LENGTH) "\0"       \
159         "mv_dtb_addr=" MK_STR(MV_DTB_ADDR) "\0"                 \
160         "mv_dtb_addr_ram=" MK_STR(MV_DTB_ADDR_RAM) "\0"         \
161         "dtb_name=" MK_STR(MV_DTB_NAME) "\0"                    \
162         "mv_scratch_addr=" MK_STR(MV_SCRATCH_ADDR) "\0"         \
163         "mv_scratch_length=" MK_STR(MV_SCRATCH_LENGTH) "\0"     \
164         "mv_version=" U_BOOT_VERSION "\0"                       \
165         "dhcp_client_id=" MK_STR(MV_CI) "\0"                    \
166         "dhcp_vendor-class-identifier=" MK_STR(MV_VCI) "\0"     \
167         "netretry=no\0"                                         \
168         "use_static_ipaddr=no\0"                                \
169         "static_ipaddr=192.168.90.10\0"                         \
170         "static_netmask=255.255.255.0\0"                        \
171         "static_gateway=0.0.0.0\0"                              \
172         "initrd_name=uInitrd.mvbc-p-rfs\0"                      \
173         "zcip=no\0"                                             \
174         "netboot=yes\0"                                         \
175         "mvtest=Ff\0"                                           \
176         "tried_bootfromflash=no\0"                              \
177         "tried_bootfromnet=no\0"                                \
178         "use_dhcp=yes\0"                                        \
179         "gev_start=yes\0"                                       \
180         "mvbcdma_debug=0\0"                                     \
181         "mvbcia_debug=0\0"                                      \
182         "propdev_debug=0\0"                                     \
183         "gevss_debug=0\0"                                       \
184         "watchdog=1\0"                                          \
185         ""
186
187 #undef XMK_STR
188 #undef MK_STR
189
190 /*
191  * IPB Bus clocking configuration.
192  */
193 #define CONFIG_SYS_IPBCLK_EQUALS_XLBCLK
194 #define CONFIG_SYS_PCICLK_EQUALS_IPBCLK_DIV2
195
196 /*
197  * Flash configuration
198  */
199 #undef  CONFIG_FLASH_16BIT
200 #define CONFIG_SYS_FLASH_CFI
201 #define CONFIG_FLASH_CFI_DRIVER
202 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1
203 #define CONFIG_SYS_FLASH_EMPTY_INFO
204
205 #define CONFIG_SYS_FLASH_ERASE_TOUT     50000
206 #define CONFIG_SYS_FLASH_WRITE_TOUT     1000
207
208 #define CONFIG_SYS_MAX_FLASH_BANKS      1
209 #define CONFIG_SYS_MAX_FLASH_SECT       256
210
211 #define CONFIG_SYS_LOWBOOT
212 #define CONFIG_SYS_FLASH_BASE           TEXT_BASE
213 #define CONFIG_SYS_FLASH_SIZE           0x00800000
214
215 /*
216  * Environment settings
217  */
218 #define CONFIG_ENV_IS_IN_FLASH
219 #undef  CONFIG_SYS_FLASH_PROTECTION
220
221 #define CONFIG_ENV_ADDR         0xFFFE0000
222 #define CONFIG_ENV_SIZE         0x10000
223 #define CONFIG_ENV_SECT_SIZE    0x10000
224 #define CONFIG_ENV_ADDR_REDUND  (CONFIG_ENV_ADDR+CONFIG_ENV_SIZE)
225 #define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
226
227 /*
228  * Memory map
229  */
230 #define CONFIG_SYS_MBAR         0xF0000000
231 #define CONFIG_SYS_SDRAM_BASE           0x00000000
232 #define CONFIG_SYS_DEFAULT_MBAR 0x80000000
233
234 #define CONFIG_SYS_INIT_RAM_ADDR        MPC5XXX_SRAM
235 #define CONFIG_SYS_INIT_RAM_END MPC5XXX_SRAM_SIZE
236
237 #define CONFIG_SYS_GBL_DATA_SIZE        128
238 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
239 #define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_GBL_DATA_OFFSET
240
241 #define CONFIG_SYS_MONITOR_BASE TEXT_BASE
242 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
243 #define CONFIG_SYS_RAMBOOT              1
244 #endif
245
246 /* CONFIG_SYS_MONITOR_LEN must be a multiple of CONFIG_ENV_SECT_SIZE */
247 #define CONFIG_SYS_MONITOR_LEN          (512 << 10)
248 #define CONFIG_SYS_MALLOC_LEN           (512 << 10)
249 #define CONFIG_SYS_BOOTMAPSZ            (8 << 20)
250
251 /*
252  * Ethernet configuration
253  */
254 #define CONFIG_NET_MULTI
255 #define CONFIG_NET_RETRY_COUNT 5
256
257 #define CONFIG_E1000
258 #define CONFIG_E1000_FALLBACK_MAC       { 0xb6, 0xb4, 0x45, 0xeb, 0xfb, 0xc0 }
259 #undef CONFIG_MPC5xxx_FEC
260 #undef CONFIG_PHY_ADDR
261 #define CONFIG_NETDEV           eth0
262
263 /*
264  * Miscellaneous configurable options
265  */
266 #define CONFIG_SYS_HUSH_PARSER
267 #define CONFIG_CMDLINE_EDITING
268 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
269 #undef  CONFIG_SYS_LONGHELP
270 #define CONFIG_SYS_PROMPT               "=> "
271 #ifdef CONFIG_CMD_KGDB
272 #define CONFIG_SYS_CBSIZE               1024
273 #else
274 #define CONFIG_SYS_CBSIZE               256
275 #endif
276 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
277 #define CONFIG_SYS_MAXARGS              16
278 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
279
280 #define CONFIG_SYS_MEMTEST_START        0x00800000
281 #define CONFIG_SYS_MEMTEST_END          0x02f00000
282
283 #define CONFIG_SYS_HZ                   1000
284
285 /* default load address */
286 #define CONFIG_SYS_LOAD_ADDR            0x02000000
287 /* default location for tftp and bootm */
288 #define CONFIG_LOADADDR         0x00200000
289
290 /*
291  * Various low-level settings
292  */
293 #define CONFIG_SYS_GPS_PORT_CONFIG      0x20000004
294
295 #define CONFIG_SYS_HID0_INIT            (HID0_ICE | HID0_ICFI)
296 #define CONFIG_SYS_HID0_FINAL           HID0_ICE
297
298 #define CONFIG_SYS_BOOTCS_START CONFIG_SYS_FLASH_BASE
299 #define CONFIG_SYS_BOOTCS_SIZE          CONFIG_SYS_FLASH_SIZE
300 #define CONFIG_SYS_BOOTCS_CFG           0x00047800
301 #define CONFIG_SYS_CS0_START            CONFIG_SYS_FLASH_BASE
302 #define CONFIG_SYS_CS0_SIZE             CONFIG_SYS_FLASH_SIZE
303
304 #define CONFIG_SYS_CS_BURST             0x000000f0
305 #define CONFIG_SYS_CS_DEADCYCLE 0x33333303
306
307 #define CONFIG_SYS_RESET_ADDRESS        0x00000100
308
309 #undef FPGA_DEBUG
310 #undef CONFIG_SYS_FPGA_PROG_FEEDBACK
311 #define CONFIG_FPGA             CONFIG_SYS_ALTERA_CYCLON2
312 #define CONFIG_FPGA_ALTERA      1
313 #define CONFIG_FPGA_CYCLON2     1
314 #define CONFIG_FPGA_COUNT       1
315
316 #endif