2 * ML2.h: ML2 specific config options
4 * Copyright 2002 Mind NV
8 * Author : Peter De Schrijver (p2@mind.be)
10 * Derived from : other configuration header files in this tree
12 * This software may be used and distributed according to the terms of
13 * the GNU General Public License (GPL) version 2, incorporated herein by
14 * reference. Drivers based on or derived from this code fall under the GPL
15 * and must retain the authorship, copyright and this license notice. This
16 * file is not a complete program and may only be used when the entire
17 * program is licensed under the GPL.
25 * High Level Configuration Options
29 #define CONFIG_405 1 /* This is a PPC405 CPU */
30 #define CONFIG_4xx 1 /* ...member of PPC4xx family */
31 #define CONFIG_ML2 1 /* ...on a ML2 board */
34 #define CONFIG_ENV_IS_IN_FLASH 1
36 #ifdef CONFIG_ENV_IS_IN_NVRAM
37 #undef CONFIG_ENV_IS_IN_FLASH
39 #ifdef CONFIG_ENV_IS_IN_FLASH
40 #undef CONFIG_ENV_IS_IN_NVRAM
44 #define CONFIG_BAUDRATE 9600
45 #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */
48 #define CONFIG_BOOTCOMMAND "bootm" /* autoboot command */
50 #define CONFIG_BOOTCOMMAND "bootp" /* autoboot command */
53 #define CONFIG_PREBOOT "fsload 0x00100000 /boot/image"
55 /* Size (bytes) of interrupt driven serial port buffer.
56 * Set to 0 to use polling instead of interrupts.
57 * Setting to 0 will also disable RTS/CTS handshaking.
60 #define CONFIG_SERIAL_SOFTWARE_FIFO 4000
62 #undef CONFIG_SERIAL_SOFTWARE_FIFO
66 #define CONFIG_BOOTARGS "root=/dev/nfs " \
67 "ip=192.168.2.176:192.168.2.190:192.168.2.79:255.255.255.0 " \
68 "nfsroot=192.168.2.190:/home/stefan/cpci405/target_ftest4"
70 #define CONFIG_BOOTARGS "root=/dev/mtdblock2 " \
71 "console=ttyS0 console=tty"
75 #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
76 #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
82 #define CONFIG_BOOTP_BOOTFILESIZE
83 #define CONFIG_BOOTP_BOOTPATH
84 #define CONFIG_BOOTP_GATEWAY
85 #define CONFIG_BOOTP_HOSTNAME
89 * Command line configuration.
91 #include <config_cmd_default.h>
93 #define CONFIG_CMD_IRQ
94 #define CONFIG_CMD_KGDB
95 #define CONFIG_CMD_BEDBUG
96 #define CONFIG_CMD_ELF
97 #define CONFIG_CMD_JFFS2
100 #undef CONFIG_CMD_RTC
101 #undef CONFIG_CMD_PCI
102 #undef CONFIG_CMD_I2C
105 #undef CONFIG_WATCHDOG /* watchdog disabled */
107 #define CONFIG_SYS_CLK_FREQ 50000000
109 #define CONFIG_SPD_EEPROM 1 /* use SPD EEPROM for setup */
112 * Miscellaneous configurable options
114 #define CONFIG_SYS_LONGHELP /* undef to save memory */
115 #define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */
116 #if defined(CONFIG_CMD_KGDB)
117 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
119 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
121 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
122 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
123 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
125 #define CONFIG_SYS_MEMTEST_START 0x0400000 /* memtest works on */
126 #define CONFIG_SYS_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
129 * If CONFIG_SYS_EXT_SERIAL_CLOCK, then the UART divisor is 1.
130 * If CONFIG_SYS_405_UART_ERRATA_59, then UART divisor is 31.
131 * Otherwise, UART divisor is determined by CPU Clock and CONFIG_SYS_BASE_BAUD value.
132 * The Linux BASE_BAUD define should match this configuration.
133 * baseBaud = cpuClock/(uartDivisor*16)
134 * If CONFIG_SYS_405_UART_ERRATA_59 and 200MHz CPU clock,
135 * set Linux BASE_BAUD to 403200.
137 #undef CONFIG_SYS_EXT_SERIAL_CLOCK /* external serial clock */
138 #undef CONFIG_SYS_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
140 #define CONFIG_SYS_BASE_BAUD (3125000*16)
141 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_BASE_BAUD
142 #define CONFIG_SYS_DUART_CHAN 0
143 #define CONFIG_SYS_NS16550_COM1 0xa0001003
144 #define CONFIG_SYS_NS16550_COM2 0xa0011003
145 #define CONFIG_SYS_NS16550_REG_SIZE -4
146 #define CONFIG_SYS_NS16550 1
147 #define CONFIG_SYS_INIT_CHAN1 1
148 #define CONFIG_SYS_INIT_CHAN2 1
150 /* The following table includes the supported baudrates */
151 #define CONFIG_SYS_BAUDRATE_TABLE \
152 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
154 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
155 #define CONFIG_SYS_EXTBDINFO 1 /* To use extended board_into (bd_t) */
157 #define CONFIG_SYS_HZ 1000 /* decrementer freq: 1 ms ticks */
160 /*-----------------------------------------------------------------------
161 * Start addresses for the final memory configuration
162 * (Set up by the startup code)
163 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
165 #define CONFIG_SYS_SDRAM_BASE 0x00000000
166 #define CONFIG_SYS_FLASH_BASE 0x18000000
167 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
168 #define CONFIG_SYS_MONITOR_LEN (192 * 1024) /* Reserve 196 kB for Monitor */
169 #define CONFIG_SYS_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
172 * For booting Linux, the board info and command line data
173 * have to be in the first 8 MB of memory, since this is
174 * the maximum mapped by the Linux kernel during initialization.
176 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
177 /*-----------------------------------------------------------------------
180 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
181 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
183 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
184 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
186 /* BEG ENVIRONNEMENT FLASH */
187 #ifdef CONFIG_ENV_IS_IN_FLASH
188 #define CONFIG_ENV_OFFSET 0x00050000 /* Offset of Environment Sector */
189 #define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
190 #define CONFIG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */
192 /* END ENVIRONNEMENT FLASH */
193 /*-----------------------------------------------------------------------
196 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
197 #define CONFIG_SYS_NVRAM_SIZE 0x1ff8 /* NVRAM size */
199 #ifdef CONFIG_ENV_IS_IN_NVRAM
200 #define CONFIG_ENV_SIZE 0x1000 /* Size of Environment vars */
201 #define CONFIG_ENV_ADDR \
202 (CONFIG_SYS_NVRAM_BASE_ADDR+CONFIG_SYS_NVRAM_SIZE-CONFIG_ENV_SIZE) /* Env */
206 * Init Memory Controller:
208 * BR0/1 and OR0/1 (FLASH)
211 #define FLASH_BASE0_PRELIM CONFIG_SYS_FLASH_BASE /* FLASH bank #0 */
212 #define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
215 /* Configuration Port location */
216 #define CONFIG_PORT_ADDR 0xF0000500
218 /*-----------------------------------------------------------------------
219 * Definitions for initial stack pointer and data area (in DPRAM)
222 #define CONFIG_SYS_INIT_RAM_ADDR 0x800000 /* inside of SDRAM */
223 #define CONFIG_SYS_INIT_RAM_END 0x2000 /* End of used area in RAM */
224 #define CONFIG_SYS_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
225 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
226 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
228 /*-----------------------------------------------------------------------
229 * Definitions for Serial Presence Detect EEPROM address
230 * (to get SDRAM settings)
232 #define SPD_EEPROM_ADDRESS 0x50
235 * Internal Definitions
239 #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
240 #define BOOTFLAG_WARM 0x02 /* Software reboot */
242 #if defined(CONFIG_CMD_KGDB)
243 #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
244 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
251 /* No command line, one static partition, whole device */
252 #undef CONFIG_CMD_MTDPARTS
253 #define CONFIG_JFFS2_DEV "nor0"
254 #define CONFIG_JFFS2_PART_SIZE 0xFFFFFFFF
255 #define CONFIG_JFFS2_PART_OFFSET 0x00080000
257 /* mtdparts command line support */
258 /* Note: fake mtd_id used, no linux mtd map file */
260 #define CONFIG_CMD_MTDPARTS
261 #define MTDIDS_DEFAULT "nor0=ml2-0"
262 #define MTDPARTS_DEFAULT "mtdparts=ml2-0:-@512k(jffs2)"
265 #endif /* __CONFIG_H */