2 * Configuation settings for the Freescale MCF5208EVBe.
4 * Copyright (C) 2004-2008 Freescale Semiconductor, Inc.
5 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
7 * SPDX-License-Identifier: GPL-2.0+
14 * High Level Configuration Options
17 #define CONFIG_MCFUART
18 #define CONFIG_SYS_UART_PORT (0)
19 #define CONFIG_BAUDRATE 115200
21 #undef CONFIG_WATCHDOG
22 #define CONFIG_WATCHDOG_TIMEOUT 5000
24 /* Command line configuration */
25 #define CONFIG_CMD_REGINFO
30 # define CONFIG_MII_INIT 1
31 # define CONFIG_SYS_DISCOVER_PHY
32 # define CONFIG_SYS_RX_ETH_BUFFER 8
33 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
34 # define CONFIG_HAS_ETH1
36 # define CONFIG_SYS_FEC0_PINMUX 0
37 # define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
38 # define MCFFEC_TOUT_LOOP 50000
39 /* If CONFIG_SYS_DISCOVER_PHY is not defined - hardcoded */
40 # ifndef CONFIG_SYS_DISCOVER_PHY
41 # define FECDUPLEX FULL
42 # define FECSPEED _100BASET
44 # ifndef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
45 # define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
47 # endif /* CONFIG_SYS_DISCOVER_PHY */
55 #define CONFIG_SYS_I2C
56 #define CONFIG_SYS_I2C_FSL
57 #define CONFIG_SYS_FSL_I2C_SPEED 80000
58 #define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
59 #define CONFIG_SYS_FSL_I2C_OFFSET 0x58000
60 #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR
62 #define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
63 #define CONFIG_UDP_CHECKSUM
66 # define CONFIG_IPADDR 192.162.1.2
67 # define CONFIG_NETMASK 255.255.255.0
68 # define CONFIG_SERVERIP 192.162.1.1
69 # define CONFIG_GATEWAYIP 192.162.1.1
70 #endif /* CONFIG_MCFFEC */
72 #define CONFIG_HOSTNAME M5208EVBe
73 #define CONFIG_EXTRA_ENV_SETTINGS \
75 "loadaddr=40010000\0" \
76 "u-boot=u-boot.bin\0" \
77 "load=tftp ${loadaddr) ${u-boot}\0" \
78 "upd=run load; run prog\0" \
79 "prog=prot off 0 3ffff;" \
81 "cp.b ${loadaddr} 0 ${filesize};" \
85 #define CONFIG_PRAM 512 /* 512 KB */
86 #define CONFIG_SYS_LONGHELP /* undef to save memory */
88 #ifdef CONFIG_CMD_KGDB
89 # define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
91 # define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
94 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
95 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */
96 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Arg Buf Sz */
97 #define CONFIG_SYS_LOAD_ADDR 0x40010000
99 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */
100 #define CONFIG_SYS_PLL_ODR 0x36
101 #define CONFIG_SYS_PLL_FDR 0x7D
103 #define CONFIG_SYS_MBAR 0xFC000000
106 * Low Level Configuration Settings
107 * (address mappings, register initial values, etc.)
108 * You should know what you are doing if you make changes here.
110 /* Definitions for initial stack pointer and data area (in DPRAM) */
111 #define CONFIG_SYS_INIT_RAM_ADDR 0x80000000
112 #define CONFIG_SYS_INIT_RAM_SIZE 0x4000 /* Size of used area in internal SRAM */
113 #define CONFIG_SYS_INIT_RAM_CTRL 0x221
114 #define CONFIG_SYS_GBL_DATA_OFFSET ((CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) - 0x10)
115 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
118 * Start addresses for the final memory configuration
119 * (Set up by the startup code)
120 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
122 #define CONFIG_SYS_SDRAM_BASE 0x40000000
123 #define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */
124 #define CONFIG_SYS_SDRAM_CFG1 0x43711630
125 #define CONFIG_SYS_SDRAM_CFG2 0x56670000
126 #define CONFIG_SYS_SDRAM_CTRL 0xE1002000
127 #define CONFIG_SYS_SDRAM_EMOD 0x80010000
128 #define CONFIG_SYS_SDRAM_MODE 0x00CD0000
130 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE + 0x400
131 #define CONFIG_SYS_MEMTEST_END ((CONFIG_SYS_SDRAM_SIZE - 3) << 20)
133 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
134 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
136 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
137 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
140 * For booting Linux, the board info and command line data
141 * have to be in the first 8 MB of memory, since this is
142 * the maximum mapped by the Linux kernel during initialization ??
144 #define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
145 #define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
147 /* FLASH organization */
148 #define CONFIG_SYS_FLASH_CFI
149 #ifdef CONFIG_SYS_FLASH_CFI
150 # define CONFIG_FLASH_CFI_DRIVER 1
151 # define CONFIG_SYS_FLASH_SIZE 0x800000 /* Max size that the board might have */
152 # define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
153 # define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
154 # define CONFIG_SYS_MAX_FLASH_SECT 254 /* max number of sectors on one chip */
155 # define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
158 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
161 * Configuration for environment
162 * Environment is embedded in u-boot in the second sector of the flash
164 #define CONFIG_ENV_OFFSET 0x2000
165 #define CONFIG_ENV_SIZE 0x1000
166 #define CONFIG_ENV_SECT_SIZE 0x2000
167 #define CONFIG_ENV_IS_IN_FLASH 1
169 #define LDS_BOARD_TEXT \
170 . = DEFINED(env_offset) ? env_offset : .; \
171 common/env_embedded.o (.text*);
173 /* Cache Configuration */
174 #define CONFIG_SYS_CACHELINE_SIZE 16
176 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
177 CONFIG_SYS_INIT_RAM_SIZE - 8)
178 #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
179 CONFIG_SYS_INIT_RAM_SIZE - 4)
180 #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV | CF_CACR_INVI)
181 #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \
182 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
183 CF_ACR_EN | CF_ACR_SM_ALL)
184 #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CINV | \
185 CF_CACR_DISD | CF_CACR_INVI | \
186 CF_CACR_CEIB | CF_CACR_DCM | \
189 /* Chipselect bank definitions */
198 #define CONFIG_SYS_CS0_BASE 0
199 #define CONFIG_SYS_CS0_MASK 0x007F0001
200 #define CONFIG_SYS_CS0_CTRL 0x00001FA0
202 #endif /* _M5208EVBE_H */