2 * Configuation settings for the BuS EB+MCF-EV123 boards.
4 * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #ifndef _CONFIG_EB_MCF_EV123_H_
26 #define _CONFIG_EB_MCF_EV123_H_
28 #undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP
30 /*----------------------------------------------------------------------*
31 * High Level Configuration Options (easy to change) *
32 *----------------------------------------------------------------------*/
34 #define CONFIG_MCF52x2 /* define processor family */
35 #define CONFIG_M5282 /* define processor type */
36 #define CONFIG_EB_MCF_EV123
38 #define CONFIG_MISC_INIT_R
40 #define CONFIG_MCFUART
41 #define CONFIG_SYS_UART_PORT (0)
42 #define CONFIG_BAUDRATE 9600
43 #define CONFIG_SYS_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
45 #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */
47 #define CONFIG_BOOTCOMMAND "printenv"
49 /*----------------------------------------------------------------------*
51 *----------------------------------------------------------------------*/
53 #define CONFIG_BOOT_RETRY_TIME -1
54 #define CONFIG_RESET_TO_RETRY
55 #define CONFIG_SPLASH_SCREEN
57 /*----------------------------------------------------------------------*
58 * Configuration for environment *
59 * Environment is in the second sector of the first 256k of flash *
60 *----------------------------------------------------------------------*/
62 #ifndef CONFIG_MONITOR_IS_IN_RAM
63 #define CONFIG_ENV_ADDR 0xF003C000 /* End of 256K */
64 #define CONFIG_ENV_SECT_SIZE 0x4000
65 #define CONFIG_ENV_IS_IN_FLASH 1
67 #define CONFIG_ENV_ADDR 0xFFE04000
68 #define CONFIG_ENV_SECT_SIZE 0x2000
69 #define CONFIG_ENV_IS_IN_FLASH 1
75 #define CONFIG_BOOTP_BOOTFILESIZE
76 #define CONFIG_BOOTP_BOOTPATH
77 #define CONFIG_BOOTP_GATEWAY
78 #define CONFIG_BOOTP_HOSTNAME
81 * Command line configuration.
83 #include <config_cmd_default.h>
85 #undef CONFIG_CMD_LOADB
86 #define CONFIG_CMD_MII
87 #define CONFIG_CMD_NET
92 #define CONFIG_BOOTDELAY 5
93 #define CONFIG_HUSH_PARSER
94 #define CONFIG_SYS_PROMPT "\nEV123 U-Boot> "
95 #define CONFIG_SYS_LONGHELP 1
97 #if defined(CONFIG_CMD_KGDB)
98 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
100 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
102 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
103 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
104 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
106 #define CONFIG_SYS_LOAD_ADDR 0x20000
108 #define CONFIG_SYS_MEMTEST_START 0x100000
109 #define CONFIG_SYS_MEMTEST_END 0x400000
110 /*#define CONFIG_SYS_DRAM_TEST 1 */
111 #undef CONFIG_SYS_DRAM_TEST
113 /*----------------------------------------------------------------------*
114 * Clock and PLL Configuration *
115 *----------------------------------------------------------------------*/
116 #define CONFIG_SYS_HZ 10000000
117 #define CONFIG_SYS_CLK 58982400 /* 9,8304MHz * 6 */
119 /* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
121 #define CONFIG_SYS_MFD 0x01 /* PLL Multiplication Factor Devider */
122 #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */
124 /*----------------------------------------------------------------------*
126 *----------------------------------------------------------------------*/
128 #define CONFIG_MCFFEC
129 #define CONFIG_NET_MULTI 1
131 #define CONFIG_MII_INIT 1
132 #define CONFIG_SYS_DISCOVER_PHY
133 #define CONFIG_SYS_RX_ETH_BUFFER 8
134 #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN
136 #define CONFIG_SYS_FEC0_PINMUX 0
137 #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE
138 #define MCFFEC_TOUT_LOOP 50000
140 #define CONFIG_ETHADDR 00:CF:52:82:EB:01
141 #define CONFIG_OVERWRITE_ETHADDR_ONCE
143 /*-------------------------------------------------------------------------
144 * Low Level Configuration Settings
145 * (address mappings, register initial values, etc.)
146 * You should know what you are doing if you make changes here.
147 *-----------------------------------------------------------------------*/
149 #define CONFIG_SYS_MBAR 0x40000000
151 /*-----------------------------------------------------------------------
152 * Definitions for initial stack pointer and data area (in DPRAM)
153 *-----------------------------------------------------------------------*/
155 #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
156 #define CONFIG_SYS_INIT_RAM_END 0x10000
157 #define CONFIG_SYS_GBL_DATA_SIZE 64
158 #define CONFIG_SYS_GBL_DATA_OFFSET \
159 (CONFIG_SYS_INIT_RAM_END - CONFIG_SYS_GBL_DATA_SIZE)
160 #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
162 /*-----------------------------------------------------------------------
163 * Start addresses for the final memory configuration
164 * (Set up by the startup code)
165 * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
167 #define CONFIG_SYS_SDRAM_BASE1 0x00000000
168 #define CONFIG_SYS_SDRAM_SIZE1 16 /* SDRAM size in MB */
170 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE1
171 #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE1
174 /* If M5282 port is fully implemented the monitor base will be behind
175 * the vector table. */
176 #if (TEXT_BASE != CONFIG_SYS_INT_FLASH_BASE)
177 #define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x400)
179 #define CONFIG_SYS_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
182 #define CONFIG_SYS_MONITOR_LEN 0x20000
183 #define CONFIG_SYS_MALLOC_LEN (256 << 10)
184 #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024
187 * For booting Linux, the board info and command line data
188 * have to be in the first 8 MB of memory, since this is
189 * the maximum mapped by the Linux kernel during initialization ??
191 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
193 /*-----------------------------------------------------------------------
197 #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
198 #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000
199 #define CONFIG_SYS_INT_FLASH_ENABLE 0x21
201 #define CONFIG_SYS_MAX_FLASH_SECT 35
202 #define CONFIG_SYS_MAX_FLASH_BANKS 2
203 #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000
204 #define CONFIG_SYS_FLASH_PROTECTION
206 /*-----------------------------------------------------------------------
207 * Cache Configuration
209 #define CONFIG_SYS_CACHELINE_SIZE 16
211 /*-----------------------------------------------------------------------
212 * Memory bank definitions
215 #define CONFIG_SYS_CS0_BASE 0xFFE00000
216 #define CONFIG_SYS_CS0_CTRL 0x00001980
217 #define CONFIG_SYS_CS0_MASK 0x001F0001
219 #define CONFIG_SYS_CS3_BASE 0xE0000000
220 #define CONFIG_SYS_CS0_CTRL 0x00001980
221 #define CONFIG_SYS_CS3_MASK 0x000F0001
223 /*-----------------------------------------------------------------------
226 #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */
227 #define CONFIG_SYS_PADDR 0x0000000
228 #define CONFIG_SYS_PADAT 0x0000000
230 #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */
231 #define CONFIG_SYS_PBDDR 0x0000000
232 #define CONFIG_SYS_PBDAT 0x0000000
234 #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */
235 #define CONFIG_SYS_PCDDR 0x0000000
236 #define CONFIG_SYS_PCDAT 0x0000000
238 #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */
239 #define CONFIG_SYS_PCDDR 0x0000000
240 #define CONFIG_SYS_PCDAT 0x0000000
242 #define CONFIG_SYS_PEHLPAR 0xC0
243 #define CONFIG_SYS_PUAPAR 0x0F
244 #define CONFIG_SYS_DDRUA 0x05
245 #define CONFIG_SYS_PJPAR 0xFF
247 /*-----------------------------------------------------------------------
248 * VIDEO configuration
254 #define CONFIG_VIDEO_VCXK 1
256 #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2
257 #define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1
258 #define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS3_BASE
259 #define CONFIG_SYS_VCXK_AUTODETECT 1
261 #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
262 #define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
263 #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001
265 #define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT
266 #define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR
267 #define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002
269 #define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT
270 #define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR
271 #define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004
273 #define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE
274 #define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE
275 #define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2
277 #endif /* CONFIG_VIDEO */
278 #endif /* _CONFIG_M5282EVB_H */
279 /*---------------------------------------------------------------------*/