include/configs/DK1S10_standard_32.h

   1 /*
   2  * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
   3  * Stephan Linz <linz@li-pro.net>
   4  *
   5  * See file CREDITS for list of people who contributed to this
   6  * project.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23
  24 #ifndef __CONFIG_DK1S10_STANDARD_32_H
  25 #define __CONFIG_DK1S10_STANDARD_32_H
  26
  27 /*
  28  * NIOS CPU configuration. (PART OF configs/DK1S10.h)
  29  *
  30  * Here we must define CPU dependencies. Any unsupported option have to
  31  * be defined with zero, example CPU without data cache / OCI:
  32  *
  33  *      #define CONFIG_SYS_NIOS_CPU_ICACHE      4096
  34  *      #define CONFIG_SYS_NIOS_CPU_DCACHE      0
  35  *      #define CONFIG_SYS_NIOS_CPU_OCI_BASE    0
  36  *      #define CONFIG_SYS_NIOS_CPU_OCI_SIZE    0
  37  */
  38
  39 /* CPU core */
  40 #define CONFIG_SYS_NIOS_CPU_CLK 50000000        /* NIOS CPU clock       */
  41 #define CONFIG_SYS_NIOS_CPU_ICACHE      (4 * 1024)      /* instruction cache    */
  42 #define CONFIG_SYS_NIOS_CPU_DCACHE      (4 * 1024)      /* data cache           */
  43 #define CONFIG_SYS_NIOS_CPU_REG_NUMS    256             /* number of register   */
  44 #define CONFIG_SYS_NIOS_CPU_MUL 0               /* 16x16 MUL:   no(0)   */
  45                                                 /*              yes(1)  */
  46 #define CONFIG_SYS_NIOS_CPU_MSTEP       1               /* 16x16 MSTEP: no(0)   */
  47                                                 /*              yes(1)  */
  48 #define CONFIG_SYS_NIOS_CPU_STACK       0x008fff00      /* stack top    addr    */
  49 #define CONFIG_SYS_NIOS_CPU_VEC_BASE    0x008fff00      /* IRQ vectors  addr    */
  50 #define CONFIG_SYS_NIOS_CPU_VEC_SIZE    256             /*              size    */
  51 #define CONFIG_SYS_NIOS_CPU_VEC_NUMS    64              /*              numbers */
  52 #define CONFIG_SYS_NIOS_CPU_RST_VECT    0x00920000      /* RESET vector addr    */
  53 #define CONFIG_SYS_NIOS_CPU_DBG_CORE    0               /* CPU debug:   no(0)   */
  54                                                 /*              yes(1)  */
  55
  56 /* on-chip extensions */
  57 #define CONFIG_SYS_NIOS_CPU_RAM_BASE    0x00900000      /* on chip RAM  addr    */
  58 #define CONFIG_SYS_NIOS_CPU_RAM_SIZE    (64 * 1024)     /* 64 KB        size    */
  59
  60 #define CONFIG_SYS_NIOS_CPU_ROM_BASE    0x00920000      /* on chip ROM  addr    */
  61 #define CONFIG_SYS_NIOS_CPU_ROM_SIZE    (2 * 1024)      /*  2 KB        size    */
  62
  63 #define CONFIG_SYS_NIOS_CPU_OCI_BASE    0x00920800      /* OCI core     addr    */
  64 #define CONFIG_SYS_NIOS_CPU_OCI_SIZE    256             /*              size    */
  65
  66 /* timer */
  67 #define CONFIG_SYS_NIOS_CPU_TIMER_NUMS  2               /* number of timer      */
  68
  69 #define CONFIG_SYS_NIOS_CPU_TIMER0      0x00920940      /* TIMER0       addr    */
  70 #define CONFIG_SYS_NIOS_CPU_TIMER0_IRQ  16              /*              IRQ     */
  71 #define CONFIG_SYS_NIOS_CPU_TIMER0_PER  1000            /*  periode     usec    */
  72 #define CONFIG_SYS_NIOS_CPU_TIMER0_AR   0               /*  always run: no(0)   */
  73                                                 /*              yes(1)  */
  74 #define CONFIG_SYS_NIOS_CPU_TIMER0_FP   0               /*  fixed per:  no(0)   */
  75                                                 /*              yes(1)  */
  76 #define CONFIG_SYS_NIOS_CPU_TIMER0_SS   1               /*  snaphot:    no(0)   */
  77                                                 /*              yes(1)  */
  78
  79 #define CONFIG_SYS_NIOS_CPU_TIMER1      0x009209e0      /* TIMER1       addr    */
  80 #define CONFIG_SYS_NIOS_CPU_TIMER1_IRQ  50              /*              IRQ     */
  81 #define CONFIG_SYS_NIOS_CPU_TIMER1_PER  10000           /*  periode     usec    */
  82 #define CONFIG_SYS_NIOS_CPU_TIMER1_AR   1               /*  always run: no(0)   */
  83                                                 /*              yes(1)  */
  84 #define CONFIG_SYS_NIOS_CPU_TIMER1_FP   1               /*  fixed per:  no(0)   */
  85                                                 /*              yes(1)  */
  86 #define CONFIG_SYS_NIOS_CPU_TIMER1_SS   0               /*  snaphot:    no(0)   */
  87                                                 /*              yes(1)  */
  88
  89 /* serial i/o */
  90 #define CONFIG_SYS_NIOS_CPU_UART_NUMS   1               /* number of uarts      */
  91
  92 #define CONFIG_SYS_NIOS_CPU_UART0       0x00920900      /* UART0        addr    */
  93 #define CONFIG_SYS_NIOS_CPU_UART0_IRQ   25              /*              IRQ     */
  94 #define CONFIG_SYS_NIOS_CPU_UART0_BR    115200          /*  baudrate    var(0)  */
  95 #define CONFIG_SYS_NIOS_CPU_UART0_DB    8               /*  data bit            */
  96 #define CONFIG_SYS_NIOS_CPU_UART0_SB    1               /*  stop bit            */
  97 #define CONFIG_SYS_NIOS_CPU_UART0_PA    0               /*  parity      none(0) */
  98                                                 /*              odd(1)  */
  99                                                 /*              even(2) */
 100 #define CONFIG_SYS_NIOS_CPU_UART0_HS    0               /*  handshake:  no(0)   */
 101                                                 /*              crts(1) */
 102 #define CONFIG_SYS_NIOS_CPU_UART0_EOP   0               /*  eop reg:    no(0)   */
 103                                                 /*              yes(1)  */
 104
 105 /* parallel i/o */
 106 #define CONFIG_SYS_NIOS_CPU_PIO_NUMS    8               /* number of parports   */
 107
 108 #define CONFIG_SYS_NIOS_CPU_PIO0        0x00920960      /* PIO0         addr    */
 109 #define CONFIG_SYS_NIOS_CPU_PIO0_IRQ    40              /*              IRQ     */
 110 #define CONFIG_SYS_NIOS_CPU_PIO0_BITS   4               /*  number  of  bits    */
 111 #define CONFIG_SYS_NIOS_CPU_PIO0_TYPE   2               /*  io type:    tris(0) */
 112                                                 /*              out(1)  */
 113                                                 /*              in(2)   */
 114 #define CONFIG_SYS_NIOS_CPU_PIO0_CAP    1               /*  capture:    no(0)   */
 115                                                 /*              yes(1)  */
 116 #define CONFIG_SYS_NIOS_CPU_PIO0_EDGE   3               /*  edge type:  none(0) */
 117                                                 /*              fall(1) */
 118                                                 /*              rise(2) */
 119                                                 /*              any(3)  */
 120 #define CONFIG_SYS_NIOS_CPU_PIO0_ITYPE  2               /*  IRQ type:   none(0) */
 121                                                 /*              level(1)*/
 122                                                 /*              edge(2) */
 123
 124 #define CONFIG_SYS_NIOS_CPU_PIO1        0x00920970      /* PIO1         addr    */
 125 #undef  CONFIG_SYS_NIOS_CPU_PIO1_IRQ                    /*              w/o IRQ */
 126 #define CONFIG_SYS_NIOS_CPU_PIO1_BITS   11              /*  number  of  bits    */
 127 #define CONFIG_SYS_NIOS_CPU_PIO1_TYPE   0               /*  io type:    tris(0) */
 128                                                 /*              out(1)  */
 129                                                 /*              in(2)   */
 130 #define CONFIG_SYS_NIOS_CPU_PIO1_CAP    0               /*  capture:    no(0)   */
 131                                                 /*              yes(1)  */
 132 #define CONFIG_SYS_NIOS_CPU_PIO1_EDGE   0               /*  edge type:  none(0) */
 133                                                 /*              fall(1) */
 134                                                 /*              rise(2) */
 135                                                 /*              any(3)  */
 136 #define CONFIG_SYS_NIOS_CPU_PIO1_ITYPE  0               /*  IRQ type:   none(0) */
 137                                                 /*              level(1)*/
 138                                                 /*              edge(2) */
 139
 140 #define CONFIG_SYS_NIOS_CPU_PIO2        0x00920980      /* PIO2         addr    */
 141 #undef  CONFIG_SYS_NIOS_CPU_PIO2_IRQ                    /*              w/o IRQ */
 142 #define CONFIG_SYS_NIOS_CPU_PIO2_BITS   8               /*  number  of  bits    */
 143 #define CONFIG_SYS_NIOS_CPU_PIO2_TYPE   1               /*  io type:    tris(0) */
 144                                                 /*              out(1)  */
 145                                                 /*              in(2)   */
 146 #define CONFIG_SYS_NIOS_CPU_PIO2_CAP    0               /*  capture:    no(0)   */
 147                                                 /*              yes(1)  */
 148 #define CONFIG_SYS_NIOS_CPU_PIO2_EDGE   0               /*  edge type:  none(0) */
 149                                                 /*              fall(1) */
 150                                                 /*              rise(2) */
 151                                                 /*              any(3)  */
 152 #define CONFIG_SYS_NIOS_CPU_PIO2_ITYPE  0               /*  IRQ type:   none(0) */
 153                                                 /*              level(1)*/
 154                                                 /*              edge(2) */
 155
 156 #define CONFIG_SYS_NIOS_CPU_PIO3        0x00920990      /* PIO3         addr    */
 157 #undef  CONFIG_SYS_NIOS_CPU_PIO3_IRQ                    /*              w/o IRQ */
 158 #define CONFIG_SYS_NIOS_CPU_PIO3_BITS   16              /*  number  of  bits    */
 159 #define CONFIG_SYS_NIOS_CPU_PIO3_TYPE   1               /*  io type:    tris(0) */
 160                                                 /*              out(1)  */
 161                                                 /*              in(2)   */
 162 #define CONFIG_SYS_NIOS_CPU_PIO3_CAP    0               /*  capture:    no(0)   */
 163                                                 /*              yes(1)  */
 164 #define CONFIG_SYS_NIOS_CPU_PIO3_EDGE   0               /*  edge type:  none(0) */
 165                                                 /*              fall(1) */
 166                                                 /*              rise(2) */
 167                                                 /*              any(3)  */
 168 #define CONFIG_SYS_NIOS_CPU_PIO3_ITYPE  0               /*  IRQ type:   none(0) */
 169                                                 /*              level(1)*/
 170                                                 /*              edge(2) */
 171
 172 #define CONFIG_SYS_NIOS_CPU_PIO4        0x009209a0      /* PIO4         addr    */
 173 #undef  CONFIG_SYS_NIOS_CPU_PIO4_IRQ                    /*              w/o IRQ */
 174 #define CONFIG_SYS_NIOS_CPU_PIO4_BITS   1               /*  number  of  bits    */
 175 #define CONFIG_SYS_NIOS_CPU_PIO4_TYPE   0               /*  io type:    tris(0) */
 176                                                 /*              out(1)  */
 177                                                 /*              in(2)   */
 178 #define CONFIG_SYS_NIOS_CPU_PIO4_CAP    0               /*  capture:    no(0)   */
 179                                                 /*              yes(1)  */
 180 #define CONFIG_SYS_NIOS_CPU_PIO4_EDGE   0               /*  edge type:  none(0) */
 181                                                 /*              fall(1) */
 182                                                 /*              rise(2) */
 183                                                 /*              any(3)  */
 184 #define CONFIG_SYS_NIOS_CPU_PIO4_ITYPE  0               /*  IRQ type:   none(0) */
 185                                                 /*              level(1)*/
 186                                                 /*              edge(2) */
 187
 188 #define CONFIG_SYS_NIOS_CPU_PIO5        0x009209b0      /* PIO5         addr    */
 189 #define CONFIG_SYS_NIOS_CPU_PIO5_IRQ    35              /*              IRQ     */
 190 #define CONFIG_SYS_NIOS_CPU_PIO5_BITS   1               /*  number  of  bits    */
 191 #define CONFIG_SYS_NIOS_CPU_PIO5_TYPE   2               /*  io type:    tris(0) */
 192                                                 /*              out(1)  */
 193                                                 /*              in(2)   */
 194 #define CONFIG_SYS_NIOS_CPU_PIO5_CAP    1               /*  capture:    no(0)   */
 195                                                 /*              yes(1)  */
 196 #define CONFIG_SYS_NIOS_CPU_PIO5_EDGE   3               /*  edge type:  none(0) */
 197                                                 /*              fall(1) */
 198                                                 /*              rise(2) */
 199                                                 /*              any(3)  */
 200 #define CONFIG_SYS_NIOS_CPU_PIO5_ITYPE  2               /*  IRQ type:   none(0) */
 201                                                 /*              level(1)*/
 202                                                 /*              edge(2) */
 203
 204 #define CONFIG_SYS_NIOS_CPU_PIO6        0x009209c0      /* PIO6         addr    */
 205 #undef  CONFIG_SYS_NIOS_CPU_PIO6_IRQ                    /*              w/o IRQ */
 206 #define CONFIG_SYS_NIOS_CPU_PIO6_BITS   1               /*  number  of  bits    */
 207 #define CONFIG_SYS_NIOS_CPU_PIO6_TYPE   1               /*  io type:    tris(0) */
 208                                                 /*              out(1)  */
 209                                                 /*              in(2)   */
 210 #define CONFIG_SYS_NIOS_CPU_PIO6_CAP    0               /*  capture:    no(0)   */
 211                                                 /*              yes(1)  */
 212 #define CONFIG_SYS_NIOS_CPU_PIO6_EDGE   0               /*  edge type:  none(0) */
 213                                                 /*              fall(1) */
 214                                                 /*              rise(2) */
 215                                                 /*              any(3)  */
 216 #define CONFIG_SYS_NIOS_CPU_PIO6_ITYPE  0               /*  IRQ type:   none(0) */
 217                                                 /*              level(1)*/
 218                                                 /*              edge(2) */
 219
 220 #define CONFIG_SYS_NIOS_CPU_PIO7        0x009209d0      /* PIO7         addr    */
 221 #undef  CONFIG_SYS_NIOS_CPU_PIO7_IRQ                    /*              w/o IRQ */
 222 #define CONFIG_SYS_NIOS_CPU_PIO7_BITS   1               /*  number  of  bits    */
 223 #define CONFIG_SYS_NIOS_CPU_PIO7_TYPE   1               /*  io type:    tris(0) */
 224                                                 /*              out(1)  */
 225                                                 /*              in(2)   */
 226 #define CONFIG_SYS_NIOS_CPU_PIO7_CAP    0               /*  capture:    no(0)   */
 227                                                 /*              yes(1)  */
 228 #define CONFIG_SYS_NIOS_CPU_PIO7_EDGE   0               /*  edge type:  none(0) */
 229                                                 /*              fall(1) */
 230                                                 /*              rise(2) */
 231                                                 /*              any(3)  */
 232 #define CONFIG_SYS_NIOS_CPU_PIO7_ITYPE  0               /*  IRQ type:   none(0) */
 233                                                 /*              level(1)*/
 234                                                 /*              edge(2) */
 235
 236 /* IDE i/f */
 237 #define CONFIG_SYS_NIOS_CPU_IDE_NUMS    1               /* number of IDE contr. */
 238 #define CONFIG_SYS_NIOS_CPU_IDE0        0x00920a00      /* IDE0         addr    */
 239
 240 /* memory accessibility */
 241 #define CONFIG_SYS_NIOS_CPU_SRAM_BASE   0x00800000      /* board SRAM   addr    */
 242 #define CONFIG_SYS_NIOS_CPU_SRAM_SIZE   (1024 * 1024)   /*  1 MB        size    */
 243
 244 #define CONFIG_SYS_NIOS_CPU_SDRAM_BASE  0x01000000      /* board SDRAM  addr    */
 245 #define CONFIG_SYS_NIOS_CPU_SDRAM_SIZE  (16*1024*1024)  /* 16 MB        size    */
 246
 247 #define CONFIG_SYS_NIOS_CPU_FLASH_BASE  0x00000000      /* board Flash  addr    */
 248 #define CONFIG_SYS_NIOS_CPU_FLASH_SIZE  (8*1024*1024)   /*  8 MB        size    */
 249
 250 /* LAN */
 251 #define CONFIG_SYS_NIOS_CPU_LAN_NUMS    1               /* number of LAN i/f    */
 252
 253 #define CONFIG_SYS_NIOS_CPU_LAN0_BASE   0x00910000      /* LAN0         addr    */
 254 #define CONFIG_SYS_NIOS_CPU_LAN0_OFFS   0x0300          /*              offset  */
 255 #define CONFIG_SYS_NIOS_CPU_LAN0_IRQ    30              /*              IRQ     */
 256 #define CONFIG_SYS_NIOS_CPU_LAN0_BUSW   32              /*              buswidth*/
 257 #define CONFIG_SYS_NIOS_CPU_LAN0_TYPE   0               /*      smc91111(0)     */
 258                                                 /*      cs8900(1)       */
 259                                                 /* ex:  alteramac(2)    */
 260
 261 /* symbolic redefinition (undef, if not present) */
 262 #define CONFIG_SYS_NIOS_CPU_USER_TIMER          0       /* TIMER0: users choice */
 263 #define CONFIG_SYS_NIOS_CPU_TICK_TIMER          1       /* TIMER1: tick (needed)*/
 264
 265 #define CONFIG_SYS_NIOS_CPU_BUTTON_PIO          0       /* PIO0: buttons        */
 266 #define CONFIG_SYS_NIOS_CPU_LCD_PIO             1       /* PIO1: ASCII LCD      */
 267 #define CONFIG_SYS_NIOS_CPU_LED_PIO             2       /* PIO2: LED bar        */
 268 #define CONFIG_SYS_NIOS_CPU_SEVENSEG_PIO        3       /* PIO3: 7-seg. display */
 269 #define CONFIG_SYS_NIOS_CPU_RECONF_PIO          4       /* PIO4: reconf pin     */
 270 #define CONFIG_SYS_NIOS_CPU_CFPRESENT_PIO       5       /* PIO5: CF present IRQ */
 271 #define CONFIG_SYS_NIOS_CPU_CFPOWER_PIO 6       /* PIO6: CF power/sw.   */
 272 #define CONFIG_SYS_NIOS_CPU_CFATASEL_PIO        7       /* PIO7: CF ATA select  */
 273
 274 #endif  /* __CONFIG_DK1S10_STANDARD_32_H */