2 * (C) Copyright 2003, Li-Pro.Net <www.li-pro.net>
3 * Stephan Linz <linz@li-pro.net>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 /***********************************************************************
28 * Include the whole NIOS CPU configuration.
30 * !!! HAVE TO BE HERE !!! DON'T MOVE THIS PART !!!
32 ***********************************************************************/
34 #if defined(CONFIG_NIOS_SAFE_32)
35 #include <configs/DK1S10_safe_32.h>
36 #elif defined(CONFIG_NIOS_STANDARD_32)
37 #include <configs/DK1S10_standard_32.h>
38 #elif defined(CONFIG_NIOS_MTX_LDK_20)
39 #include <configs/DK1S10_mtx_ldk_20.h>
41 #error *** CFG_ERROR: you have to setup right NIOS CPU configuration
44 /*------------------------------------------------------------------------
45 * BOARD/CPU -- TOP-LEVEL
46 *----------------------------------------------------------------------*/
47 #define CONFIG_NIOS 1 /* NIOS-32 core */
48 #define CONFIG_DK1S10 1 /* Stratix DK-1S10 board*/
49 #define CONFIG_SYS_CLK_FREQ CFG_NIOS_CPU_CLK/* 50 MHz core clock */
50 #define CFG_HZ 1000 /* 1 msec time tick */
52 #define CONFIG_BOARD_EARLY_INIT_F 1 /* enable early board-spec. init*/
54 /*------------------------------------------------------------------------
55 * BASE ADDRESSES / SIZE (Flash, SRAM, SDRAM)
56 *----------------------------------------------------------------------*/
57 #if (CFG_NIOS_CPU_SDRAM_SIZE != 0)
59 #define CFG_SDRAM_BASE CFG_NIOS_CPU_SDRAM_BASE
60 #define CFG_SDRAM_SIZE CFG_NIOS_CPU_SDRAM_SIZE
63 #error *** CFG_ERROR: you have to setup any SDRAM in NIOS CPU config
66 #if defined(CFG_NIOS_CPU_SRAM_BASE) && defined(CFG_NIOS_CPU_SRAM_SIZE)
68 #define CFG_SRAM_BASE CFG_NIOS_CPU_SRAM_BASE
69 #define CFG_SRAM_SIZE CFG_NIOS_CPU_SRAM_SIZE
78 #define CFG_VECT_BASE CFG_NIOS_CPU_VEC_BASE
80 /*------------------------------------------------------------------------
81 * MEMORY ORGANIZATION - For the most part, you can put things pretty
82 * much anywhere. This is pretty flexible for Nios. So here we make some
83 * arbitrary choices & assume that the monitor is placed at the end of
84 * a memory resource (so you must make sure TEXT_BASE is chosen
87 * -The heap is placed below the monitor.
88 * -Global data is placed below the heap.
89 * -The stack is placed below global data (&grows down).
90 *----------------------------------------------------------------------*/
91 #define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256k */
92 #define CFG_GBL_DATA_SIZE 128 /* Global data size rsvd*/
93 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
95 #define CFG_MONITOR_BASE TEXT_BASE
96 #define CFG_MALLOC_BASE (CFG_MONITOR_BASE - CFG_MALLOC_LEN)
97 #define CFG_GBL_DATA_OFFSET (CFG_MALLOC_BASE - CFG_GBL_DATA_SIZE)
98 #define CFG_INIT_SP CFG_GBL_DATA_OFFSET
100 /*------------------------------------------------------------------------
102 *----------------------------------------------------------------------*/
103 #if (CFG_NIOS_CPU_FLASH_SIZE != 0)
105 #define CFG_FLASH_BASE CFG_NIOS_CPU_FLASH_BASE
106 #define CFG_FLASH_SIZE CFG_NIOS_CPU_FLASH_SIZE
107 #define CFG_MAX_FLASH_SECT 128 /* Max # sects per bank */
108 #define CFG_MAX_FLASH_BANKS 1 /* Max # of flash banks */
109 #define CFG_FLASH_ERASE_TOUT 8000 /* Erase timeout (msec) */
110 #define CFG_FLASH_WRITE_TOUT 100 /* Write timeout (msec) */
111 #define CFG_FLASH_WORD_SIZE unsigned char /* flash word size */
114 #error *** CFG_ERROR: you have to setup any Flash memory in NIOS CPU config
117 /*------------------------------------------------------------------------
119 *----------------------------------------------------------------------*/
120 #if (CFG_NIOS_CPU_FLASH_SIZE != 0)
122 #define CFG_ENV_IS_IN_FLASH 1 /* Environment in flash */
124 #if defined(CONFIG_NIOS_STANDARD_32)
125 #define CFG_ENV_ADDR CFG_FLASH_BASE /* Mem addr of env */
126 #elif defined(CONFIG_NIOS_MTX_LDK_20)
127 #define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
129 #error *** CFG_ERROR: you have to setup the environment base address CFG_ENV_ADDR
132 #define CFG_ENV_SIZE (64 * 1024) /* 64 KByte (1 sector) */
133 #define CONFIG_ENV_OVERWRITE /* Serial/eth change Ok */
136 #define CFG_ENV_IS_NOWHERE 1 /* NO Environment */
139 /*------------------------------------------------------------------------
141 *----------------------------------------------------------------------*/
142 #if (CFG_NIOS_CPU_UART_NUMS != 0)
144 #define CFG_NIOS_CONSOLE CFG_NIOS_CPU_UART0 /* 1st UART is Cons. */
146 #if (CFG_NIOS_CPU_UART0_BR != 0)
147 #define CFG_NIOS_FIXEDBAUD 1 /* Baudrate is fixed */
148 #define CONFIG_BAUDRATE CFG_NIOS_CPU_UART0_BR
150 #undef CFG_NIOS_FIXEDBAUD
151 #define CONFIG_BAUDRATE 115200
154 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
157 #error *** CFG_ERROR: you have to setup at least one UART in NIOS CPU config
160 /*------------------------------------------------------------------------
161 * TIMER FOR TIMEBASE -- Nios doesn't have the equivalent of ppc PIT,
162 * so an avalon bus timer is required.
163 *----------------------------------------------------------------------*/
164 #if (CFG_NIOS_CPU_TIMER_NUMS != 0) && defined(CFG_NIOS_CPU_TICK_TIMER)
166 #if (CFG_NIOS_CPU_TICK_TIMER == 0)
168 #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER0 /* TIMER0 as tick */
169 #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER0_IRQ
171 #if (CFG_NIOS_CPU_TIMER0_FP == 1) /* fixed period */
173 #if (CFG_NIOS_CPU_TIMER0_PER >= CFG_HZ)
174 #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER0_PER / CFG_HZ)
176 #error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
179 #undef CFG_NIOS_TMRCNT /* no preloadable counter value */
181 #elif (CFG_NIOS_CPU_TIMER0_FP == 0) /* variable period */
184 #define CFG_NIOS_TMRMS (1000 / CFG_HZ)
186 #error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
189 #define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ)
192 #error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER0_FP correct
195 #elif (CFG_NIOS_CPU_TICK_TIMER == 1)
197 #define CFG_NIOS_TMRBASE CFG_NIOS_CPU_TIMER1 /* TIMER1 as tick */
198 #define CFG_NIOS_TMRIRQ CFG_NIOS_CPU_TIMER1_IRQ
200 #if (CFG_NIOS_CPU_TIMER1_FP == 1) /* fixed period */
202 #if (CFG_NIOS_CPU_TIMER1_PER >= CFG_HZ)
203 #define CFG_NIOS_TMRMS (CFG_NIOS_CPU_TIMER1_PER / CFG_HZ)
205 #error *** CFG_ERROR: you have to use a timer periode greater than CFG_HZ
208 #undef CFG_NIOS_TMRCNT /* no preloadable counter value */
210 #elif (CFG_NIOS_CPU_TIMER1_FP == 0) /* variable period */
213 #define CFG_NIOS_TMRMS (1000 / CFG_HZ)
215 #error *** CFG_ERROR: sorry, CFG_HZ have to be less than 1000
218 #define CFG_NIOS_TMRCNT (CONFIG_SYS_CLK_FREQ / CFG_HZ)
221 #error *** CFG_ERROR: you have to define CFG_NIOS_CPU_TIMER1_FP correct
224 #endif /* CFG_NIOS_CPU_TICK_TIMER */
227 #error *** CFG_ERROR: you have to setup at least one TIMER in NIOS CPU config
230 /*------------------------------------------------------------------------
231 * Ethernet -- needs work!
232 *----------------------------------------------------------------------*/
233 #if (CFG_NIOS_CPU_LAN_NUMS == 1)
235 #if (CFG_NIOS_CPU_LAN0_TYPE == 0) /* LAN91C111 */
237 #define CONFIG_DRIVER_SMC91111 /* Using SMC91c111 */
238 #undef CONFIG_SMC91111_EXT_PHY /* Internal PHY */
239 #define CONFIG_SMC91111_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
241 #if (CFG_NIOS_CPU_LAN0_BUSW == 32)
242 #define CONFIG_SMC_USE_32_BIT 1
244 #undef CONFIG_SMC_USE_32_BIT
247 #elif (CFG_NIOS_CPU_LAN0_TYPE == 1) /* CS8900A */
249 /********************************************/
250 /* !!! CS8900 is __not__ tested on NIOS !!! */
251 /********************************************/
252 #define CONFIG_DRIVER_CS8900 /* Using CS8900 */
253 #define CS8900_BASE (CFG_NIOS_CPU_LAN0_BASE + CFG_NIOS_CPU_LAN0_OFFS)
255 #if (CFG_NIOS_CPU_LAN0_BUSW == 32)
257 #define CS8900_BUS32 1
259 #define CS8900_BUS16 1
264 #error *** CFG_ERROR: invalid LAN0 chip type, check your NIOS CPU config
267 #define CONFIG_ETHADDR 08:00:3e:26:0a:5b
268 #define CONFIG_NETMASK 255.255.255.0
269 #define CONFIG_IPADDR 192.168.2.21
270 #define CONFIG_SERVERIP 192.168.2.16
273 #error *** CFG_ERROR: you have to setup just one LAN only or expand your config.h
276 /*------------------------------------------------------------------------
278 *----------------------------------------------------------------------*/
279 #if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_LED_PIO)
281 #if (CFG_NIOS_CPU_LED_PIO == 0)
283 #error *** CFG_ERROR: status LEDs at PIO0 not supported, expand your config.h
285 #elif (CFG_NIOS_CPU_LED_PIO == 1)
287 #error *** CFG_ERROR: status LEDs at PIO1 not supported, expand your config.h
289 #elif (CFG_NIOS_CPU_LED_PIO == 2)
291 #define STATUS_LED_BASE CFG_NIOS_CPU_PIO2
292 #define STATUS_LED_BITS CFG_NIOS_CPU_PIO2_BITS
293 #define STATUS_LED_ACTIVE 1 /* LED on for bit == 1 */
295 #if (CFG_NIOS_CPU_PIO2_TYPE == 1)
296 #define STATUS_LED_WRONLY 1
298 #undef STATUS_LED_WRONLY
301 #elif (CFG_NIOS_CPU_LED_PIO == 3)
303 #error *** CFG_ERROR: status LEDs at PIO3 not supported, expand your config.h
305 #elif (CFG_NIOS_CPU_LED_PIO == 4)
307 #error *** CFG_ERROR: status LEDs at PIO4 not supported, expand your config.h
309 #elif (CFG_NIOS_CPU_LED_PIO == 5)
311 #error *** CFG_ERROR: status LEDs at PIO5 not supported, expand your config.h
313 #elif (CFG_NIOS_CPU_LED_PIO == 6)
315 #error *** CFG_ERROR: status LEDs at PIO6 not supported, expand your config.h
317 #elif (CFG_NIOS_CPU_LED_PIO == 7)
319 #error *** CFG_ERROR: status LEDs at PIO7 not supported, expand your config.h
321 #elif (CFG_NIOS_CPU_LED_PIO == 8)
323 #error *** CFG_ERROR: status LEDs at PIO8 not supported, expand your config.h
325 #elif (CFG_NIOS_CPU_LED_PIO == 9)
327 #error *** CFG_ERROR: status LEDs at PIO9 not supported, expand your config.h
330 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_LED_PIO in right case
333 #define CONFIG_STATUS_LED 1 /* enable status led driver */
335 #define STATUS_LED_BIT (1 << 0) /* LED[0] */
336 #define STATUS_LED_STATE STATUS_LED_BLINKING
337 #define STATUS_LED_BOOT_STATE STATUS_LED_OFF
338 #define STATUS_LED_PERIOD (CFG_HZ / 10) /* ca. 1 Hz */
339 #define STATUS_LED_BOOT 0 /* boot LED */
341 #if (STATUS_LED_BITS > 1)
342 #define STATUS_LED_BIT1 (1 << 1) /* LED[1] */
343 #define STATUS_LED_STATE1 STATUS_LED_OFF
344 #define STATUS_LED_PERIOD1 (CFG_HZ / 50) /* ca. 5 Hz */
345 #define STATUS_LED_RED 1 /* fail LED */
348 #if (STATUS_LED_BITS > 2)
349 #define STATUS_LED_BIT2 (1 << 2) /* LED[2] */
350 #define STATUS_LED_STATE2 STATUS_LED_OFF
351 #define STATUS_LED_PERIOD2 (CFG_HZ / 10) /* ca. 1 Hz */
352 #define STATUS_LED_YELLOW 2 /* info LED */
355 #if (STATUS_LED_BITS > 3)
356 #define STATUS_LED_BIT3 (1 << 3) /* LED[3] */
357 #define STATUS_LED_STATE3 STATUS_LED_OFF
358 #define STATUS_LED_PERIOD3 (CFG_HZ / 10) /* ca. 1 Hz */
359 #define STATUS_LED_GREEN 3 /* info LED */
362 #define STATUS_LED_PAR 1 /* makes status_led.h happy */
364 #endif /* CFG_NIOS_CPU_PIO_NUMS */
366 /*------------------------------------------------------------------------
367 * SEVEN SEGMENT LED DISPLAY
368 *----------------------------------------------------------------------*/
369 #if (CFG_NIOS_CPU_PIO_NUMS != 0) && defined(CFG_NIOS_CPU_SEVENSEG_PIO)
371 #if (CFG_NIOS_CPU_SEVENSEG_PIO == 0)
373 #error *** CFG_ERROR: seven segment display at PIO0 not supported, expand your config.h
375 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 1)
377 #error *** CFG_ERROR: seven segment display at PIO1 not supported, expand your config.h
379 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 2)
381 #error *** CFG_ERROR: seven segment display at PIO2 not supported, expand your config.h
383 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 3)
385 #define SEVENSEG_BASE CFG_NIOS_CPU_PIO3
386 #define SEVENSEG_BITS CFG_NIOS_CPU_PIO3_BITS
387 #define SEVENSEG_ACTIVE 0 /* LED on for bit == 1 */
389 #if (CFG_NIOS_CPU_PIO3_TYPE == 1)
390 #define SEVENSEG_WRONLY 1
392 #undef SEVENSEG_WRONLY
395 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 4)
397 #error *** CFG_ERROR: seven segment display at PIO4 not supported, expand your config.h
399 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 5)
401 #error *** CFG_ERROR: seven segment display at PIO5 not supported, expand your config.h
403 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 6)
405 #error *** CFG_ERROR: seven segment display at PIO6 not supported, expand your config.h
407 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 7)
409 #error *** CFG_ERROR: seven segment display at PIO7 not supported, expand your config.h
411 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 8)
413 #error *** CFG_ERROR: seven segment display at PIO8 not supported, expand your config.h
415 #elif (CFG_NIOS_CPU_SEVENSEG_PIO == 9)
417 #error *** CFG_ERROR: seven segment display at PIO9 not supported, expand your config.h
420 #error *** CFG_ERROR: you have to set CFG_NIOS_CPU_SEVENSEG_PIO in right case
423 #define CONFIG_SEVENSEG 1 /* enable seven segment led driver */
426 * Dual 7-Segment Display pin assignment -- read more in your
427 * "Nios Development Board Reference Manual"
430 * (U8) HI:D[15..8] (U9) LO:D[7..0]
435 * |______| |______| ___
436 * | D8 | | D0 | | A |
438 * D10| |D12 D2| |D4 | G |
439 * |______| |______| E|___|C
444 #define SEVENSEG_DIGIT_HI_LO_EQUAL 1 /* high nibble equal low nibble */
445 #define SEVENSEG_DIGIT_A (1 << 6) /* bit 6 is segment A */
446 #define SEVENSEG_DIGIT_B (1 << 5) /* bit 5 is segment B */
447 #define SEVENSEG_DIGIT_C (1 << 4) /* bit 4 is segment C */
448 #define SEVENSEG_DIGIT_D (1 << 3) /* bit 3 is segment D */
449 #define SEVENSEG_DIGIT_E (1 << 2) /* bit 2 is segment E */
450 #define SEVENSEG_DIGIT_F (1 << 1) /* bit 1 is segment F */
451 #define SEVENSEG_DIGIT_G (1 << 0) /* bit 0 is segment G */
452 #define SEVENSEG_DIGIT_DP (1 << 7) /* bit 7 is decimal point */
454 #endif /* CFG_NIOS_CPU_PIO_NUMS */
456 /*------------------------------------------------------------------------
458 *----------------------------------------------------------------------*/
459 #define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
489 #include <cmd_confdefs.h>
491 /*------------------------------------------------------------------------
493 *----------------------------------------------------------------------*/
494 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
495 #define CONFIG_KGDB_BAUDRATE 9600
498 /*------------------------------------------------------------------------
500 *----------------------------------------------------------------------*/
501 #define CFG_LONGHELP /* undef to save memory */
502 #define CFG_PROMPT "DK1S10 > " /* Monitor Command Prompt */
503 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
504 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
505 #define CFG_MAXARGS 16 /* max number of command args*/
506 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
508 /* Default load address */
509 #if (CFG_SRAM_SIZE != 0)
511 /* default in SRAM */
512 #define CFG_LOAD_ADDR CFG_SRAM_BASE
514 #elif (CFG_SDRAM_SIZE != 0)
516 /* default in SDRAM */
517 #if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)
518 #define CFG_LOAD_ADDR (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)
520 #define CFG_LOAD_ADDR CFG_SDRAM_BASE
524 #undef CFG_LOAD_ADDR /* force error break */
529 #if (CFG_SDRAM_SIZE != 0)
531 /* SDRAM begin to stack area (1MB stack) */
532 #if (CFG_SDRAM_BASE == CFG_NIOS_CPU_VEC_BASE)
533 #define CFG_MEMTEST_START (CFG_SDRAM_BASE + CFG_NIOS_CPU_VEC_SIZE)
534 #define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))
536 #define CFG_MEMTEST_START CFG_SDRAM_BASE
537 #define CFG_MEMTEST_END (CFG_INIT_SP - (1024 * 1024))
541 #undef CFG_MEMTEST_START /* force error break */
542 #undef CFG_MEMTEST_END
546 #endif /* __CONFIG_H */