1 /* originally from linux source.
2 * removed the dependencies on CONFIG_ values
3 * removed virt_to_phys stuff (and in fact everything surrounded by #if __KERNEL__)
4 * Modified By Rob Taylor, Flying Pig Systems, 2000
10 #include <linux/config.h>
11 #include <asm/byteorder.h>
13 #define SIO_CONFIG_RA 0x398
14 #define SIO_CONFIG_RD 0x399
17 #define readb(addr) in_8((volatile u8 *)(addr))
18 #define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
19 #if !defined(__BIG_ENDIAN)
20 #define readw(addr) (*(volatile u16 *) (addr))
21 #define readl(addr) (*(volatile u32 *) (addr))
22 #define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
23 #define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
25 #define readw(addr) in_le16((volatile u16 *)(addr))
26 #define readl(addr) in_le32((volatile u32 *)(addr))
27 #define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
28 #define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
32 * The insw/outsw/insl/outsl macros don't do byte-swapping.
33 * They are only used in practice for transferring buffers which
34 * are arrays of bytes, and byte-swapping is not appropriate in
37 #define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
38 #define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
39 #define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
40 #define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
41 #define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
42 #define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
44 #define inb(port) in_8((u8 *)((port)+_IO_BASE))
45 #define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
46 #if !defined(__BIG_ENDIAN)
47 #define inw(port) in_be16((u16 *)((port)+_IO_BASE))
48 #define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
49 #define inl(port) in_be32((u32 *)((port)+_IO_BASE))
50 #define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
52 #define inw(port) in_le16((u16 *)((port)+_IO_BASE))
53 #define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
54 #define inl(port) in_le32((u32 *)((port)+_IO_BASE))
55 #define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
58 #define inb_p(port) in_8((u8 *)((port)+_IO_BASE))
59 #define outb_p(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
60 #define inw_p(port) in_le16((u16 *)((port)+_IO_BASE))
61 #define outw_p(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
62 #define inl_p(port) in_le32((u32 *)((port)+_IO_BASE))
63 #define outl_p(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
65 extern void _insb(volatile u8 *port, void *buf, int ns);
66 extern void _outsb(volatile u8 *port, const void *buf, int ns);
67 extern void _insw(volatile u16 *port, void *buf, int ns);
68 extern void _outsw(volatile u16 *port, const void *buf, int ns);
69 extern void _insl(volatile u32 *port, void *buf, int nl);
70 extern void _outsl(volatile u32 *port, const void *buf, int nl);
71 extern void _insw_ns(volatile u16 *port, void *buf, int ns);
72 extern void _outsw_ns(volatile u16 *port, const void *buf, int ns);
73 extern void _insl_ns(volatile u32 *port, void *buf, int nl);
74 extern void _outsl_ns(volatile u32 *port, const void *buf, int nl);
77 * The *_ns versions below don't do byte-swapping.
78 * Neither do the standard versions now, these are just here
81 #define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
82 #define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
83 #define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
84 #define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
87 #define IO_SPACE_LIMIT ~0
89 #define memset_io(a,b,c) memset((void *)(a),(b),(c))
90 #define memcpy_fromio(a,b,c) memcpy((a),(void *)(b),(c))
91 #define memcpy_toio(a,b,c) memcpy((void *)(a),(b),(c))
94 * Enforce In-order Execution of I/O:
95 * Acts as a barrier to ensure all previous I/O accesses have
96 * completed before any further ones are issued.
98 static inline void eieio(void)
100 __asm__ __volatile__ ("eieio" : : : "memory");
103 static inline void sync(void)
105 __asm__ __volatile__ ("sync" : : : "memory");
108 static inline void isync(void)
110 __asm__ __volatile__ ("isync" : : : "memory");
113 /* Enforce in-order execution of data I/O.
114 * No distinction between read/write on PPC; use eieio for all three.
116 #define iobarrier_rw() eieio()
117 #define iobarrier_r() eieio()
118 #define iobarrier_w() eieio()
121 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
123 * Read operations have additional twi & isync to make sure the read
124 * is actually performed (i.e. the data has come back) before we start
125 * executing any following instructions.
128 extern inline int in_8(const volatile unsigned char __iomem *addr)
132 __asm__ __volatile__(
133 "sync; lbz%U1%X1 %0,%1;\n"
135 "isync" : "=r" (ret) : "m" (*addr));
139 extern inline void out_8(volatile unsigned char __iomem *addr, int val)
141 __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
144 extern inline int in_le16(const volatile unsigned short __iomem *addr)
148 __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
150 "isync" : "=r" (ret) :
151 "r" (addr), "m" (*addr));
155 extern inline int in_be16(const volatile unsigned short __iomem *addr)
159 __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
161 "isync" : "=r" (ret) : "m" (*addr));
165 extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
167 __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
168 "r" (val), "r" (addr));
171 extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
173 __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
176 extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
180 __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
182 "isync" : "=r" (ret) :
183 "r" (addr), "m" (*addr));
187 extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
191 __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
193 "isync" : "=r" (ret) : "m" (*addr));
197 extern inline void out_le32(volatile unsigned __iomem *addr, int val)
199 __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
200 "r" (val), "r" (addr));
203 extern inline void out_be32(volatile unsigned __iomem *addr, int val)
205 __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));