6 #define SET_LAW_ENTRY(idx, a, sz, trgt) \
7 { .index = idx, .addr = a, .size = sz, .trgt_id = trgt }
9 #define SET_LAW(a, sz, trgt) \
10 { .index = -1, .addr = a, .size = sz, .trgt_id = trgt }
40 LAW_TRGT_IF_PCI = 0x00,
41 LAW_TRGT_IF_PCI_2 = 0x01,
42 #ifndef CONFIG_MPC8641
43 LAW_TRGT_IF_PCIE_1 = 0x02,
45 #ifndef CONFIG_MPC8572
46 LAW_TRGT_IF_PCIE_3 = 0x03,
48 LAW_TRGT_IF_LBC = 0x04,
49 LAW_TRGT_IF_CCSR = 0x08,
50 LAW_TRGT_IF_DDR_INTRLV = 0x0b,
51 LAW_TRGT_IF_RIO = 0x0c,
52 LAW_TRGT_IF_DDR = 0x0f,
53 LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
55 #define LAW_TRGT_IF_DDR_1 LAW_TRGT_IF_DDR
56 #define LAW_TRGT_IF_PCI_1 LAW_TRGT_IF_PCI
57 #define LAW_TRGT_IF_PCIX LAW_TRGT_IF_PCI
58 #define LAW_TRGT_IF_PCIE_2 LAW_TRGT_IF_PCI_2
61 #define LAW_TRGT_IF_PCIE_1 LAW_TRGT_IF_PCI
65 #define LAW_TRGT_IF_PCIE_3 LAW_TRGT_IF_PCI
72 enum law_trgt_if trgt_id;
75 extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
76 extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
77 extern int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
78 extern void disable_law(u8 idx);
79 extern void init_laws(void);
80 extern void print_laws(void);
82 /* define in board code */
83 extern struct law_entry law_table[];
84 extern int num_law_entries;