1 /*****************************************************************************
3 * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
4 * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
5 * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
6 * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
7 * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
8 * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
9 * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
10 * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
11 * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
12 * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
13 * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
14 * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
15 * FOR A PARTICULAR PURPOSE.
17 * (c) Copyright 2002 Xilinx Inc.
18 * All rights reserved.
20 *****************************************************************************/
21 /****************************************************************************/
26 * This header file contains identifiers and low-level driver functions (or
27 * macros) that can be used to access the device. High-level driver functions
28 * are defined in xuartlite.h.
31 * MODIFICATION HISTORY:
33 * Ver Who Date Changes
34 * ----- ---- -------- -----------------------------------------------
35 * 1.00b rpm 04/25/02 First release
38 *****************************************************************************/
40 #ifndef XUARTLITE_L_H /* prevent circular inclusions */
41 #define XUARTLITE_L_H /* by using protection macros */
43 /***************************** Include Files ********************************/
45 #include "xbasic_types.h"
48 /************************** Constant Definitions ****************************/
50 /* UART Lite register offsets */
52 #define XUL_RX_FIFO_OFFSET 0 /* receive FIFO, read only */
53 #define XUL_TX_FIFO_OFFSET 4 /* transmit FIFO, write only */
54 #define XUL_STATUS_REG_OFFSET 8 /* status register, read only */
55 #define XUL_CONTROL_REG_OFFSET 12 /* control register, write only */
57 /* control register bit positions */
59 #define XUL_CR_ENABLE_INTR 0x10 /* enable interrupt */
60 #define XUL_CR_FIFO_RX_RESET 0x02 /* reset receive FIFO */
61 #define XUL_CR_FIFO_TX_RESET 0x01 /* reset transmit FIFO */
63 /* status register bit positions */
65 #define XUL_SR_PARITY_ERROR 0x80
66 #define XUL_SR_FRAMING_ERROR 0x40
67 #define XUL_SR_OVERRUN_ERROR 0x20
68 #define XUL_SR_INTR_ENABLED 0x10 /* interrupt enabled */
69 #define XUL_SR_TX_FIFO_FULL 0x08 /* transmit FIFO full */
70 #define XUL_SR_TX_FIFO_EMPTY 0x04 /* transmit FIFO empty */
71 #define XUL_SR_RX_FIFO_FULL 0x02 /* receive FIFO full */
72 #define XUL_SR_RX_FIFO_VALID_DATA 0x01 /* data in receive FIFO */
74 /* the following constant specifies the size of the FIFOs, the size of the
75 * FIFOs includes the transmitter and receiver such that it is the total number
76 * of bytes that the UART can buffer
78 #define XUL_FIFO_SIZE 16
80 /* Stop bits are fixed at 1. Baud, parity, and data bits are fixed on a
83 #define XUL_STOP_BITS 1
87 #define XUL_PARITY_NONE 0
88 #define XUL_PARITY_ODD 1
89 #define XUL_PARITY_EVEN 2
91 /**************************** Type Definitions ******************************/
93 /***************** Macros (Inline Functions) Definitions ********************/
95 /*****************************************************************************
97 * Low-level driver macros and functions. The list below provides signatures
98 * to help the user use the macros.
100 * void XUartLite_mSetControlReg(u32 BaseAddress, u32 Mask)
101 * u32 XUartLite_mGetControlReg(u32 BaseAddress)
102 * u32 XUartLite_mGetStatusReg(u32 BaseAddress)
104 * Xboolean XUartLite_mIsReceiveEmpty(u32 BaseAddress)
105 * Xboolean XUartLite_mIsTransmitFull(u32 BaseAddress)
106 * Xboolean XUartLite_mIsIntrEnabled(u32 BaseAddress)
108 * void XUartLite_mEnableIntr(u32 BaseAddress)
109 * void XUartLite_mDisableIntr(u32 BaseAddress)
111 * void XUartLite_SendByte(u32 BaseAddress, u8 Data);
112 * u8 XUartLite_RecvByte(u32 BaseAddress);
114 *****************************************************************************/
116 /****************************************************************************/
119 * Set the contents of the control register. Use the XUL_CR_* constants defined
120 * above to create the bit-mask to be written to the register.
122 * @param BaseAddress is the base address of the device
123 * @param Mask is the 32-bit value to write to the control register
129 *****************************************************************************/
130 #define XUartLite_mSetControlReg(BaseAddress, Mask) \
131 XIo_Out32((BaseAddress) + XUL_CONTROL_REG_OFFSET, (Mask))
134 /****************************************************************************/
137 * Get the contents of the control register. Use the XUL_CR_* constants defined
138 * above to interpret the bit-mask returned.
140 * @param BaseAddress is the base address of the device
142 * @return A 32-bit value representing the contents of the control register.
146 *****************************************************************************/
147 #define XUartLite_mGetControlReg(BaseAddress) \
148 XIo_In32((BaseAddress) + XUL_CONTROL_REG_OFFSET)
151 /****************************************************************************/
154 * Get the contents of the status register. Use the XUL_SR_* constants defined
155 * above to interpret the bit-mask returned.
157 * @param BaseAddress is the base address of the device
159 * @return A 32-bit value representing the contents of the status register.
163 *****************************************************************************/
164 #define XUartLite_mGetStatusReg(BaseAddress) \
165 XIo_In32((BaseAddress) + XUL_STATUS_REG_OFFSET)
168 /****************************************************************************/
171 * Check to see if the receiver has data.
173 * @param BaseAddress is the base address of the device
175 * @return XTRUE if the receiver is empty, XFALSE if there is data present.
179 *****************************************************************************/
180 #define XUartLite_mIsReceiveEmpty(BaseAddress) \
181 (!(XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_RX_FIFO_VALID_DATA))
184 /****************************************************************************/
187 * Check to see if the transmitter is full.
189 * @param BaseAddress is the base address of the device
191 * @return XTRUE if the transmitter is full, XFALSE otherwise.
195 *****************************************************************************/
196 #define XUartLite_mIsTransmitFull(BaseAddress) \
197 (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_TX_FIFO_FULL)
200 /****************************************************************************/
203 * Check to see if the interrupt is enabled.
205 * @param BaseAddress is the base address of the device
207 * @return XTRUE if the interrupt is enabled, XFALSE otherwise.
211 *****************************************************************************/
212 #define XUartLite_mIsIntrEnabled(BaseAddress) \
213 (XUartLite_mGetStatusReg((BaseAddress)) & XUL_SR_INTR_ENABLED)
216 /****************************************************************************/
219 * Enable the device interrupt. Preserve the contents of the control register.
221 * @param BaseAddress is the base address of the device
227 *****************************************************************************/
228 #define XUartLite_mEnableIntr(BaseAddress) \
229 XUartLite_mSetControlReg((BaseAddress), \
230 XUartLite_mGetControlReg((BaseAddress)) | XUL_CR_ENABLE_INTR)
233 /****************************************************************************/
236 * Disable the device interrupt. Preserve the contents of the control register.
238 * @param BaseAddress is the base address of the device
244 *****************************************************************************/
245 #define XUartLite_mDisableIntr(BaseAddress) \
246 XUartLite_mSetControlReg((BaseAddress), \
247 XUartLite_mGetControlReg((BaseAddress)) & ~XUL_CR_ENABLE_INTR)
250 /************************** Function Prototypes *****************************/
252 void XUartLite_SendByte(u32 BaseAddress, u8 Data);
253 u8 XUartLite_RecvByte(u32 BaseAddress);
256 #endif /* end of protection macro */