Add AT32AP CPU and AT32AP7000 SoC support
[oweals/u-boot.git] / include / asm-avr32 / arch-at32ap7000 / memory-map.h
1 /*
2  * Copyright (C) 2005-2006 Atmel Corporation
3  *
4  * See file CREDITS for list of people who contributed to this
5  * project.
6  *
7  * This program is free software; you can redistribute it and/or
8  * modify it under the terms of the GNU General Public License as
9  * published by the Free Software Foundation; either version 2 of
10  * the License, or (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20  * MA 02111-1307 USA
21  */
22 #ifndef __ASM_AVR32_PART_MEMORY_MAP_H__
23 #define __ASM_AVR32_PART_MEMORY_MAP_H__
24
25 #define AUDIOC_BASE                             0xFFF02800
26 #define DAC_BASE                                0xFFF02000
27 #define DMAC_BASE                               0xFF200000
28 #define ECC_BASE                                0xFFF03C00
29 #define HISI_BASE                               0xFFF02C00
30 #define HMATRIX_BASE                            0xFFF00800
31 #define HSDRAMC_BASE                            0xFFF03800
32 #define HSMC_BASE                               0xFFF03400
33 #define LCDC_BASE                               0xFF000000
34 #define MACB0_BASE                              0xFFF01800
35 #define MACB1_BASE                              0xFFF01C00
36 #define MMCI_BASE                               0xFFF02400
37 #define PIOA_BASE                               0xFFE02800
38 #define PIOB_BASE                               0xFFE02C00
39 #define PIOC_BASE                               0xFFE03000
40 #define PIOD_BASE                               0xFFE03400
41 #define PIOE_BASE                               0xFFE03800
42 #define PSIF_BASE                               0xFFE03C00
43 #define PWM_BASE                                0xFFF01400
44 #define SM_BASE                                 0xFFF00000
45 #define INTC_BASE                               0XFFF00400
46 #define SPI0_BASE                               0xFFE00000
47 #define SPI1_BASE                               0xFFE00400
48 #define SSC0_BASE                               0xFFE01C00
49 #define SSC1_BASE                               0xFFE02000
50 #define SSC2_BASE                               0xFFE02400
51 #define TIMER0_BASE                             0xFFF00C00
52 #define TIMER1_BASE                             0xFFF01000
53 #define TWI_BASE                                0xFFE00800
54 #define USART0_BASE                             0xFFE00C00
55 #define USART1_BASE                             0xFFE01000
56 #define USART2_BASE                             0xFFE01400
57 #define USART3_BASE                             0xFFE01800
58 #define USB_FIFO                                0xFF300000
59 #define USB_BASE                                0xFFF03000
60
61 #endif /* __ASM_AVR32_PART_MEMORY_MAP_H__ */