1 /* Configuration header file for Gaisler Research AB's Template
2 * design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
3 * Development board Stratix II edition, with the FPGA device
6 * (C) Copyright 2003-2005
7 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
10 * Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
12 * SPDX-License-Identifier: GPL-2.0+
19 * High Level Configuration Options
23 /* Altera NIOS Development board, Stratix II board */
24 #define CONFIG_GR_EP2S60 1
26 /* CPU / AMBA BUS configuration */
27 #define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
29 /* Number of SPARC register windows */
30 #define CONFIG_SYS_SPARC_NWINDOWS 8
32 /* Define this is the GR-2S60-MEZZ mezzanine is available and you
33 * want to use the USB and GRETH functionality of the board
43 * Serial console configuration
45 #define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
46 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
49 #define CONFIG_DOS_PARTITION
50 #define CONFIG_MAC_PARTITION
51 #define CONFIG_ISO_PARTITION
56 #define CONFIG_CMD_REGINFO
57 #define CONFIG_CMD_PING
58 #define CONFIG_CMD_DIAG
59 #define CONFIG_CMD_IRQ
63 #define CONFIG_USB_UHCI
64 #define CONFIG_CMD_FAT
65 #define CONFIG_CMD_EXT2
66 #define CONFIG_CMD_USB
67 #define CONFIG_USB_STORAGE
68 /* Enable needed helper functions */
69 #define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
75 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
77 #define CONFIG_PREBOOT "echo;" \
78 "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
81 #undef CONFIG_BOOTARGS
83 #define CONFIG_EXTRA_ENV_SETTINGS \
85 "nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
86 "nfsroot=${serverip}:${rootpath}\0" \
87 "ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
88 "addip=setenv bootargs ${bootargs} " \
89 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
90 ":${hostname}:${netdev}:off panic=1\0" \
91 "flash_nfs=run nfsargs addip;" \
92 "bootm ${kernel_addr}\0" \
93 "flash_self=run ramargs addip;" \
94 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
95 "net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
96 "scratch=40800000\0" \
97 "getkernel=tftpboot $(scratch) $(bootfile)\0" \
98 "bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
101 #define CONFIG_NETMASK 255.255.255.0
102 #define CONFIG_GATEWAYIP 192.168.0.1
103 #define CONFIG_SERVERIP 192.168.0.20
104 #define CONFIG_IPADDR 192.168.0.207
105 #define CONFIG_ROOTPATH "/export/rootfs"
106 #define CONFIG_HOSTNAME ml401
107 #define CONFIG_BOOTFILE "/uImage"
109 #define CONFIG_BOOTCOMMAND "run flash_self"
114 * |--------------------------------|
115 * | 0x00000000 Text & Data & BSS | *
117 * | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
118 * | UNUSED / Growth | * 256kb
119 * |--------------------------------|
120 * | 0x00050000 Base custom area | *
122 * | | * Rest of Flash
123 * |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
124 * | END-0x00008000 Environment | * 32kb
125 * |--------------------------------|
130 * |--------------------------------|
131 * | UNUSED / scratch area |
136 * |--------------------------------|
137 * | Monitor .Text / .DATA / .BSS | * 512kb
139 * |--------------------------------|
140 * | Monitor Malloc | * 128kb (contains relocated environment)
141 * |--------------------------------|
142 * | Monitor/kernel STACK | * 64kb
143 * |--------------------------------|
144 * | Page Table for MMU systems | * 2k
145 * |--------------------------------|
146 * | PROM Code accessed from Linux | * 6kb-128b
147 * |--------------------------------|
148 * | Global data (avail from kernel)| * 128b
149 * |--------------------------------|
154 * Flash configuration (8,16 or 32 MB)
155 * TEXT base always at 0xFFF00000
156 * ENV_ADDR always at 0xFFF40000
157 * FLASH_BASE at 0xFC000000 for 64 MB
158 * 0xFE000000 for 32 MB
159 * 0xFF000000 for 16 MB
160 * 0xFF800000 for 8 MB
162 /*#define CONFIG_SYS_NO_FLASH 1*/
163 #define CONFIG_SYS_FLASH_BASE 0x00000000
164 #define CONFIG_SYS_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
166 #define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
167 #define CONFIG_SYS_MAX_FLASH_SECT 256 /* max num of sects on one chip */
168 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of memory banks */
170 #define CONFIG_SYS_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
171 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
172 #define CONFIG_SYS_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
173 #define CONFIG_SYS_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
174 #define CONFIG_SYS_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
177 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
178 #define CONFIG_FLASH_CFI_DRIVER
179 #define CONFIG_SYS_FLASH_CFI
180 /* Bypass cache when reading regs from flash memory */
181 #define CONFIG_SYS_FLASH_CFI_BYPASS_READ
182 /* Buffered writes (32byte/go) instead of single accesses */
183 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
186 * Environment settings
188 /*#define CONFIG_ENV_IS_NOWHERE 1*/
189 #define CONFIG_ENV_IS_IN_FLASH 1
190 /* CONFIG_ENV_ADDR need to be at sector boundary */
191 #define CONFIG_ENV_SIZE 0x8000
192 #define CONFIG_ENV_SECT_SIZE 0x20000
193 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE+CONFIG_SYS_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
194 #define CONFIG_ENV_OVERWRITE 1
199 #define CONFIG_SYS_SDRAM_BASE 0x40000000
200 #define CONFIG_SYS_SDRAM_SIZE 0x02000000
201 #define CONFIG_SYS_SDRAM_END (CONFIG_SYS_SDRAM_BASE+CONFIG_SYS_SDRAM_SIZE)
203 /* no SRAM available */
204 #undef CONFIG_SYS_SRAM_BASE
205 #undef CONFIG_SYS_SRAM_SIZE
207 #define CONFIG_SYS_RAM_BASE CONFIG_SYS_SDRAM_BASE
208 #define CONFIG_SYS_RAM_SIZE CONFIG_SYS_SDRAM_SIZE
209 #define CONFIG_SYS_RAM_END CONFIG_SYS_SDRAM_END
211 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_SDRAM_END - GENERATED_GBL_DATA_SIZE)
213 #define CONFIG_SYS_PROM_SIZE (8192-GENERATED_GBL_DATA_SIZE)
214 #define CONFIG_SYS_PROM_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET-CONFIG_SYS_PROM_SIZE)
216 #define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_PROM_OFFSET-32)
217 #define CONFIG_SYS_STACK_SIZE (0x10000-32)
219 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
220 #if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
221 # define CONFIG_SYS_RAMBOOT 1
224 #define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
225 #define CONFIG_SYS_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
226 #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
228 #define CONFIG_SYS_MALLOC_END (CONFIG_SYS_INIT_SP_OFFSET-CONFIG_SYS_STACK_SIZE)
229 #define CONFIG_SYS_MALLOC_BASE (CONFIG_SYS_MALLOC_END-CONFIG_SYS_MALLOC_LEN)
231 /* relocated monitor area */
232 #define CONFIG_SYS_RELOC_MONITOR_MAX_END CONFIG_SYS_MALLOC_BASE
233 #define CONFIG_SYS_RELOC_MONITOR_BASE (CONFIG_SYS_RELOC_MONITOR_MAX_END-CONFIG_SYS_MONITOR_LEN)
235 /* make un relocated address from relocated address */
236 #define UN_RELOC(address) (address-(CONFIG_SYS_RELOC_MONITOR_BASE-CONFIG_SYS_TEXT_BASE))
239 * Ethernet configuration uses on board SMC91C111, however if a mezzanine
240 * with a PHY is attached the GRETH can be used on this board.
241 * Define USE_GRETH in order to use the mezzanine provided PHY with the
242 * onchip GRETH network MAC, note that this is not supported by the
247 /* USE SMC91C111 MAC */
248 #define CONFIG_SMC91111 1
249 #define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
250 #define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
251 #undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
252 /*#define CONFIG_SHOW_ACTIVITY*/
253 #define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
257 /* USE GRETH Ethernet Driver */
258 #define CONFIG_GRETH 1
261 #define CONFIG_PHY_ADDR 0x00
264 * Miscellaneous configurable options
266 #define CONFIG_SYS_LONGHELP /* undef to save memory */
267 #if defined(CONFIG_CMD_KGDB)
268 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
270 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
272 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
273 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
274 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
276 #define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
277 #define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
279 #define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
281 /*-----------------------------------------------------------------------
283 *-----------------------------------------------------------------------
285 #define CONFIG_USB_CLOCK 0x0001BBBB
286 #define CONFIG_USB_CONFIG 0x00005000
288 /***** Gaisler GRLIB IP-Cores Config ********/
290 #define CONFIG_SYS_GRLIB_SDRAM 0
292 /* No SDRAM Configuration */
293 #undef CONFIG_SYS_GRLIB_GAISLER_SDCTRL1
295 /* See, GRLIB Docs (grip.pdf) on how to set up
296 * These the memory controller registers.
298 #define CONFIG_SYS_GRLIB_ESA_MCTRL1
299 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG1 (0x10f800ff | (1<<11))
300 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG2 0x00000000
301 #define CONFIG_SYS_GRLIB_ESA_MCTRL1_CFG3 0x00000000
303 /* GRLIB FT-MCTRL configuration */
304 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1
305 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG1 (0x10f800ff | (1<<11))
306 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG2 0x00000000
307 #define CONFIG_SYS_GRLIB_GAISLER_FTMCTRL1_CFG3 0x00000000
310 #define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1
311 #define CONFIG_SYS_GRLIB_GAISLER_DDRSPA1_CTRL 0xa900830a
313 /* no DDR2 Controller */
314 #undef CONFIG_SYS_GRLIB_GAISLER_DDR2SPA1
316 /* Identification string */
317 #define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
319 /* default kernel command line */
320 #define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
322 #endif /* __CONFIG_H */