3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
7 * The test exercises SDRAM accesses in burst mode
15 #include <asm/processor.h>
20 #include "test_burst.h"
22 /* 8 MB test region of physical RAM */
23 #define TEST_PADDR 0x00800000
24 /* The uncached virtual region */
25 #define TEST_VADDR_NC 0x00800000
26 /* The cached virtual region */
27 #define TEST_VADDR_C 0x01000000
28 /* When an error is detected, the address where the error has been found,
29 and also the current and the expected data will be written to
30 the following flash address
32 #define TEST_FLASH_ADDR 0x40100000
34 static void test_prepare (void);
35 static int test_burst_start (unsigned long size, unsigned long pattern);
36 static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached);
37 static int test_mmu_is_on(void);
38 static void test_desc(unsigned long size);
39 static void test_error(char * step, volatile void * addr, unsigned long val, unsigned long pattern);
40 static void signal_init(void);
41 static void signal_start(void);
42 static void signal_error(void);
43 static void test_usage(void);
45 static unsigned long test_pattern [] = {
53 int test_burst (int argc, char * const argv[])
55 unsigned long size = CACHE_LINE_SIZE;
56 unsigned int pass = 0;
62 for (size = 0, d = argv[1]; *d >= '0' && *d <= '9'; d++) {
66 if (size == 0 || *d) {
70 for (d = argv[2]; *d >= '0' && *d <= '9'; d++) {
78 } else if (argc > 3) {
83 size += (CACHE_LINE_SIZE - 1);
84 size &= ~(CACHE_LINE_SIZE - 1);
86 if (!test_mmu_is_on()) {
92 for (j = 0; !pass || j < pass; j++) {
93 for (i = 0; i < sizeof(test_pattern) / sizeof(test_pattern[0]);
95 res = test_burst_start(size, test_pattern[i]);
101 printf ("Iteration #%d passed\n", j + 1);
103 if (tstc() && 0x03 == getc())
110 static void test_prepare (void)
115 disable_interrupts();
118 printf ("Interrupts are disabled\n");
119 printf ("I-Cache is ON\n");
120 printf ("D-Cache is ON\n");
121 printf ("MMU is ON\n");
125 test_map_8M (TEST_PADDR, TEST_VADDR_NC, 0);
126 test_map_8M (TEST_PADDR, TEST_VADDR_C, 1);
128 test_map_8M (TEST_FLASH_ADDR & 0xFF800000, TEST_FLASH_ADDR & 0xFF800000, 0);
130 /* Configure GPIO ports */
134 static int test_burst_start (unsigned long size, unsigned long pattern)
136 volatile unsigned long * vaddr_c = (unsigned long *)TEST_VADDR_C;
137 volatile unsigned long * vaddr_nc = (unsigned long *)TEST_VADDR_NC;
141 printf ("Test pattern %08lx ...", pattern);
145 for (i = 0; i < n; i ++) {
146 vaddr_c [i] = pattern;
149 flush_dcache_range((unsigned long)vaddr_c, (unsigned long)(vaddr_c + n) - 1);
151 for (i = 0; i < n; i ++) {
152 register unsigned long tmp = vaddr_nc [i];
153 if (tmp != pattern) {
154 test_error("2a", vaddr_nc + i, tmp, pattern);
159 for (i = 0; i < n; i ++) {
160 register unsigned long tmp = vaddr_c [i];
161 if (tmp != pattern) {
162 test_error("2b", vaddr_c + i, tmp, pattern);
167 for (i = 0; i < n; i ++) {
168 vaddr_nc [i] = pattern;
171 for (i = 0; i < n; i ++) {
172 register unsigned long tmp = vaddr_nc [i];
173 if (tmp != pattern) {
174 test_error("3a", vaddr_nc + i, tmp, pattern);
180 for (i = 0; i < n; i ++) {
181 register unsigned long tmp = vaddr_c [i];
182 if (tmp != pattern) {
183 test_error("3b", vaddr_c + i, tmp, pattern);
190 printf(" %s\n", res == 0 ? "OK" : "");
195 static void test_map_8M (unsigned long paddr, unsigned long vaddr, int cached)
197 mtspr (MD_EPN, (vaddr & 0xFFFFFC00) | MI_EVALID);
198 mtspr (MD_TWC, MI_PS8MEG | MI_SVALID);
199 mtspr (MD_RPN, (paddr & 0xFFFFF000) | MI_BOOTINIT | (cached ? 0 : 2));
200 mtspr (MD_AP, MI_Kp);
203 static int test_mmu_is_on(void)
207 asm volatile("mfmsr %0" : "=r" (msr) :);
212 static void test_desc(unsigned long size)
215 "The following tests will be conducted:\n"
216 "1) Map %ld-byte region of physical RAM at 0x%08x\n"
217 " into two virtual regions:\n"
218 " one cached at 0x%08x and\n"
219 " the the other uncached at 0x%08x.\n",
220 size, TEST_PADDR, TEST_VADDR_NC, TEST_VADDR_C);
223 "2) Fill the cached region with a pattern, and flush the cache\n"
224 "2a) Check the uncached region to match the pattern\n"
225 "2b) Check the cached region to match the pattern\n"
226 "3) Fill the uncached region with a pattern\n"
227 "3a) Check the cached region to match the pattern\n"
228 "3b) Check the uncached region to match the pattern\n"
229 "2b) Change the patterns and go to step 2\n"
234 static void test_error(
235 char * step, volatile void * addr, unsigned long val, unsigned long pattern)
237 volatile unsigned long * p = (void *)TEST_FLASH_ADDR;
241 p[0] = (unsigned long)addr;
245 printf ("\nError at step %s, addr %08lx: read %08lx, pattern %08lx",
246 step, (unsigned long)addr, val, pattern);
249 static void signal_init(void)
251 #if defined(GPIO1_INIT)
254 #if defined(GPIO2_INIT)
259 static void signal_start(void)
261 #if defined(GPIO1_INIT)
262 if (GPIO1_DAT & GPIO1_BIT) {
263 GPIO1_DAT &= ~GPIO1_BIT;
265 GPIO1_DAT |= GPIO1_BIT;
270 static void signal_error(void)
272 #if defined(GPIO2_INIT)
273 if (GPIO2_DAT & GPIO2_BIT) {
274 GPIO2_DAT &= ~GPIO2_BIT;
276 GPIO2_DAT |= GPIO2_BIT;
281 static void test_usage(void)
283 printf("Usage: go 0x40004 [size] [count]\n");