2 * watchdog.c - driver for i.mx on-chip watchdog
4 * Licensed under the GPL-2 or later.
13 #include <asm/arch/imx-regs.h>
14 #ifdef CONFIG_FSL_LSCH2
15 #include <asm/arch/immap_lsch2.h>
19 static void imx_watchdog_expire_now(struct watchdog_regs *wdog, bool ext_reset)
24 wcr |= WCR_SRS; /* do not assert internal reset */
26 wcr |= WCR_WDA; /* do not assert external reset */
28 /* Write 3 times to ensure it works, due to IMX6Q errata ERR004346 */
29 writew(wcr, &wdog->wcr);
30 writew(wcr, &wdog->wcr);
31 writew(wcr, &wdog->wcr);
40 #if !defined(CONFIG_IMX_WATCHDOG) || \
41 (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
42 void __attribute__((weak)) reset_cpu(ulong addr)
44 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
46 imx_watchdog_expire_now(wdog, true);
50 #if defined(CONFIG_IMX_WATCHDOG)
51 static void imx_watchdog_reset(struct watchdog_regs *wdog)
53 #ifndef CONFIG_WATCHDOG_RESET_DISABLE
54 writew(0x5555, &wdog->wsr);
55 writew(0xaaaa, &wdog->wsr);
56 #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
59 static void imx_watchdog_init(struct watchdog_regs *wdog, bool ext_reset)
65 * The timer watchdog can be set between
66 * 0.5 and 128 Seconds. If not defined
67 * in configuration file, sets 128 Seconds
69 #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
70 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
72 timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
73 #ifdef CONFIG_FSL_LSCH2
74 wcr = (WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout;
76 wcr = WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_SRS |
77 WCR_WDA | SET_WCR_WT(timeout);
80 #endif /* CONFIG_FSL_LSCH2*/
81 writew(wcr, &wdog->wcr);
82 imx_watchdog_reset(wdog);
85 #if !CONFIG_IS_ENABLED(WDT)
86 void hw_watchdog_reset(void)
88 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
90 imx_watchdog_reset(wdog);
93 void hw_watchdog_init(void)
95 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
97 imx_watchdog_init(wdog, true);
100 struct imx_wdt_priv {
105 static int imx_wdt_reset(struct udevice *dev)
107 struct imx_wdt_priv *priv = dev_get_priv(dev);
109 imx_watchdog_reset(priv->base);
114 static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
116 struct imx_wdt_priv *priv = dev_get_priv(dev);
118 imx_watchdog_expire_now(priv->base, priv->ext_reset);
124 static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
126 struct imx_wdt_priv *priv = dev_get_priv(dev);
128 imx_watchdog_init(priv->base, priv->ext_reset);
133 static int imx_wdt_probe(struct udevice *dev)
135 struct imx_wdt_priv *priv = dev_get_priv(dev);
137 priv->base = dev_read_addr_ptr(dev);
141 priv->ext_reset = dev_read_bool(dev, "fsl,ext-reset-output");
146 static const struct wdt_ops imx_wdt_ops = {
147 .start = imx_wdt_start,
148 .reset = imx_wdt_reset,
149 .expire_now = imx_wdt_expire_now,
152 static const struct udevice_id imx_wdt_ids[] = {
153 { .compatible = "fsl,imx21-wdt" },
157 U_BOOT_DRIVER(imx_wdt) = {
160 .of_match = imx_wdt_ids,
161 .probe = imx_wdt_probe,
163 .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
164 .flags = DM_FLAG_PRE_RELOC,