2 * watchdog.c - driver for i.mx on-chip watchdog
4 * Licensed under the GPL-2 or later.
12 #include <asm/arch/imx-regs.h>
13 #ifdef CONFIG_FSL_LSCH2
14 #include <asm/arch/immap_lsch2.h>
18 static void imx_watchdog_expire_now(struct watchdog_regs *wdog)
20 clrsetbits_le16(&wdog->wcr, WCR_WT_MSK, WCR_WDE);
22 writew(0x5555, &wdog->wsr);
23 writew(0xaaaa, &wdog->wsr); /* load minimum 1/2 second timeout */
26 * spin for .5 seconds before reset
31 #if !defined(CONFIG_IMX_WATCHDOG) || \
32 (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
33 void __attribute__((weak)) reset_cpu(ulong addr)
35 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
37 imx_watchdog_expire_now(wdog);
41 #if defined(CONFIG_IMX_WATCHDOG)
42 static void imx_watchdog_reset(struct watchdog_regs *wdog)
44 #ifndef CONFIG_WATCHDOG_RESET_DISABLE
45 writew(0x5555, &wdog->wsr);
46 writew(0xaaaa, &wdog->wsr);
47 #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
50 static void imx_watchdog_init(struct watchdog_regs *wdog)
55 * The timer watchdog can be set between
56 * 0.5 and 128 Seconds. If not defined
57 * in configuration file, sets 128 Seconds
59 #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
60 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
62 timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
63 #ifdef CONFIG_FSL_LSCH2
64 writew((WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout, &wdog->wcr);
66 writew(WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_WDT | WCR_SRS |
67 WCR_WDA | SET_WCR_WT(timeout), &wdog->wcr);
68 #endif /* CONFIG_FSL_LSCH2*/
69 imx_watchdog_reset(wdog);
72 #if !CONFIG_IS_ENABLED(WDT)
73 void hw_watchdog_reset(void)
75 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
77 imx_watchdog_reset(wdog);
80 void hw_watchdog_init(void)
82 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
84 imx_watchdog_init(wdog);
91 static int imx_wdt_reset(struct udevice *dev)
93 struct imx_wdt_priv *priv = dev_get_priv(dev);
95 imx_watchdog_reset(priv->base);
100 static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
102 struct imx_wdt_priv *priv = dev_get_priv(dev);
104 imx_watchdog_expire_now(priv->base);
110 static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
112 struct imx_wdt_priv *priv = dev_get_priv(dev);
114 imx_watchdog_init(priv->base);
119 static int imx_wdt_probe(struct udevice *dev)
121 struct imx_wdt_priv *priv = dev_get_priv(dev);
123 priv->base = dev_read_addr_ptr(dev);
130 static const struct wdt_ops imx_wdt_ops = {
131 .start = imx_wdt_start,
132 .reset = imx_wdt_reset,
133 .expire_now = imx_wdt_expire_now,
136 static const struct udevice_id imx_wdt_ids[] = {
137 { .compatible = "fsl,imx21-wdt" },
141 U_BOOT_DRIVER(imx_wdt) = {
144 .of_match = imx_wdt_ids,
145 .probe = imx_wdt_probe,
147 .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
148 .flags = DM_FLAG_PRE_RELOC,