2 * watchdog.c - driver for i.mx on-chip watchdog
4 * Licensed under the GPL-2 or later.
14 #include <asm/arch/imx-regs.h>
15 #ifdef CONFIG_FSL_LSCH2
16 #include <asm/arch/immap_lsch2.h>
20 static void imx_watchdog_expire_now(struct watchdog_regs *wdog, bool ext_reset)
25 wcr |= WCR_SRS; /* do not assert internal reset */
27 wcr |= WCR_WDA; /* do not assert external reset */
29 /* Write 3 times to ensure it works, due to IMX6Q errata ERR004346 */
30 writew(wcr, &wdog->wcr);
31 writew(wcr, &wdog->wcr);
32 writew(wcr, &wdog->wcr);
41 #if !defined(CONFIG_IMX_WATCHDOG) || \
42 (defined(CONFIG_IMX_WATCHDOG) && !CONFIG_IS_ENABLED(WDT))
43 void __attribute__((weak)) reset_cpu(ulong addr)
45 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
47 imx_watchdog_expire_now(wdog, true);
51 #if defined(CONFIG_IMX_WATCHDOG)
52 static void imx_watchdog_reset(struct watchdog_regs *wdog)
54 #ifndef CONFIG_WATCHDOG_RESET_DISABLE
55 writew(0x5555, &wdog->wsr);
56 writew(0xaaaa, &wdog->wsr);
57 #endif /* CONFIG_WATCHDOG_RESET_DISABLE*/
60 static void imx_watchdog_init(struct watchdog_regs *wdog, bool ext_reset)
66 * The timer watchdog can be set between
67 * 0.5 and 128 Seconds. If not defined
68 * in configuration file, sets 128 Seconds
70 #ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS
71 #define CONFIG_WATCHDOG_TIMEOUT_MSECS 128000
73 timeout = (CONFIG_WATCHDOG_TIMEOUT_MSECS / 500) - 1;
74 #ifdef CONFIG_FSL_LSCH2
75 wcr = (WCR_WDA | WCR_SRS | WCR_WDE) << 8 | timeout;
77 wcr = WCR_WDZST | WCR_WDBG | WCR_WDE | WCR_SRS |
78 WCR_WDA | SET_WCR_WT(timeout);
81 #endif /* CONFIG_FSL_LSCH2*/
82 writew(wcr, &wdog->wcr);
83 imx_watchdog_reset(wdog);
86 #if !CONFIG_IS_ENABLED(WDT)
87 void hw_watchdog_reset(void)
89 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
91 imx_watchdog_reset(wdog);
94 void hw_watchdog_init(void)
96 struct watchdog_regs *wdog = (struct watchdog_regs *)WDOG1_BASE_ADDR;
98 imx_watchdog_init(wdog, true);
101 struct imx_wdt_priv {
106 static int imx_wdt_reset(struct udevice *dev)
108 struct imx_wdt_priv *priv = dev_get_priv(dev);
110 imx_watchdog_reset(priv->base);
115 static int imx_wdt_expire_now(struct udevice *dev, ulong flags)
117 struct imx_wdt_priv *priv = dev_get_priv(dev);
119 imx_watchdog_expire_now(priv->base, priv->ext_reset);
125 static int imx_wdt_start(struct udevice *dev, u64 timeout, ulong flags)
127 struct imx_wdt_priv *priv = dev_get_priv(dev);
129 imx_watchdog_init(priv->base, priv->ext_reset);
134 static int imx_wdt_probe(struct udevice *dev)
136 struct imx_wdt_priv *priv = dev_get_priv(dev);
138 priv->base = dev_read_addr_ptr(dev);
142 priv->ext_reset = dev_read_bool(dev, "fsl,ext-reset-output");
147 static const struct wdt_ops imx_wdt_ops = {
148 .start = imx_wdt_start,
149 .reset = imx_wdt_reset,
150 .expire_now = imx_wdt_expire_now,
153 static const struct udevice_id imx_wdt_ids[] = {
154 { .compatible = "fsl,imx21-wdt" },
158 U_BOOT_DRIVER(imx_wdt) = {
161 .of_match = imx_wdt_ids,
162 .probe = imx_wdt_probe,
164 .priv_auto_alloc_size = sizeof(struct imx_wdt_priv),
165 .flags = DM_FLAG_PRE_RELOC,