3 * Stäubli Faverges - <www.staubli.com>
4 * Pierre AUBERT p.aubert@staubli.com
7 * Martin Krause TQ-Systems GmbH martin.krause@tqs.de
9 * See file CREDITS for list of people who contributed to this
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 * Basic video support for SMI SM501 "Voyager" graphic controller
38 #define read8(ptrReg) \
39 *(volatile unsigned char *)(sm501.isaBase + ptrReg)
41 #define write8(ptrReg,value) \
42 *(volatile unsigned char *)(sm501.isaBase + ptrReg) = value
44 #define read16(ptrReg) \
45 (*(volatile unsigned short *)(sm501.isaBase + ptrReg))
47 #define write16(ptrReg,value) \
48 (*(volatile unsigned short *)(sm501.isaBase + ptrReg) = value)
50 #define read32(ptrReg) \
51 (*(volatile unsigned int *)(sm501.isaBase + ptrReg))
53 #define write32(ptrReg, value) \
54 (*(volatile unsigned int *)(sm501.isaBase + ptrReg) = value)
58 void write_be32(int off, unsigned int val)
60 out_be32((unsigned __iomem *)(sm501.isaBase + off), val);
63 void write_le32(int off, unsigned int val)
65 out_le32((unsigned __iomem *)(sm501.isaBase + off), val);
68 void (*write_reg32)(int off, unsigned int val) = write_be32;
70 /*-----------------------------------------------------------------------------
72 *-----------------------------------------------------------------------------
74 static void SmiSetRegs (void)
77 * The content of the chipset register depends on the board (clocks,
80 const SMI_REGS *preg = board_get_regs ();
82 write_reg32 (preg->Index, preg->Value);
84 * Insert a delay between
91 #ifdef CONFIG_VIDEO_SM501_PCI
92 static struct pci_device_id sm501_pci_tbl[] = {
93 { PCI_VENDOR_ID_SMI, PCI_DEVICE_ID_SMI_501 },
99 * We do not enforce board code to provide empty/unused
100 * functions for this driver and define weak default
103 unsigned int __board_video_init (void)
108 unsigned int board_video_init (void)
109 __attribute__((weak, alias("__board_video_init")));
111 unsigned int __board_video_get_fb (void)
116 unsigned int board_video_get_fb (void)
117 __attribute__((weak, alias("__board_video_get_fb")));
119 void __board_validate_screen (unsigned int base)
123 void board_validate_screen (unsigned int base)
124 __attribute__((weak, alias("__board_validate_screen")));
126 /*-----------------------------------------------------------------------------
128 *-----------------------------------------------------------------------------
130 void *video_hw_init (void)
132 #ifdef CONFIG_VIDEO_SM501_PCI
133 unsigned int pci_mem_base, pci_mmio_base;
135 unsigned short device_id;
141 memset (&sm501, 0, sizeof (GraphicDevice));
143 #ifdef CONFIG_VIDEO_SM501_PCI
146 /* Look for SM501/SM502 chips */
147 devbusfn = pci_find_devices(sm501_pci_tbl, 0);
149 printf ("PCI Controller not found.\n");
154 pci_write_config_dword (devbusfn, PCI_COMMAND,
155 (PCI_COMMAND_MEMORY | PCI_COMMAND_IO));
156 pci_read_config_word (devbusfn, PCI_DEVICE_ID, &device_id);
157 pci_read_config_dword (devbusfn, PCI_REVISION_ID, &id);
158 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0, &pci_mem_base);
159 pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_1, &pci_mmio_base);
160 sm501.frameAdrs = pci_mem_to_phys (devbusfn, pci_mem_base);
161 sm501.isaBase = pci_mem_to_phys (devbusfn, pci_mmio_base);
164 write_reg32 = write_le32;
166 mem = in_le32 ((unsigned __iomem *)(sm501.isaBase + 0x10));
167 mem = (mem & 0x0000e000) >> 13;
188 printf ("PCI SM50%d %d MB\n", ((id & 0xff) == 0xC0) ? 2 : 1, mem);
192 * Initialization of the access to the graphic chipset Retreive base
193 * address of the chipset (see board/RPXClassic/eccx.c)
195 if (!sm501.isaBase) {
196 sm501.isaBase = board_video_init ();
201 if (!sm501.frameAdrs) {
202 sm501.frameAdrs = board_video_get_fb ();
203 if (!sm501.frameAdrs)
207 sm501.winSizeX = board_get_width ();
208 sm501.winSizeY = board_get_height ();
210 #if defined(CONFIG_VIDEO_SM501_8BPP)
211 sm501.gdfIndex = GDF__8BIT_INDEX;
212 sm501.gdfBytesPP = 1;
214 #elif defined(CONFIG_VIDEO_SM501_16BPP)
215 sm501.gdfIndex = GDF_16BIT_565RGB;
216 sm501.gdfBytesPP = 2;
218 #elif defined(CONFIG_VIDEO_SM501_32BPP)
219 sm501.gdfIndex = GDF_32BIT_X888RGB;
220 sm501.gdfBytesPP = 4;
222 #error Unsupported SM501 BPP
225 sm501.memSize = sm501.winSizeX * sm501.winSizeY * sm501.gdfBytesPP;
227 /* Load Smi registers */
230 /* (see board/RPXClassic/RPXClassic.c) */
231 board_validate_screen (sm501.isaBase);
233 /* Clear video memory */
235 vm = (unsigned int *)sm501.frameAdrs;