2 * Copyright (C) 2012 Samsung Electronics
4 * Author: Donghwa Lee <dh09.lee@samsung.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #include <asm/arch/mipi_dsim.h>
25 #include "exynos_mipi_dsi_lowlevel.h"
26 #include "exynos_mipi_dsi_common.h"
28 static void s6e8ax0_panel_cond(struct mipi_dsim_device *dsim_dev)
30 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
31 int reverse = dsim_dev->dsim_lcd_dev->reverse_panel;
32 const unsigned char data_to_send[] = {
33 0xf8, 0x3d, 0x35, 0x00, 0x00, 0x00, 0x8d, 0x00, 0x4c,
34 0x6e, 0x10, 0x27, 0x7d, 0x3f, 0x10, 0x00, 0x00, 0x20,
35 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
36 0x23, 0x23, 0xc0, 0xc8, 0x08, 0x48, 0xc1, 0x00, 0xc3,
40 const unsigned char data_to_send_reverse[] = {
41 0xf8, 0x19, 0x35, 0x00, 0x00, 0x00, 0x93, 0x00, 0x3c,
42 0x7d, 0x08, 0x27, 0x7d, 0x3f, 0x00, 0x00, 0x00, 0x20,
43 0x04, 0x08, 0x6e, 0x00, 0x00, 0x00, 0x02, 0x08, 0x08,
44 0x23, 0x23, 0xc0, 0xc1, 0x01, 0x41, 0xc1, 0x00, 0xc1,
49 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
50 (unsigned int)data_to_send_reverse,
51 ARRAY_SIZE(data_to_send_reverse));
53 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
54 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
58 static void s6e8ax0_display_cond(struct mipi_dsim_device *dsim_dev)
60 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
61 const unsigned char data_to_send[] = {
62 0xf2, 0x80, 0x03, 0x0d
65 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
66 (unsigned int)data_to_send,
67 ARRAY_SIZE(data_to_send));
70 static void s6e8ax0_gamma_cond(struct mipi_dsim_device *dsim_dev)
72 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
73 /* 7500K 2.2 Set : 30cd */
74 const unsigned char data_to_send[] = {
75 0xfa, 0x01, 0x60, 0x10, 0x60, 0xf5, 0x00, 0xff, 0xad,
76 0xaf, 0xba, 0xc3, 0xd8, 0xc5, 0x9f, 0xc6, 0x9e, 0xc1,
77 0xdc, 0xc0, 0x00, 0x61, 0x00, 0x5a, 0x00, 0x74,
80 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
81 (unsigned int)data_to_send,
82 ARRAY_SIZE(data_to_send));
85 static void s6e8ax0_gamma_update(struct mipi_dsim_device *dsim_dev)
87 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
89 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xf7, 0x3);
92 static void s6e8ax0_etc_source_control(struct mipi_dsim_device *dsim_dev)
94 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
95 const unsigned char data_to_send[] = {
96 0xf6, 0x00, 0x02, 0x00
99 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
100 (unsigned int)data_to_send,
101 ARRAY_SIZE(data_to_send));
104 static void s6e8ax0_etc_pentile_control(struct mipi_dsim_device *dsim_dev)
106 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
107 const unsigned char data_to_send[] = {
108 0xb6, 0x0c, 0x02, 0x03, 0x32, 0xff, 0x44, 0x44, 0xc0,
112 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
113 (unsigned int)data_to_send,
114 ARRAY_SIZE(data_to_send));
117 static void s6e8ax0_etc_mipi_control1(struct mipi_dsim_device *dsim_dev)
119 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
120 const unsigned char data_to_send[] = {
121 0xe1, 0x10, 0x1c, 0x17, 0x08, 0x1d
124 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
125 (unsigned int)data_to_send,
126 ARRAY_SIZE(data_to_send));
129 static void s6e8ax0_etc_mipi_control2(struct mipi_dsim_device *dsim_dev)
131 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
132 const unsigned char data_to_send[] = {
133 0xe2, 0xed, 0x07, 0xc3, 0x13, 0x0d, 0x03
136 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
137 (unsigned int)data_to_send,
138 ARRAY_SIZE(data_to_send));
141 static void s6e8ax0_etc_power_control(struct mipi_dsim_device *dsim_dev)
143 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
144 const unsigned char data_to_send[] = {
145 0xf4, 0xcf, 0x0a, 0x12, 0x10, 0x19, 0x33, 0x02
148 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
149 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
152 static void s6e8ax0_etc_mipi_control3(struct mipi_dsim_device *dsim_dev)
154 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
156 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_SHORT_WRITE_PARAM, 0xe3, 0x40);
159 static void s6e8ax0_etc_mipi_control4(struct mipi_dsim_device *dsim_dev)
161 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
162 const unsigned char data_to_send[] = {
163 0xe4, 0x00, 0x00, 0x14, 0x80, 0x00, 0x00, 0x00
166 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
167 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
170 static void s6e8ax0_elvss_set(struct mipi_dsim_device *dsim_dev)
172 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
173 const unsigned char data_to_send[] = {
177 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
178 (unsigned int)data_to_send,
179 ARRAY_SIZE(data_to_send));
182 static void s6e8ax0_display_on(struct mipi_dsim_device *dsim_dev)
184 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
186 ops->cmd_write(dsim_dev,
187 MIPI_DSI_DCS_SHORT_WRITE, 0x29, 0x00);
190 static void s6e8ax0_sleep_out(struct mipi_dsim_device *dsim_dev)
192 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
194 ops->cmd_write(dsim_dev,
195 MIPI_DSI_DCS_SHORT_WRITE, 0x11, 0x00);
198 static void s6e8ax0_apply_level1_key(struct mipi_dsim_device *dsim_dev)
200 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
201 const unsigned char data_to_send[] = {
205 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
206 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
209 static void s6e8ax0_apply_mtp_key(struct mipi_dsim_device *dsim_dev)
211 struct mipi_dsim_master_ops *ops = dsim_dev->master_ops;
212 const unsigned char data_to_send[] = {
216 ops->cmd_write(dsim_dev, MIPI_DSI_DCS_LONG_WRITE,
217 (unsigned int)data_to_send, ARRAY_SIZE(data_to_send));
220 static void s6e8ax0_panel_init(struct mipi_dsim_device *dsim_dev)
223 * in case of setting gamma and panel condition at first,
224 * it shuold be setting like below.
225 * set_gamma() -> set_panel_condition()
228 s6e8ax0_apply_level1_key(dsim_dev);
229 s6e8ax0_apply_mtp_key(dsim_dev);
231 s6e8ax0_sleep_out(dsim_dev);
233 s6e8ax0_panel_cond(dsim_dev);
234 s6e8ax0_display_cond(dsim_dev);
235 s6e8ax0_gamma_cond(dsim_dev);
236 s6e8ax0_gamma_update(dsim_dev);
238 s6e8ax0_etc_source_control(dsim_dev);
239 s6e8ax0_elvss_set(dsim_dev);
240 s6e8ax0_etc_pentile_control(dsim_dev);
241 s6e8ax0_etc_mipi_control1(dsim_dev);
242 s6e8ax0_etc_mipi_control2(dsim_dev);
243 s6e8ax0_etc_power_control(dsim_dev);
244 s6e8ax0_etc_mipi_control3(dsim_dev);
245 s6e8ax0_etc_mipi_control4(dsim_dev);
248 static int s6e8ax0_panel_set(struct mipi_dsim_device *dsim_dev)
250 s6e8ax0_panel_init(dsim_dev);
255 static void s6e8ax0_display_enable(struct mipi_dsim_device *dsim_dev)
257 s6e8ax0_display_on(dsim_dev);
260 static struct mipi_dsim_lcd_driver s6e8ax0_dsim_ddi_driver = {
264 .mipi_panel_init = s6e8ax0_panel_set,
265 .mipi_display_on = s6e8ax0_display_enable,
268 void s6e8ax0_init(void)
270 exynos_mipi_dsi_register_lcd_driver(&s6e8ax0_dsim_ddi_driver);