Linux-libre 5.3.12-gnu
[librecmc/linux-libre.git] / drivers / video / fbdev / omap2 / omapfb / dss / dss_features.c
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * linux/drivers/video/omap2/dss/dss_features.c
4  *
5  * Copyright (C) 2010 Texas Instruments
6  * Author: Archit Taneja <archit@ti.com>
7  */
8
9 #include <linux/kernel.h>
10 #include <linux/module.h>
11 #include <linux/types.h>
12 #include <linux/err.h>
13 #include <linux/slab.h>
14
15 #include <video/omapfb_dss.h>
16
17 #include "dss.h"
18 #include "dss_features.h"
19
20 /* Defines a generic omap register field */
21 struct dss_reg_field {
22         u8 start, end;
23 };
24
25 struct dss_param_range {
26         int min, max;
27 };
28
29 struct omap_dss_features {
30         const struct dss_reg_field *reg_fields;
31         const int num_reg_fields;
32
33         const enum dss_feat_id *features;
34         const int num_features;
35
36         const int num_mgrs;
37         const int num_ovls;
38         const enum omap_display_type *supported_displays;
39         const enum omap_dss_output_id *supported_outputs;
40         const enum omap_color_mode *supported_color_modes;
41         const enum omap_overlay_caps *overlay_caps;
42         const char * const *clksrc_names;
43         const struct dss_param_range *dss_params;
44
45         const enum omap_dss_rotation_type supported_rotation_types;
46
47         const u32 buffer_size_unit;
48         const u32 burst_size_unit;
49 };
50
51 /* This struct is assigned to one of the below during initialization */
52 static const struct omap_dss_features *omap_current_dss_features;
53
54 static const struct dss_reg_field omap2_dss_reg_fields[] = {
55         [FEAT_REG_FIRHINC]                      = { 11, 0 },
56         [FEAT_REG_FIRVINC]                      = { 27, 16 },
57         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 8, 0 },
58         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 24, 16 },
59         [FEAT_REG_FIFOSIZE]                     = { 8, 0 },
60         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
61         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
62         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
63 };
64
65 static const struct dss_reg_field omap3_dss_reg_fields[] = {
66         [FEAT_REG_FIRHINC]                      = { 12, 0 },
67         [FEAT_REG_FIRVINC]                      = { 28, 16 },
68         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 11, 0 },
69         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 27, 16 },
70         [FEAT_REG_FIFOSIZE]                     = { 10, 0 },
71         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
72         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
73         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
74 };
75
76 static const struct dss_reg_field am43xx_dss_reg_fields[] = {
77         [FEAT_REG_FIRHINC]                      = { 12, 0 },
78         [FEAT_REG_FIRVINC]                      = { 28, 16 },
79         [FEAT_REG_FIFOLOWTHRESHOLD]     = { 11, 0 },
80         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 27, 16 },
81         [FEAT_REG_FIFOSIZE]             = { 10, 0 },
82         [FEAT_REG_HORIZONTALACCU]               = { 9, 0 },
83         [FEAT_REG_VERTICALACCU]                 = { 25, 16 },
84         [FEAT_REG_DISPC_CLK_SWITCH]             = { 0, 0 },
85 };
86
87 static const struct dss_reg_field omap4_dss_reg_fields[] = {
88         [FEAT_REG_FIRHINC]                      = { 12, 0 },
89         [FEAT_REG_FIRVINC]                      = { 28, 16 },
90         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
91         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
92         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
93         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
94         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
95         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 8 },
96 };
97
98 static const struct dss_reg_field omap5_dss_reg_fields[] = {
99         [FEAT_REG_FIRHINC]                      = { 12, 0 },
100         [FEAT_REG_FIRVINC]                      = { 28, 16 },
101         [FEAT_REG_FIFOLOWTHRESHOLD]             = { 15, 0 },
102         [FEAT_REG_FIFOHIGHTHRESHOLD]            = { 31, 16 },
103         [FEAT_REG_FIFOSIZE]                     = { 15, 0 },
104         [FEAT_REG_HORIZONTALACCU]               = { 10, 0 },
105         [FEAT_REG_VERTICALACCU]                 = { 26, 16 },
106         [FEAT_REG_DISPC_CLK_SWITCH]             = { 9, 7 },
107 };
108
109 static const enum omap_display_type omap2_dss_supported_displays[] = {
110         /* OMAP_DSS_CHANNEL_LCD */
111         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
112
113         /* OMAP_DSS_CHANNEL_DIGIT */
114         OMAP_DISPLAY_TYPE_VENC,
115 };
116
117 static const enum omap_display_type omap3430_dss_supported_displays[] = {
118         /* OMAP_DSS_CHANNEL_LCD */
119         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
120         OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
121
122         /* OMAP_DSS_CHANNEL_DIGIT */
123         OMAP_DISPLAY_TYPE_VENC,
124 };
125
126 static const enum omap_display_type omap3630_dss_supported_displays[] = {
127         /* OMAP_DSS_CHANNEL_LCD */
128         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
129         OMAP_DISPLAY_TYPE_DSI,
130
131         /* OMAP_DSS_CHANNEL_DIGIT */
132         OMAP_DISPLAY_TYPE_VENC,
133 };
134
135 static const enum omap_display_type am43xx_dss_supported_displays[] = {
136         /* OMAP_DSS_CHANNEL_LCD */
137         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
138 };
139
140 static const enum omap_display_type omap4_dss_supported_displays[] = {
141         /* OMAP_DSS_CHANNEL_LCD */
142         OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
143
144         /* OMAP_DSS_CHANNEL_DIGIT */
145         OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
146
147         /* OMAP_DSS_CHANNEL_LCD2 */
148         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
149         OMAP_DISPLAY_TYPE_DSI,
150 };
151
152 static const enum omap_display_type omap5_dss_supported_displays[] = {
153         /* OMAP_DSS_CHANNEL_LCD */
154         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
155         OMAP_DISPLAY_TYPE_DSI,
156
157         /* OMAP_DSS_CHANNEL_DIGIT */
158         OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
159
160         /* OMAP_DSS_CHANNEL_LCD2 */
161         OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
162         OMAP_DISPLAY_TYPE_DSI,
163 };
164
165 static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
166         /* OMAP_DSS_CHANNEL_LCD */
167         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
168
169         /* OMAP_DSS_CHANNEL_DIGIT */
170         OMAP_DSS_OUTPUT_VENC,
171 };
172
173 static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
174         /* OMAP_DSS_CHANNEL_LCD */
175         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
176         OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
177
178         /* OMAP_DSS_CHANNEL_DIGIT */
179         OMAP_DSS_OUTPUT_VENC,
180 };
181
182 static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
183         /* OMAP_DSS_CHANNEL_LCD */
184         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
185         OMAP_DSS_OUTPUT_DSI1,
186
187         /* OMAP_DSS_CHANNEL_DIGIT */
188         OMAP_DSS_OUTPUT_VENC,
189 };
190
191 static const enum omap_dss_output_id am43xx_dss_supported_outputs[] = {
192         /* OMAP_DSS_CHANNEL_LCD */
193         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
194 };
195
196 static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
197         /* OMAP_DSS_CHANNEL_LCD */
198         OMAP_DSS_OUTPUT_DBI | OMAP_DSS_OUTPUT_DSI1,
199
200         /* OMAP_DSS_CHANNEL_DIGIT */
201         OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI,
202
203         /* OMAP_DSS_CHANNEL_LCD2 */
204         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
205         OMAP_DSS_OUTPUT_DSI2,
206 };
207
208 static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
209         /* OMAP_DSS_CHANNEL_LCD */
210         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
211         OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
212
213         /* OMAP_DSS_CHANNEL_DIGIT */
214         OMAP_DSS_OUTPUT_HDMI,
215
216         /* OMAP_DSS_CHANNEL_LCD2 */
217         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
218         OMAP_DSS_OUTPUT_DSI1,
219
220         /* OMAP_DSS_CHANNEL_LCD3 */
221         OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
222         OMAP_DSS_OUTPUT_DSI2,
223 };
224
225 static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
226         /* OMAP_DSS_GFX */
227         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
228         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
229         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
230         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
231
232         /* OMAP_DSS_VIDEO1 */
233         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
234         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
235         OMAP_DSS_COLOR_UYVY,
236
237         /* OMAP_DSS_VIDEO2 */
238         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
239         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
240         OMAP_DSS_COLOR_UYVY,
241 };
242
243 static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
244         /* OMAP_DSS_GFX */
245         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
246         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
247         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
248         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
249         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
250         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
251
252         /* OMAP_DSS_VIDEO1 */
253         OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
254         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
255         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
256
257         /* OMAP_DSS_VIDEO2 */
258         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
259         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
260         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
261         OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
262         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
263 };
264
265 static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
266         /* OMAP_DSS_GFX */
267         OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
268         OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
269         OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
270         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
271         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
272         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
273         OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
274         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
275
276         /* OMAP_DSS_VIDEO1 */
277         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
278         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
279         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
280         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
281         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
282         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
283         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
284         OMAP_DSS_COLOR_RGBX32,
285
286        /* OMAP_DSS_VIDEO2 */
287         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
288         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
289         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
290         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
291         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
292         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
293         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
294         OMAP_DSS_COLOR_RGBX32,
295
296         /* OMAP_DSS_VIDEO3 */
297         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
298         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
299         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
300         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
301         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
302         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
303         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
304         OMAP_DSS_COLOR_RGBX32,
305
306         /* OMAP_DSS_WB */
307         OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
308         OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
309         OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
310         OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
311         OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
312         OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
313         OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
314         OMAP_DSS_COLOR_RGBX32,
315 };
316
317 static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
318         /* OMAP_DSS_GFX */
319         OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
320
321         /* OMAP_DSS_VIDEO1 */
322         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
323                 OMAP_DSS_OVL_CAP_REPLICATION,
324
325         /* OMAP_DSS_VIDEO2 */
326         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
327                 OMAP_DSS_OVL_CAP_REPLICATION,
328 };
329
330 static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
331         /* OMAP_DSS_GFX */
332         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
333                 OMAP_DSS_OVL_CAP_REPLICATION,
334
335         /* OMAP_DSS_VIDEO1 */
336         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
337                 OMAP_DSS_OVL_CAP_REPLICATION,
338
339         /* OMAP_DSS_VIDEO2 */
340         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
341                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
342 };
343
344 static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
345         /* OMAP_DSS_GFX */
346         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
347                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
348
349         /* OMAP_DSS_VIDEO1 */
350         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
351                 OMAP_DSS_OVL_CAP_REPLICATION,
352
353         /* OMAP_DSS_VIDEO2 */
354         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
355                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
356                 OMAP_DSS_OVL_CAP_REPLICATION,
357 };
358
359 static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
360         /* OMAP_DSS_GFX */
361         OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
362                 OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
363                 OMAP_DSS_OVL_CAP_REPLICATION,
364
365         /* OMAP_DSS_VIDEO1 */
366         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
367                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
368                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
369
370         /* OMAP_DSS_VIDEO2 */
371         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
372                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
373                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
374
375         /* OMAP_DSS_VIDEO3 */
376         OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
377                 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
378                 OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
379 };
380
381 static const char * const omap2_dss_clk_source_names[] = {
382         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "N/A",
383         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "N/A",
384         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK1",
385 };
386
387 static const char * const omap3_dss_clk_source_names[] = {
388         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DSI1_PLL_FCLK",
389         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DSI2_PLL_FCLK",
390         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS1_ALWON_FCLK",
391 };
392
393 static const char * const omap4_dss_clk_source_names[] = {
394         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "PLL1_CLK1",
395         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "PLL1_CLK2",
396         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_FCLK",
397         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
398         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "PLL2_CLK2",
399 };
400
401 static const char * const omap5_dss_clk_source_names[] = {
402         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC]  = "DPLL_DSI1_A_CLK1",
403         [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI]    = "DPLL_DSI1_A_CLK2",
404         [OMAP_DSS_CLK_SRC_FCK]                  = "DSS_CLK",
405         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
406         [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI]   = "DPLL_DSI1_C_CLK2",
407 };
408
409 static const struct dss_param_range omap2_dss_param_range[] = {
410         [FEAT_PARAM_DSS_FCK]                    = { 0, 133000000 },
411         [FEAT_PARAM_DSS_PCD]                    = { 2, 255 },
412         [FEAT_PARAM_DOWNSCALE]                  = { 1, 2 },
413         /*
414          * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
415          * scaler cannot scale a image with width more than 768.
416          */
417         [FEAT_PARAM_LINEWIDTH]                  = { 1, 768 },
418 };
419
420 static const struct dss_param_range omap3_dss_param_range[] = {
421         [FEAT_PARAM_DSS_FCK]                    = { 0, 173000000 },
422         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
423         [FEAT_PARAM_DSIPLL_LPDIV]               = { 1, (1 << 13) - 1},
424         [FEAT_PARAM_DSI_FCK]                    = { 0, 173000000 },
425         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
426         [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
427 };
428
429 static const struct dss_param_range am43xx_dss_param_range[] = {
430         [FEAT_PARAM_DSS_FCK]                    = { 0, 200000000 },
431         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
432         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
433         [FEAT_PARAM_LINEWIDTH]                  = { 1, 1024 },
434 };
435
436 static const struct dss_param_range omap4_dss_param_range[] = {
437         [FEAT_PARAM_DSS_FCK]                    = { 0, 186000000 },
438         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
439         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
440         [FEAT_PARAM_DSI_FCK]                    = { 0, 170000000 },
441         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
442         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
443 };
444
445 static const struct dss_param_range omap5_dss_param_range[] = {
446         [FEAT_PARAM_DSS_FCK]                    = { 0, 209250000 },
447         [FEAT_PARAM_DSS_PCD]                    = { 1, 255 },
448         [FEAT_PARAM_DSIPLL_LPDIV]               = { 0, (1 << 13) - 1 },
449         [FEAT_PARAM_DSI_FCK]                    = { 0, 209250000 },
450         [FEAT_PARAM_DOWNSCALE]                  = { 1, 4 },
451         [FEAT_PARAM_LINEWIDTH]                  = { 1, 2048 },
452 };
453
454 static const enum dss_feat_id omap2_dss_feat_list[] = {
455         FEAT_LCDENABLEPOL,
456         FEAT_LCDENABLESIGNAL,
457         FEAT_PCKFREEENABLE,
458         FEAT_FUNCGATED,
459         FEAT_ROWREPEATENABLE,
460         FEAT_RESIZECONF,
461 };
462
463 static const enum dss_feat_id omap3430_dss_feat_list[] = {
464         FEAT_LCDENABLEPOL,
465         FEAT_LCDENABLESIGNAL,
466         FEAT_PCKFREEENABLE,
467         FEAT_FUNCGATED,
468         FEAT_LINEBUFFERSPLIT,
469         FEAT_ROWREPEATENABLE,
470         FEAT_RESIZECONF,
471         FEAT_DSI_REVERSE_TXCLKESC,
472         FEAT_VENC_REQUIRES_TV_DAC_CLK,
473         FEAT_CPR,
474         FEAT_PRELOAD,
475         FEAT_FIR_COEF_V,
476         FEAT_ALPHA_FIXED_ZORDER,
477         FEAT_FIFO_MERGE,
478         FEAT_OMAP3_DSI_FIFO_BUG,
479         FEAT_DPI_USES_VDDS_DSI,
480 };
481
482 static const enum dss_feat_id am35xx_dss_feat_list[] = {
483         FEAT_LCDENABLEPOL,
484         FEAT_LCDENABLESIGNAL,
485         FEAT_PCKFREEENABLE,
486         FEAT_FUNCGATED,
487         FEAT_LINEBUFFERSPLIT,
488         FEAT_ROWREPEATENABLE,
489         FEAT_RESIZECONF,
490         FEAT_DSI_REVERSE_TXCLKESC,
491         FEAT_VENC_REQUIRES_TV_DAC_CLK,
492         FEAT_CPR,
493         FEAT_PRELOAD,
494         FEAT_FIR_COEF_V,
495         FEAT_ALPHA_FIXED_ZORDER,
496         FEAT_FIFO_MERGE,
497         FEAT_OMAP3_DSI_FIFO_BUG,
498 };
499
500 static const enum dss_feat_id am43xx_dss_feat_list[] = {
501         FEAT_LCDENABLEPOL,
502         FEAT_LCDENABLESIGNAL,
503         FEAT_PCKFREEENABLE,
504         FEAT_FUNCGATED,
505         FEAT_LINEBUFFERSPLIT,
506         FEAT_ROWREPEATENABLE,
507         FEAT_RESIZECONF,
508         FEAT_CPR,
509         FEAT_PRELOAD,
510         FEAT_FIR_COEF_V,
511         FEAT_ALPHA_FIXED_ZORDER,
512         FEAT_FIFO_MERGE,
513 };
514
515 static const enum dss_feat_id omap3630_dss_feat_list[] = {
516         FEAT_LCDENABLEPOL,
517         FEAT_LCDENABLESIGNAL,
518         FEAT_PCKFREEENABLE,
519         FEAT_FUNCGATED,
520         FEAT_LINEBUFFERSPLIT,
521         FEAT_ROWREPEATENABLE,
522         FEAT_RESIZECONF,
523         FEAT_DSI_PLL_PWR_BUG,
524         FEAT_CPR,
525         FEAT_PRELOAD,
526         FEAT_FIR_COEF_V,
527         FEAT_ALPHA_FIXED_ZORDER,
528         FEAT_FIFO_MERGE,
529         FEAT_OMAP3_DSI_FIFO_BUG,
530         FEAT_DPI_USES_VDDS_DSI,
531 };
532
533 static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
534         FEAT_MGR_LCD2,
535         FEAT_CORE_CLK_DIV,
536         FEAT_LCD_CLK_SRC,
537         FEAT_DSI_DCS_CMD_CONFIG_VC,
538         FEAT_DSI_VC_OCP_WIDTH,
539         FEAT_DSI_GNQ,
540         FEAT_HANDLE_UV_SEPARATE,
541         FEAT_ATTR2,
542         FEAT_CPR,
543         FEAT_PRELOAD,
544         FEAT_FIR_COEF_V,
545         FEAT_ALPHA_FREE_ZORDER,
546         FEAT_FIFO_MERGE,
547         FEAT_BURST_2D,
548 };
549
550 static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
551         FEAT_MGR_LCD2,
552         FEAT_CORE_CLK_DIV,
553         FEAT_LCD_CLK_SRC,
554         FEAT_DSI_DCS_CMD_CONFIG_VC,
555         FEAT_DSI_VC_OCP_WIDTH,
556         FEAT_DSI_GNQ,
557         FEAT_HDMI_CTS_SWMODE,
558         FEAT_HANDLE_UV_SEPARATE,
559         FEAT_ATTR2,
560         FEAT_CPR,
561         FEAT_PRELOAD,
562         FEAT_FIR_COEF_V,
563         FEAT_ALPHA_FREE_ZORDER,
564         FEAT_FIFO_MERGE,
565         FEAT_BURST_2D,
566 };
567
568 static const enum dss_feat_id omap4_dss_feat_list[] = {
569         FEAT_MGR_LCD2,
570         FEAT_CORE_CLK_DIV,
571         FEAT_LCD_CLK_SRC,
572         FEAT_DSI_DCS_CMD_CONFIG_VC,
573         FEAT_DSI_VC_OCP_WIDTH,
574         FEAT_DSI_GNQ,
575         FEAT_HDMI_CTS_SWMODE,
576         FEAT_HDMI_AUDIO_USE_MCLK,
577         FEAT_HANDLE_UV_SEPARATE,
578         FEAT_ATTR2,
579         FEAT_CPR,
580         FEAT_PRELOAD,
581         FEAT_FIR_COEF_V,
582         FEAT_ALPHA_FREE_ZORDER,
583         FEAT_FIFO_MERGE,
584         FEAT_BURST_2D,
585 };
586
587 static const enum dss_feat_id omap5_dss_feat_list[] = {
588         FEAT_MGR_LCD2,
589         FEAT_MGR_LCD3,
590         FEAT_CORE_CLK_DIV,
591         FEAT_LCD_CLK_SRC,
592         FEAT_DSI_DCS_CMD_CONFIG_VC,
593         FEAT_DSI_VC_OCP_WIDTH,
594         FEAT_DSI_GNQ,
595         FEAT_HDMI_CTS_SWMODE,
596         FEAT_HDMI_AUDIO_USE_MCLK,
597         FEAT_HANDLE_UV_SEPARATE,
598         FEAT_ATTR2,
599         FEAT_CPR,
600         FEAT_PRELOAD,
601         FEAT_FIR_COEF_V,
602         FEAT_ALPHA_FREE_ZORDER,
603         FEAT_FIFO_MERGE,
604         FEAT_BURST_2D,
605         FEAT_DSI_PHY_DCC,
606         FEAT_MFLAG,
607 };
608
609 /* OMAP2 DSS Features */
610 static const struct omap_dss_features omap2_dss_features = {
611         .reg_fields = omap2_dss_reg_fields,
612         .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
613
614         .features = omap2_dss_feat_list,
615         .num_features = ARRAY_SIZE(omap2_dss_feat_list),
616
617         .num_mgrs = 2,
618         .num_ovls = 3,
619         .supported_displays = omap2_dss_supported_displays,
620         .supported_outputs = omap2_dss_supported_outputs,
621         .supported_color_modes = omap2_dss_supported_color_modes,
622         .overlay_caps = omap2_dss_overlay_caps,
623         .clksrc_names = omap2_dss_clk_source_names,
624         .dss_params = omap2_dss_param_range,
625         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
626         .buffer_size_unit = 1,
627         .burst_size_unit = 8,
628 };
629
630 /* OMAP3 DSS Features */
631 static const struct omap_dss_features omap3430_dss_features = {
632         .reg_fields = omap3_dss_reg_fields,
633         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
634
635         .features = omap3430_dss_feat_list,
636         .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
637
638         .num_mgrs = 2,
639         .num_ovls = 3,
640         .supported_displays = omap3430_dss_supported_displays,
641         .supported_outputs = omap3430_dss_supported_outputs,
642         .supported_color_modes = omap3_dss_supported_color_modes,
643         .overlay_caps = omap3430_dss_overlay_caps,
644         .clksrc_names = omap3_dss_clk_source_names,
645         .dss_params = omap3_dss_param_range,
646         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
647         .buffer_size_unit = 1,
648         .burst_size_unit = 8,
649 };
650
651 /*
652  * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
653  * vdds_dsi regulator.
654  */
655 static const struct omap_dss_features am35xx_dss_features = {
656         .reg_fields = omap3_dss_reg_fields,
657         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
658
659         .features = am35xx_dss_feat_list,
660         .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
661
662         .num_mgrs = 2,
663         .num_ovls = 3,
664         .supported_displays = omap3430_dss_supported_displays,
665         .supported_outputs = omap3430_dss_supported_outputs,
666         .supported_color_modes = omap3_dss_supported_color_modes,
667         .overlay_caps = omap3430_dss_overlay_caps,
668         .clksrc_names = omap3_dss_clk_source_names,
669         .dss_params = omap3_dss_param_range,
670         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
671         .buffer_size_unit = 1,
672         .burst_size_unit = 8,
673 };
674
675 static const struct omap_dss_features am43xx_dss_features = {
676         .reg_fields = am43xx_dss_reg_fields,
677         .num_reg_fields = ARRAY_SIZE(am43xx_dss_reg_fields),
678
679         .features = am43xx_dss_feat_list,
680         .num_features = ARRAY_SIZE(am43xx_dss_feat_list),
681
682         .num_mgrs = 1,
683         .num_ovls = 3,
684         .supported_displays = am43xx_dss_supported_displays,
685         .supported_outputs = am43xx_dss_supported_outputs,
686         .supported_color_modes = omap3_dss_supported_color_modes,
687         .overlay_caps = omap3430_dss_overlay_caps,
688         .clksrc_names = omap2_dss_clk_source_names,
689         .dss_params = am43xx_dss_param_range,
690         .supported_rotation_types = OMAP_DSS_ROT_DMA,
691         .buffer_size_unit = 1,
692         .burst_size_unit = 8,
693 };
694
695 static const struct omap_dss_features omap3630_dss_features = {
696         .reg_fields = omap3_dss_reg_fields,
697         .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
698
699         .features = omap3630_dss_feat_list,
700         .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
701
702         .num_mgrs = 2,
703         .num_ovls = 3,
704         .supported_displays = omap3630_dss_supported_displays,
705         .supported_outputs = omap3630_dss_supported_outputs,
706         .supported_color_modes = omap3_dss_supported_color_modes,
707         .overlay_caps = omap3630_dss_overlay_caps,
708         .clksrc_names = omap3_dss_clk_source_names,
709         .dss_params = omap3_dss_param_range,
710         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
711         .buffer_size_unit = 1,
712         .burst_size_unit = 8,
713 };
714
715 /* OMAP4 DSS Features */
716 /* For OMAP4430 ES 1.0 revision */
717 static const struct omap_dss_features omap4430_es1_0_dss_features  = {
718         .reg_fields = omap4_dss_reg_fields,
719         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
720
721         .features = omap4430_es1_0_dss_feat_list,
722         .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
723
724         .num_mgrs = 3,
725         .num_ovls = 4,
726         .supported_displays = omap4_dss_supported_displays,
727         .supported_outputs = omap4_dss_supported_outputs,
728         .supported_color_modes = omap4_dss_supported_color_modes,
729         .overlay_caps = omap4_dss_overlay_caps,
730         .clksrc_names = omap4_dss_clk_source_names,
731         .dss_params = omap4_dss_param_range,
732         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
733         .buffer_size_unit = 16,
734         .burst_size_unit = 16,
735 };
736
737 /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
738 static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
739         .reg_fields = omap4_dss_reg_fields,
740         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
741
742         .features = omap4430_es2_0_1_2_dss_feat_list,
743         .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
744
745         .num_mgrs = 3,
746         .num_ovls = 4,
747         .supported_displays = omap4_dss_supported_displays,
748         .supported_outputs = omap4_dss_supported_outputs,
749         .supported_color_modes = omap4_dss_supported_color_modes,
750         .overlay_caps = omap4_dss_overlay_caps,
751         .clksrc_names = omap4_dss_clk_source_names,
752         .dss_params = omap4_dss_param_range,
753         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
754         .buffer_size_unit = 16,
755         .burst_size_unit = 16,
756 };
757
758 /* For all the other OMAP4 versions */
759 static const struct omap_dss_features omap4_dss_features = {
760         .reg_fields = omap4_dss_reg_fields,
761         .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
762
763         .features = omap4_dss_feat_list,
764         .num_features = ARRAY_SIZE(omap4_dss_feat_list),
765
766         .num_mgrs = 3,
767         .num_ovls = 4,
768         .supported_displays = omap4_dss_supported_displays,
769         .supported_outputs = omap4_dss_supported_outputs,
770         .supported_color_modes = omap4_dss_supported_color_modes,
771         .overlay_caps = omap4_dss_overlay_caps,
772         .clksrc_names = omap4_dss_clk_source_names,
773         .dss_params = omap4_dss_param_range,
774         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
775         .buffer_size_unit = 16,
776         .burst_size_unit = 16,
777 };
778
779 /* OMAP5 DSS Features */
780 static const struct omap_dss_features omap5_dss_features = {
781         .reg_fields = omap5_dss_reg_fields,
782         .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
783
784         .features = omap5_dss_feat_list,
785         .num_features = ARRAY_SIZE(omap5_dss_feat_list),
786
787         .num_mgrs = 4,
788         .num_ovls = 4,
789         .supported_displays = omap5_dss_supported_displays,
790         .supported_outputs = omap5_dss_supported_outputs,
791         .supported_color_modes = omap4_dss_supported_color_modes,
792         .overlay_caps = omap4_dss_overlay_caps,
793         .clksrc_names = omap5_dss_clk_source_names,
794         .dss_params = omap5_dss_param_range,
795         .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
796         .buffer_size_unit = 16,
797         .burst_size_unit = 16,
798 };
799
800 /* Functions returning values related to a DSS feature */
801 int dss_feat_get_num_mgrs(void)
802 {
803         return omap_current_dss_features->num_mgrs;
804 }
805 EXPORT_SYMBOL(dss_feat_get_num_mgrs);
806
807 int dss_feat_get_num_ovls(void)
808 {
809         return omap_current_dss_features->num_ovls;
810 }
811 EXPORT_SYMBOL(dss_feat_get_num_ovls);
812
813 unsigned long dss_feat_get_param_min(enum dss_range_param param)
814 {
815         return omap_current_dss_features->dss_params[param].min;
816 }
817
818 unsigned long dss_feat_get_param_max(enum dss_range_param param)
819 {
820         return omap_current_dss_features->dss_params[param].max;
821 }
822
823 enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
824 {
825         return omap_current_dss_features->supported_displays[channel];
826 }
827
828 enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
829 {
830         return omap_current_dss_features->supported_outputs[channel];
831 }
832
833 enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
834 {
835         return omap_current_dss_features->supported_color_modes[plane];
836 }
837 EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
838
839 enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
840 {
841         return omap_current_dss_features->overlay_caps[plane];
842 }
843
844 bool dss_feat_color_mode_supported(enum omap_plane plane,
845                 enum omap_color_mode color_mode)
846 {
847         return omap_current_dss_features->supported_color_modes[plane] &
848                         color_mode;
849 }
850
851 const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
852 {
853         return omap_current_dss_features->clksrc_names[id];
854 }
855
856 u32 dss_feat_get_buffer_size_unit(void)
857 {
858         return omap_current_dss_features->buffer_size_unit;
859 }
860
861 u32 dss_feat_get_burst_size_unit(void)
862 {
863         return omap_current_dss_features->burst_size_unit;
864 }
865
866 /* DSS has_feature check */
867 bool dss_has_feature(enum dss_feat_id id)
868 {
869         int i;
870         const enum dss_feat_id *features = omap_current_dss_features->features;
871         const int num_features = omap_current_dss_features->num_features;
872
873         for (i = 0; i < num_features; i++) {
874                 if (features[i] == id)
875                         return true;
876         }
877
878         return false;
879 }
880
881 void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
882 {
883         BUG_ON(id >= omap_current_dss_features->num_reg_fields);
884
885         *start = omap_current_dss_features->reg_fields[id].start;
886         *end = omap_current_dss_features->reg_fields[id].end;
887 }
888
889 bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
890 {
891         return omap_current_dss_features->supported_rotation_types & rot_type;
892 }
893
894 void dss_features_init(enum omapdss_version version)
895 {
896         switch (version) {
897         case OMAPDSS_VER_OMAP24xx:
898                 omap_current_dss_features = &omap2_dss_features;
899                 break;
900
901         case OMAPDSS_VER_OMAP34xx_ES1:
902         case OMAPDSS_VER_OMAP34xx_ES3:
903                 omap_current_dss_features = &omap3430_dss_features;
904                 break;
905
906         case OMAPDSS_VER_OMAP3630:
907                 omap_current_dss_features = &omap3630_dss_features;
908                 break;
909
910         case OMAPDSS_VER_OMAP4430_ES1:
911                 omap_current_dss_features = &omap4430_es1_0_dss_features;
912                 break;
913
914         case OMAPDSS_VER_OMAP4430_ES2:
915                 omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
916                 break;
917
918         case OMAPDSS_VER_OMAP4:
919                 omap_current_dss_features = &omap4_dss_features;
920                 break;
921
922         case OMAPDSS_VER_OMAP5:
923         case OMAPDSS_VER_DRA7xx:
924                 omap_current_dss_features = &omap5_dss_features;
925                 break;
926
927         case OMAPDSS_VER_AM35xx:
928                 omap_current_dss_features = &am35xx_dss_features;
929                 break;
930
931         case OMAPDSS_VER_AM43xx:
932                 omap_current_dss_features = &am43xx_dss_features;
933                 break;
934
935         default:
936                 DSSWARN("Unsupported OMAP version");
937                 break;
938         }
939 }