2 * HDMI driver for OMAP5
4 * Copyright (C) 2014 Texas Instruments Incorporated
9 * Archit Taneja <archit@ti.com>
10 * Tomi Valkeinen <tomi.valkeinen@ti.com>
12 * This program is free software; you can redistribute it and/or modify it
13 * under the terms of the GNU General Public License version 2 as published by
14 * the Free Software Foundation.
16 * This program is distributed in the hope that it will be useful, but WITHOUT
17 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
21 * You should have received a copy of the GNU General Public License along with
22 * this program. If not, see <http://www.gnu.org/licenses/>.
25 #define DSS_SUBSYS_NAME "HDMI"
27 #include <linux/kernel.h>
28 #include <linux/module.h>
29 #include <linux/err.h>
31 #include <linux/interrupt.h>
32 #include <linux/mutex.h>
33 #include <linux/delay.h>
34 #include <linux/string.h>
35 #include <linux/platform_device.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/clk.h>
38 #include <linux/gpio.h>
39 #include <linux/regulator/consumer.h>
40 #include <video/omapdss.h>
42 #include "hdmi5_core.h"
44 #include "dss_features.h"
48 struct platform_device *pdev;
50 struct hdmi_wp_data wp;
51 struct hdmi_pll_data pll;
52 struct hdmi_phy_data phy;
53 struct hdmi_core_data core;
55 struct hdmi_config cfg;
58 struct regulator *vdda_reg;
62 struct omap_dss_device output;
65 static int hdmi_runtime_get(void)
69 DSSDBG("hdmi_runtime_get\n");
71 r = pm_runtime_get_sync(&hdmi.pdev->dev);
79 static void hdmi_runtime_put(void)
83 DSSDBG("hdmi_runtime_put\n");
85 r = pm_runtime_put_sync(&hdmi.pdev->dev);
86 WARN_ON(r < 0 && r != -ENOSYS);
89 static irqreturn_t hdmi_irq_handler(int irq, void *data)
91 struct hdmi_wp_data *wp = data;
94 irqstatus = hdmi_wp_get_irqstatus(wp);
95 hdmi_wp_set_irqstatus(wp, irqstatus);
97 if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
98 irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
101 * If we get both connect and disconnect interrupts at the same
102 * time, turn off the PHY, clear interrupts, and restart, which
103 * raises connect interrupt if a cable is connected, or nothing
104 * if cable is not connected.
107 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
110 * We always get bogus CONNECT & DISCONNECT interrupts when
111 * setting the PHY to LDOON. To ignore those, we force the RXDET
112 * line to 0 until the PHY power state has been changed.
114 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
115 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
116 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
117 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
119 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
120 HDMI_IRQ_LINK_DISCONNECT);
122 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
124 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
126 } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
127 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
128 } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
129 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
135 static int hdmi_init_regulator(void)
138 struct regulator *reg;
140 if (hdmi.vdda_reg != NULL)
143 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
145 DSSERR("can't get VDDA regulator\n");
149 if (regulator_can_change_voltage(reg)) {
150 r = regulator_set_voltage(reg, 1800000, 1800000);
152 devm_regulator_put(reg);
153 DSSWARN("can't set the regulator voltage\n");
163 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
167 r = regulator_enable(hdmi.vdda_reg);
171 r = hdmi_runtime_get();
173 goto err_runtime_get;
175 /* Make selection of HDMI in DSS */
176 dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
178 hdmi.core_enabled = true;
183 regulator_disable(hdmi.vdda_reg);
188 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
190 hdmi.core_enabled = false;
193 regulator_disable(hdmi.vdda_reg);
196 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
199 struct omap_video_timings *p;
200 struct omap_overlay_manager *mgr = hdmi.output.manager;
203 r = hdmi_power_on_core(dssdev);
207 p = &hdmi.cfg.timings;
209 DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
211 /* the functions below use kHz pixel clock. TODO: change to Hz */
212 phy = p->pixelclock / 1000;
214 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), phy);
216 /* disable and clear irqs */
217 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
218 hdmi_wp_set_irqstatus(&hdmi.wp,
219 hdmi_wp_get_irqstatus(&hdmi.wp));
221 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
222 r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp);
224 DSSDBG("Failed to lock PLL\n");
228 r = hdmi_phy_configure(&hdmi.phy, &hdmi.cfg);
230 DSSDBG("Failed to start PHY\n");
234 r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
238 hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
240 /* bypass TV gamma table */
241 dispc_enable_gamma_table(0);
244 dss_mgr_set_timings(mgr, p);
246 r = hdmi_wp_video_start(&hdmi.wp);
250 r = dss_mgr_enable(mgr);
254 hdmi_wp_set_irqenable(&hdmi.wp,
255 HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
260 hdmi_wp_video_stop(&hdmi.wp);
262 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
265 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
267 hdmi_power_off_core(dssdev);
271 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
273 struct omap_overlay_manager *mgr = hdmi.output.manager;
275 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
277 dss_mgr_disable(mgr);
279 hdmi_wp_video_stop(&hdmi.wp);
281 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
283 hdmi_pll_disable(&hdmi.pll, &hdmi.wp);
285 hdmi_power_off_core(dssdev);
288 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
289 struct omap_video_timings *timings)
291 struct omap_dss_device *out = &hdmi.output;
293 if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
299 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
300 struct omap_video_timings *timings)
303 const struct hdmi_config *t;
305 mutex_lock(&hdmi.lock);
307 cm = hdmi_get_code(timings);
310 t = hdmi_get_timings(cm.mode, cm.code);
314 dispc_set_tv_pclk(t->timings.pixelclock);
316 hdmi.cfg.timings = *timings;
317 hdmi.cfg.cm.code = 0;
318 hdmi.cfg.cm.mode = HDMI_DVI;
320 dispc_set_tv_pclk(timings->pixelclock);
323 DSSDBG("using mode: %s, code %d\n", hdmi.cfg.cm.mode == HDMI_DVI ?
324 "DVI" : "HDMI", hdmi.cfg.cm.code);
326 mutex_unlock(&hdmi.lock);
329 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
330 struct omap_video_timings *timings)
332 const struct hdmi_config *cfg;
333 struct hdmi_cm cm = hdmi.cfg.cm;
335 cfg = hdmi_get_timings(cm.mode, cm.code);
337 cfg = hdmi_default_timing();
339 memcpy(timings, &cfg->timings, sizeof(cfg->timings));
342 static void hdmi_dump_regs(struct seq_file *s)
344 mutex_lock(&hdmi.lock);
346 if (hdmi_runtime_get()) {
347 mutex_unlock(&hdmi.lock);
351 hdmi_wp_dump(&hdmi.wp, s);
352 hdmi_pll_dump(&hdmi.pll, s);
353 hdmi_phy_dump(&hdmi.phy, s);
354 hdmi5_core_dump(&hdmi.core, s);
357 mutex_unlock(&hdmi.lock);
360 static int read_edid(u8 *buf, int len)
365 mutex_lock(&hdmi.lock);
367 r = hdmi_runtime_get();
370 idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
372 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
374 r = hdmi5_read_edid(&hdmi.core, buf, len);
376 REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
379 mutex_unlock(&hdmi.lock);
384 static int hdmi_display_enable(struct omap_dss_device *dssdev)
386 struct omap_dss_device *out = &hdmi.output;
389 DSSDBG("ENTER hdmi_display_enable\n");
391 mutex_lock(&hdmi.lock);
393 if (out == NULL || out->manager == NULL) {
394 DSSERR("failed to enable display: no output/manager\n");
399 r = hdmi_power_on_full(dssdev);
401 DSSERR("failed to power on device\n");
405 mutex_unlock(&hdmi.lock);
409 mutex_unlock(&hdmi.lock);
413 static void hdmi_display_disable(struct omap_dss_device *dssdev)
415 DSSDBG("Enter hdmi_display_disable\n");
417 mutex_lock(&hdmi.lock);
419 hdmi_power_off_full(dssdev);
421 mutex_unlock(&hdmi.lock);
424 static int hdmi_core_enable(struct omap_dss_device *dssdev)
428 DSSDBG("ENTER omapdss_hdmi_core_enable\n");
430 mutex_lock(&hdmi.lock);
432 r = hdmi_power_on_core(dssdev);
434 DSSERR("failed to power on device\n");
438 mutex_unlock(&hdmi.lock);
442 mutex_unlock(&hdmi.lock);
446 static void hdmi_core_disable(struct omap_dss_device *dssdev)
448 DSSDBG("Enter omapdss_hdmi_core_disable\n");
450 mutex_lock(&hdmi.lock);
452 hdmi_power_off_core(dssdev);
454 mutex_unlock(&hdmi.lock);
457 static int hdmi_get_clocks(struct platform_device *pdev)
461 clk = devm_clk_get(&pdev->dev, "sys_clk");
463 DSSERR("can't get sys_clk\n");
472 static int hdmi_connect(struct omap_dss_device *dssdev,
473 struct omap_dss_device *dst)
475 struct omap_overlay_manager *mgr;
478 r = hdmi_init_regulator();
482 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
486 r = dss_mgr_connect(mgr, dssdev);
490 r = omapdss_output_set_device(dssdev, dst);
492 DSSERR("failed to connect output to new device: %s\n",
494 dss_mgr_disconnect(mgr, dssdev);
501 static void hdmi_disconnect(struct omap_dss_device *dssdev,
502 struct omap_dss_device *dst)
504 WARN_ON(dst != dssdev->dst);
506 if (dst != dssdev->dst)
509 omapdss_output_unset_device(dssdev);
512 dss_mgr_disconnect(dssdev->manager, dssdev);
515 static int hdmi_read_edid(struct omap_dss_device *dssdev,
521 need_enable = hdmi.core_enabled == false;
524 r = hdmi_core_enable(dssdev);
529 r = read_edid(edid, len);
532 hdmi_core_disable(dssdev);
537 #if defined(CONFIG_OMAP5_DSS_HDMI_AUDIO)
538 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
542 mutex_lock(&hdmi.lock);
544 if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
549 r = hdmi_wp_audio_enable(&hdmi.wp, true);
553 mutex_unlock(&hdmi.lock);
557 mutex_unlock(&hdmi.lock);
561 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
563 hdmi_wp_audio_enable(&hdmi.wp, false);
566 static int hdmi_audio_start(struct omap_dss_device *dssdev)
568 return hdmi_wp_audio_core_req_enable(&hdmi.wp, true);
571 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
573 hdmi_wp_audio_core_req_enable(&hdmi.wp, false);
576 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
580 mutex_lock(&hdmi.lock);
582 r = hdmi_mode_has_audio(hdmi.cfg.cm.mode);
584 mutex_unlock(&hdmi.lock);
588 static int hdmi_audio_config(struct omap_dss_device *dssdev,
589 struct omap_dss_audio *audio)
592 u32 pclk = hdmi.cfg.timings.pixelclock;
594 mutex_lock(&hdmi.lock);
596 if (!hdmi_mode_has_audio(hdmi.cfg.cm.mode)) {
601 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, audio, pclk);
605 mutex_unlock(&hdmi.lock);
609 mutex_unlock(&hdmi.lock);
613 static int hdmi_audio_enable(struct omap_dss_device *dssdev)
618 static void hdmi_audio_disable(struct omap_dss_device *dssdev)
622 static int hdmi_audio_start(struct omap_dss_device *dssdev)
627 static void hdmi_audio_stop(struct omap_dss_device *dssdev)
631 static bool hdmi_audio_supported(struct omap_dss_device *dssdev)
636 static int hdmi_audio_config(struct omap_dss_device *dssdev,
637 struct omap_dss_audio *audio)
643 static const struct omapdss_hdmi_ops hdmi_ops = {
644 .connect = hdmi_connect,
645 .disconnect = hdmi_disconnect,
647 .enable = hdmi_display_enable,
648 .disable = hdmi_display_disable,
650 .check_timings = hdmi_display_check_timing,
651 .set_timings = hdmi_display_set_timing,
652 .get_timings = hdmi_display_get_timings,
654 .read_edid = hdmi_read_edid,
656 .audio_enable = hdmi_audio_enable,
657 .audio_disable = hdmi_audio_disable,
658 .audio_start = hdmi_audio_start,
659 .audio_stop = hdmi_audio_stop,
660 .audio_supported = hdmi_audio_supported,
661 .audio_config = hdmi_audio_config,
664 static void hdmi_init_output(struct platform_device *pdev)
666 struct omap_dss_device *out = &hdmi.output;
668 out->dev = &pdev->dev;
669 out->id = OMAP_DSS_OUTPUT_HDMI;
670 out->output_type = OMAP_DISPLAY_TYPE_HDMI;
671 out->name = "hdmi.0";
672 out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
673 out->ops.hdmi = &hdmi_ops;
674 out->owner = THIS_MODULE;
676 omapdss_register_output(out);
679 static void __exit hdmi_uninit_output(struct platform_device *pdev)
681 struct omap_dss_device *out = &hdmi.output;
683 omapdss_unregister_output(out);
686 static int hdmi_probe_of(struct platform_device *pdev)
688 struct device_node *node = pdev->dev.of_node;
689 struct device_node *ep;
692 ep = omapdss_of_get_first_endpoint(node);
696 r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
708 /* HDMI HW IP initialisation */
709 static int omapdss_hdmihw_probe(struct platform_device *pdev)
716 mutex_init(&hdmi.lock);
718 if (pdev->dev.of_node) {
719 r = hdmi_probe_of(pdev);
724 r = hdmi_wp_init(pdev, &hdmi.wp);
728 r = hdmi_pll_init(pdev, &hdmi.pll);
732 r = hdmi_phy_init(pdev, &hdmi.phy);
736 r = hdmi5_core_init(pdev, &hdmi.core);
740 r = hdmi_get_clocks(pdev);
742 DSSERR("can't get clocks\n");
746 irq = platform_get_irq(pdev, 0);
748 DSSERR("platform_get_irq failed\n");
752 r = devm_request_threaded_irq(&pdev->dev, irq,
753 NULL, hdmi_irq_handler,
754 IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
756 DSSERR("HDMI IRQ request failed\n");
760 pm_runtime_enable(&pdev->dev);
762 hdmi_init_output(pdev);
764 dss_debugfs_create_file("hdmi", hdmi_dump_regs);
769 static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
771 hdmi_uninit_output(pdev);
773 pm_runtime_disable(&pdev->dev);
778 static int hdmi_runtime_suspend(struct device *dev)
780 clk_disable_unprepare(hdmi.sys_clk);
787 static int hdmi_runtime_resume(struct device *dev)
791 r = dispc_runtime_get();
795 clk_prepare_enable(hdmi.sys_clk);
800 static const struct dev_pm_ops hdmi_pm_ops = {
801 .runtime_suspend = hdmi_runtime_suspend,
802 .runtime_resume = hdmi_runtime_resume,
805 static const struct of_device_id hdmi_of_match[] = {
806 { .compatible = "ti,omap5-hdmi", },
810 static struct platform_driver omapdss_hdmihw_driver = {
811 .probe = omapdss_hdmihw_probe,
812 .remove = __exit_p(omapdss_hdmihw_remove),
814 .name = "omapdss_hdmi5",
815 .owner = THIS_MODULE,
817 .of_match_table = hdmi_of_match,
821 int __init hdmi5_init_platform_driver(void)
823 return platform_driver_register(&omapdss_hdmihw_driver);
826 void __exit hdmi5_uninit_platform_driver(void)
828 platform_driver_unregister(&omapdss_hdmihw_driver);