2 * Copyright (C) 2012 Samsung Electronics
4 * Author: Donghwa Lee <dh09.lee@samsung.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef _EXYNOS_EDP_LOWLEVEL_H
10 #define _EXYNOS_EDP_LOWLEVEL_H
12 void exynos_dp_enable_video_bist(unsigned int enable);
13 void exynos_dp_enable_video_mute(unsigned int enable);
14 void exynos_dp_reset(void);
15 void exynos_dp_enable_sw_func(unsigned int enable);
16 unsigned int exynos_dp_set_analog_power_down(unsigned int block, u32 enable);
17 unsigned int exynos_dp_get_pll_lock_status(void);
18 int exynos_dp_init_analog_func(void);
19 void exynos_dp_init_hpd(void);
20 void exynos_dp_init_aux(void);
21 void exynos_dp_config_interrupt(void);
22 unsigned int exynos_dp_get_plug_in_status(void);
23 unsigned int exynos_dp_detect_hpd(void);
24 unsigned int exynos_dp_start_aux_transaction(void);
25 unsigned int exynos_dp_write_byte_to_dpcd(unsigned int reg_addr,
27 unsigned int exynos_dp_read_byte_from_dpcd(unsigned int reg_addr,
29 unsigned int exynos_dp_write_bytes_to_dpcd(unsigned int reg_addr,
31 unsigned char data[]);
32 unsigned int exynos_dp_read_bytes_from_dpcd( unsigned int reg_addr,
34 unsigned char data[]);
35 int exynos_dp_select_i2c_device( unsigned int device_addr,
36 unsigned int reg_addr);
37 int exynos_dp_read_byte_from_i2c(unsigned int device_addr,
38 unsigned int reg_addr, unsigned int *data);
39 int exynos_dp_read_bytes_from_i2c(unsigned int device_addr,
40 unsigned int reg_addr, unsigned int count,
41 unsigned char edid[]);
42 void exynos_dp_reset_macro(void);
43 void exynos_dp_set_link_bandwidth(unsigned char bwtype);
44 unsigned char exynos_dp_get_link_bandwidth(void);
45 void exynos_dp_set_lane_count(unsigned char count);
46 unsigned int exynos_dp_get_lane_count(void);
47 unsigned char exynos_dp_get_lanex_pre_emphasis(unsigned char lanecnt);
48 void exynos_dp_set_lane_pre_emphasis(unsigned int level,
49 unsigned char lanecnt);
50 void exynos_dp_set_lanex_pre_emphasis(unsigned char request_val,
51 unsigned char lanecnt);
52 void exynos_dp_set_training_pattern(unsigned int pattern);
53 void exynos_dp_enable_enhanced_mode(unsigned char enable);
54 void exynos_dp_enable_scrambling(unsigned int enable);
55 int exynos_dp_init_video(void);
56 void exynos_dp_config_video_slave_mode(struct edp_video_info *video_info);
57 void exynos_dp_set_video_color_format(struct edp_video_info *video_info);
58 int exynos_dp_config_video_bist(struct edp_device_info *edp_info);
59 unsigned int exynos_dp_is_slave_video_stream_clock_on(void);
60 void exynos_dp_set_video_cr_mn(unsigned int type, unsigned int m_value,
61 unsigned int n_value);
62 void exynos_dp_set_video_timing_mode(unsigned int type);
63 void exynos_dp_enable_video_master(unsigned int enable);
64 void exynos_dp_start_video(void);
65 unsigned int exynos_dp_is_video_stream_on(void);
66 void exynos_dp_set_base_addr(void);
68 #endif /* _EXYNOS_DP_LOWLEVEL_H */