5 menu "Graphics support"
8 bool "Enable driver model support for LCD/video"
11 This enables driver model for LCD and video devices. These support
12 a bitmap display of various sizes and depths which can be drawn on
13 to display a command-line console or splash screen. Enabling this
14 option compiles in the video uclass and routes all LCD/video access
18 bool "Support 8-bit-per-pixel displays"
22 Support drawing text and bitmaps onto a 8-bit-per-pixel display.
23 Enabling this will include code to support this display. Without
24 this option, such displays will not be supported and console output
28 bool "Support 16-bit-per-pixel displays"
32 Support drawing text and bitmaps onto a 16-bit-per-pixel display.
33 Enabling this will include code to support this display. Without
34 this option, such displays will not be supported and console output
38 bool "Support 32-bit-per-pixel displays"
42 Support drawing text and bitmaps onto a 32-bit-per-pixel display.
43 Enabling this will include code to support this display. Without
44 this option, such displays will not be supported and console output
48 bool "Enable VESA video driver support"
51 Turn on this option to enable a very simple driver which uses vesa
52 to discover the video mode and then provides a frame buffer for use
53 by U-Boot. This can in principle be used with any platform that
54 supports PCI and video cards that support VESA BIOS Extension (VBE).
56 config FRAMEBUFFER_SET_VESA_MODE
57 bool "Set framebuffer graphics resolution"
60 Set VESA/native framebuffer mode (needed for bootsplash and graphical
64 prompt "framebuffer graphics resolution"
65 default FRAMEBUFFER_VESA_MODE_117
66 depends on FRAMEBUFFER_SET_VESA_MODE
68 This option sets the resolution used for the U-Boot framebuffer (and
71 config FRAMEBUFFER_VESA_MODE_100
72 bool "640x400 256-color"
74 config FRAMEBUFFER_VESA_MODE_101
75 bool "640x480 256-color"
77 config FRAMEBUFFER_VESA_MODE_102
78 bool "800x600 16-color"
80 config FRAMEBUFFER_VESA_MODE_103
81 bool "800x600 256-color"
83 config FRAMEBUFFER_VESA_MODE_104
84 bool "1024x768 16-color"
86 config FRAMEBUFFER_VESA_MODE_105
87 bool "1024x768 256-color"
89 config FRAMEBUFFER_VESA_MODE_106
90 bool "1280x1024 16-color"
92 config FRAMEBUFFER_VESA_MODE_107
93 bool "1280x1024 256-color"
95 config FRAMEBUFFER_VESA_MODE_108
98 config FRAMEBUFFER_VESA_MODE_109
101 config FRAMEBUFFER_VESA_MODE_10A
104 config FRAMEBUFFER_VESA_MODE_10B
107 config FRAMEBUFFER_VESA_MODE_10C
110 config FRAMEBUFFER_VESA_MODE_10D
111 bool "320x200 32k-color (1:5:5:5)"
113 config FRAMEBUFFER_VESA_MODE_10E
114 bool "320x200 64k-color (5:6:5)"
116 config FRAMEBUFFER_VESA_MODE_10F
117 bool "320x200 16.8M-color (8:8:8)"
119 config FRAMEBUFFER_VESA_MODE_110
120 bool "640x480 32k-color (1:5:5:5)"
122 config FRAMEBUFFER_VESA_MODE_111
123 bool "640x480 64k-color (5:6:5)"
125 config FRAMEBUFFER_VESA_MODE_112
126 bool "640x480 16.8M-color (8:8:8)"
128 config FRAMEBUFFER_VESA_MODE_113
129 bool "800x600 32k-color (1:5:5:5)"
131 config FRAMEBUFFER_VESA_MODE_114
132 bool "800x600 64k-color (5:6:5)"
134 config FRAMEBUFFER_VESA_MODE_115
135 bool "800x600 16.8M-color (8:8:8)"
137 config FRAMEBUFFER_VESA_MODE_116
138 bool "1024x768 32k-color (1:5:5:5)"
140 config FRAMEBUFFER_VESA_MODE_117
141 bool "1024x768 64k-color (5:6:5)"
143 config FRAMEBUFFER_VESA_MODE_118
144 bool "1024x768 16.8M-color (8:8:8)"
146 config FRAMEBUFFER_VESA_MODE_119
147 bool "1280x1024 32k-color (1:5:5:5)"
149 config FRAMEBUFFER_VESA_MODE_11A
150 bool "1280x1024 64k-color (5:6:5)"
152 config FRAMEBUFFER_VESA_MODE_11B
153 bool "1280x1024 16.8M-color (8:8:8)"
155 config FRAMEBUFFER_VESA_MODE_USER
156 bool "Manually select VESA mode"
160 # Map the config names to an integer (KB).
161 config FRAMEBUFFER_VESA_MODE
162 prompt "VESA mode" if FRAMEBUFFER_VESA_MODE_USER
164 default 0x100 if FRAMEBUFFER_VESA_MODE_100
165 default 0x101 if FRAMEBUFFER_VESA_MODE_101
166 default 0x102 if FRAMEBUFFER_VESA_MODE_102
167 default 0x103 if FRAMEBUFFER_VESA_MODE_103
168 default 0x104 if FRAMEBUFFER_VESA_MODE_104
169 default 0x105 if FRAMEBUFFER_VESA_MODE_105
170 default 0x106 if FRAMEBUFFER_VESA_MODE_106
171 default 0x107 if FRAMEBUFFER_VESA_MODE_107
172 default 0x108 if FRAMEBUFFER_VESA_MODE_108
173 default 0x109 if FRAMEBUFFER_VESA_MODE_109
174 default 0x10A if FRAMEBUFFER_VESA_MODE_10A
175 default 0x10B if FRAMEBUFFER_VESA_MODE_10B
176 default 0x10C if FRAMEBUFFER_VESA_MODE_10C
177 default 0x10D if FRAMEBUFFER_VESA_MODE_10D
178 default 0x10E if FRAMEBUFFER_VESA_MODE_10E
179 default 0x10F if FRAMEBUFFER_VESA_MODE_10F
180 default 0x110 if FRAMEBUFFER_VESA_MODE_110
181 default 0x111 if FRAMEBUFFER_VESA_MODE_111
182 default 0x112 if FRAMEBUFFER_VESA_MODE_112
183 default 0x113 if FRAMEBUFFER_VESA_MODE_113
184 default 0x114 if FRAMEBUFFER_VESA_MODE_114
185 default 0x115 if FRAMEBUFFER_VESA_MODE_115
186 default 0x116 if FRAMEBUFFER_VESA_MODE_116
187 default 0x117 if FRAMEBUFFER_VESA_MODE_117
188 default 0x118 if FRAMEBUFFER_VESA_MODE_118
189 default 0x119 if FRAMEBUFFER_VESA_MODE_119
190 default 0x11A if FRAMEBUFFER_VESA_MODE_11A
191 default 0x11B if FRAMEBUFFER_VESA_MODE_11B
192 default 0x117 if FRAMEBUFFER_VESA_MODE_USER
194 config VIDEO_LCD_ANX9804
195 bool "ANX9804 bridge chip"
198 Support for the ANX9804 bridge chip, which can take pixel data coming
199 from a parallel LCD interface and translate it on the fy into a DP
200 interface for driving eDP TFT displays. It uses I2C for configuration.
202 config VIDEO_LCD_SSD2828
203 bool "SSD2828 bridge chip"
206 Support for the SSD2828 bridge chip, which can take pixel data coming
207 from a parallel LCD interface and translate it on the fly into MIPI DSI
208 interface for driving a MIPI compatible LCD panel. It uses SPI for
211 config VIDEO_LCD_SSD2828_TX_CLK
212 int "SSD2828 TX_CLK frequency (in MHz)"
213 depends on VIDEO_LCD_SSD2828
216 The frequency of the crystal, which is clocking SSD2828. It may be
217 anything in the 8MHz-30MHz range and the exact value should be
218 retrieved from the board schematics. Or in the case of Allwinner
219 hardware, it can be usually found as 'lcd_xtal_freq' variable in
220 FEX files. It can be also set to 0 for selecting PCLK from the
221 parallel LCD interface instead of TX_CLK as the PLL clock source.
223 config VIDEO_LCD_SSD2828_RESET
224 string "RESET pin of SSD2828"
225 depends on VIDEO_LCD_SSD2828
228 The reset pin of SSD2828 chip. This takes a string in the format
229 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
231 config VIDEO_LCD_HITACHI_TX18D42VM
232 bool "Hitachi tx18d42vm LVDS LCD panel support"
236 Support for Hitachi tx18d42vm LVDS LCD panels, these panels have a
237 lcd controller which needs to be initialized over SPI, once that is
238 done they work like a regular LVDS panel.
240 config VIDEO_LCD_SPI_CS
241 string "SPI CS pin for LCD related config job"
242 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
245 This is one of the SPI communication pins, involved in setting up a
246 working LCD configuration. The exact role of SPI may differ for
247 different hardware setups. The option takes a string in the format
248 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
250 config VIDEO_LCD_SPI_SCLK
251 string "SPI SCLK pin for LCD related config job"
252 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
255 This is one of the SPI communication pins, involved in setting up a
256 working LCD configuration. The exact role of SPI may differ for
257 different hardware setups. The option takes a string in the format
258 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
260 config VIDEO_LCD_SPI_MOSI
261 string "SPI MOSI pin for LCD related config job"
262 depends on VIDEO_LCD_SSD2828 || VIDEO_LCD_HITACHI_TX18D42VM
265 This is one of the SPI communication pins, involved in setting up a
266 working LCD configuration. The exact role of SPI may differ for
267 different hardware setups. The option takes a string in the format
268 understood by 'name_to_gpio' function, e.g. PH1 for pin 1 of port H.
270 config VIDEO_LCD_SPI_MISO
271 string "SPI MISO pin for LCD related config job (optional)"
272 depends on VIDEO_LCD_SSD2828
275 This is one of the SPI communication pins, involved in setting up a
276 working LCD configuration. The exact role of SPI may differ for
277 different hardware setups. If wired up, this pin may provide additional
278 useful functionality. Such as bi-directional communication with the
279 hardware and LCD panel id retrieval (if the panel can report it). The
280 option takes a string in the format understood by 'name_to_gpio'
281 function, e.g. PH1 for pin 1 of port H.
284 bool "Enable DisplayPort support"
286 eDP (Embedded DisplayPort) is a standard widely used in laptops
287 to drive LCD panels. This framework provides support for enabling
288 these displays where supported by the video hardware.
290 config VIDEO_TEGRA124
291 bool "Enable video support on Tegra124"
293 Tegra124 supports many video output options including eDP and
294 HDMI. At present only eDP is supported by U-Boot. This option
295 enables this support which can be used on devices which
296 have an eDP display connected.
298 source "drivers/video/bridge/Kconfig"