3 * Gerry Hamel, geh@ti.com, Texas Instruments
6 * linux/drivers/usb/device/bi/omap.c
7 * TI OMAP1510 USB bus interface driver
9 * Author: MontaVista Software, Inc.
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 #ifdef CONFIG_OMAP_SX1
36 #include "usbdcore_omap1510.h"
37 #include "usbdcore_ep0.h"
40 #define UDC_INIT_MDELAY 80 /* Device settle delay */
41 #define UDC_MAX_ENDPOINTS 31 /* Number of endpoints on this UDC */
43 /* Some kind of debugging output... */
46 #define UDCDBGA(fmt,args...)
47 #else /* The bugs still exists... */
48 #define UDCDBG(str) serial_printf("[%s] %s:%d: " str "\n", __FILE__,__FUNCTION__,__LINE__)
49 #define UDCDBGA(fmt,args...) serial_printf("[%s] %s:%d: " fmt "\n", __FILE__,__FUNCTION__,__LINE__, ##args)
55 #else /* The bugs still exists... */
56 #define UDCREG(name) serial_printf("%s():%d: %s[%08x]=%.4x\n",__FUNCTION__,__LINE__, (#name), name, inw(name)) /* For 16-bit regs */
57 #define UDCREGL(name) serial_printf("%s():%d: %s[%08x]=%.8x\n",__FUNCTION__,__LINE__, (#name), name, inl(name)) /* For 32-bit regs */
61 static struct urb *ep0_urb = NULL;
63 static struct usb_device_instance *udc_device; /* Used in interrupt handler */
64 static u16 udc_devstat = 0; /* UDC status (DEVSTAT) */
65 static u32 udc_interrupts = 0;
67 static void udc_stall_ep (unsigned int ep_addr);
70 static struct usb_endpoint_instance *omap1510_find_ep (int ep)
74 for (i = 0; i < udc_device->bus->max_endpoints; i++) {
75 if (udc_device->bus->endpoint_array[i].endpoint_address == ep)
76 return &udc_device->bus->endpoint_array[i];
81 /* ************************************************************************** */
86 * omap1510_prepare_endpoint_for_rx
88 * This function implements TRM Figure 14-11.
90 * The endpoint to prepare for transfer is specified as a physical endpoint
91 * number. For OUT (rx) endpoints 1 through 15, the corresponding endpoint
92 * configuration register is checked to see if the endpoint is ISO or not.
93 * If the OUT endpoint is valid and is non-ISO then its FIFO is enabled.
94 * No action is taken for endpoint 0 or for IN (tx) endpoints 16 through 30.
96 static void omap1510_prepare_endpoint_for_rx (int ep_addr)
98 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
100 UDCDBGA ("omap1510_prepare_endpoint %x", ep_addr);
101 if (((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT)) {
102 if ((inw (UDC_EP_RX (ep_num)) &
103 (UDC_EPn_RX_Valid | UDC_EPn_RX_Iso)) ==
105 /* rx endpoint is valid, non-ISO, so enable its FIFO */
106 outw (UDC_EP_Sel | ep_num, UDC_EP_NUM);
107 outw (UDC_Set_FIFO_En, UDC_CTRL);
108 outw (0, UDC_EP_NUM);
113 /* omap1510_configure_endpoints
115 * This function implements TRM Figure 14-10.
117 static void omap1510_configure_endpoints (struct usb_device_instance *device)
120 struct usb_bus_instance *bus;
121 struct usb_endpoint_instance *endpoint;
122 unsigned short ep_ptr;
123 unsigned short ep_size;
124 unsigned short ep_isoc;
125 unsigned short ep_doublebuffer;
133 /* There is a dedicated 2048 byte buffer for USB packets that may be
134 * arbitrarily partitioned among the endpoints on 8-byte boundaries.
135 * The first 8 bytes are reserved for receiving setup packets on
138 ep_ptr = 8; /* reserve the first 8 bytes for the setup fifo */
140 for (ep = 0; ep < bus->max_endpoints; ep++) {
141 endpoint = bus->endpoint_array + ep;
142 ep_addr = endpoint->endpoint_address;
143 if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
145 packet_size = endpoint->tx_packetSize;
146 attributes = endpoint->tx_attributes;
149 packet_size = endpoint->rcv_packetSize;
150 attributes = endpoint->rcv_attributes;
153 switch (packet_size) {
179 UDCDBGA ("ep 0x%02x has bad packet size %d",
180 ep_addr, packet_size);
186 switch (attributes & USB_ENDPOINT_XFERTYPE_MASK) {
187 case USB_ENDPOINT_XFER_CONTROL:
188 case USB_ENDPOINT_XFER_BULK:
189 case USB_ENDPOINT_XFER_INT:
191 /* A non-isochronous endpoint may optionally be
192 * double-buffered. For now we disable
197 if (packet_size > 64)
199 if (!ep || !ep_doublebuffer)
200 buffer_size = packet_size;
202 buffer_size = packet_size * 2;
204 case USB_ENDPOINT_XFER_ISOC:
205 /* Isochronous endpoints are always double-
206 * buffered, but the double-buffering bit
207 * in the endpoint configuration register
208 * becomes the msb of the endpoint size so we
209 * set the double-buffering flag to zero.
213 buffer_size = packet_size * 2;
217 /* check to see if our packet buffer RAM is exhausted */
218 if ((ep_ptr + buffer_size) > 2048) {
219 UDCDBGA ("out of packet RAM for ep 0x%02x buf size %d", ep_addr, buffer_size);
220 buffer_size = packet_size = 0;
223 /* force a default configuration for endpoint 0 since it is
226 if (!ep && ((packet_size < 8) || (packet_size > 64))) {
227 buffer_size = packet_size = 64;
232 /* configure endpoint 0 */
233 outw ((ep_size << 12) | (ep_ptr >> 3), UDC_EP0);
234 /*UDCDBGA("ep 0 buffer offset 0x%03x packet size 0x%03x", */
235 /* ep_ptr, packet_size); */
236 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
239 outw ((1 << 15) | (ep_doublebuffer << 14) |
240 (ep_size << 12) | (ep_isoc << 11) |
243 USB_ENDPOINT_NUMBER_MASK));
244 UDCDBGA ("IN ep %d buffer offset 0x%03x"
245 " packet size 0x%03x",
246 ep_addr & USB_ENDPOINT_NUMBER_MASK,
247 ep_ptr, packet_size);
251 USB_ENDPOINT_NUMBER_MASK));
256 outw ((1 << 15) | (ep_doublebuffer << 14) |
257 (ep_size << 12) | (ep_isoc << 11) |
260 USB_ENDPOINT_NUMBER_MASK));
261 UDCDBGA ("OUT ep %d buffer offset 0x%03x"
262 " packet size 0x%03x",
263 ep_addr & USB_ENDPOINT_NUMBER_MASK,
264 ep_ptr, packet_size);
268 USB_ENDPOINT_NUMBER_MASK));
271 ep_ptr += buffer_size;
275 /* omap1510_deconfigure_device
277 * This function balances omap1510_configure_device.
279 static void omap1510_deconfigure_device (void)
283 UDCDBG ("clear Cfg_Lock");
284 outw (inw (UDC_SYSCON1) & ~UDC_Cfg_Lock, UDC_SYSCON1);
285 UDCREG (UDC_SYSCON1);
287 /* deconfigure all endpoints */
288 for (epnum = 1; epnum <= 15; epnum++) {
289 outw (0, UDC_EP_RX (epnum));
290 outw (0, UDC_EP_TX (epnum));
294 /* omap1510_configure_device
296 * This function implements TRM Figure 14-9.
298 static void omap1510_configure_device (struct usb_device_instance *device)
300 omap1510_configure_endpoints (device);
303 /* Figure 14-9 indicates we should enable interrupts here, but we have
304 * other routines (udc_all_interrupts, udc_suspended_interrupts) to
308 UDCDBG ("set Cfg_Lock");
309 outw (inw (UDC_SYSCON1) | UDC_Cfg_Lock, UDC_SYSCON1);
310 UDCREG (UDC_SYSCON1);
313 /* omap1510_write_noniso_tx_fifo
315 * This function implements TRM Figure 14-30.
317 * If the endpoint has an active tx_urb, then the next packet of data from the
318 * URB is written to the tx FIFO. The total amount of data in the urb is given
319 * by urb->actual_length. The maximum amount of data that can be sent in any
320 * one packet is given by endpoint->tx_packetSize. The number of data bytes
321 * from this URB that have already been transmitted is given by endpoint->sent.
322 * endpoint->last is updated by this routine with the number of data bytes
323 * transmitted in this packet.
325 * In accordance with Figure 14-30, the EP_NUM register must already have been
326 * written with the value to select the appropriate tx FIFO before this routine
329 static void omap1510_write_noniso_tx_fifo (struct usb_endpoint_instance
332 struct urb *urb = endpoint->tx_urb;
335 unsigned int last, i;
337 UDCDBGA ("urb->buffer %p, buffer_length %d, actual_length %d",
338 urb->buffer, urb->buffer_length, urb->actual_length);
340 MIN (urb->actual_length - endpoint->sent,
341 endpoint->tx_packetSize))) {
342 u8 *cp = urb->buffer + endpoint->sent;
344 UDCDBGA ("endpoint->sent %d, tx_packetSize %d, last %d", endpoint->sent, endpoint->tx_packetSize, last);
346 if (((u32) cp & 1) == 0) { /* word aligned? */
347 outsw (UDC_DATA, cp, last >> 1);
348 } else { /* byte aligned. */
349 for (i = 0; i < (last >> 1); i++) {
350 u16 w = ((u16) cp[2 * i + 1] << 8) |
356 outb (*(cp + last - 1), UDC_DATA);
359 endpoint->last = last;
363 /* omap1510_read_noniso_rx_fifo
365 * This function implements TRM Figure 14-28.
367 * If the endpoint has an active rcv_urb, then the next packet of data is read
368 * from the rcv FIFO and written to rcv_urb->buffer at offset
369 * rcv_urb->actual_length to append the packet data to the data from any
370 * previous packets for this transfer. We assume that there is sufficient room
371 * left in the buffer to hold an entire packet of data.
373 * The return value is the number of bytes read from the FIFO for this packet.
375 * In accordance with Figure 14-28, the EP_NUM register must already have been
376 * written with the value to select the appropriate rcv FIFO before this routine
379 static int omap1510_read_noniso_rx_fifo (struct usb_endpoint_instance
382 struct urb *urb = endpoint->rcv_urb;
386 len = inw (UDC_RXFSTAT);
389 unsigned char *cp = urb->buffer + urb->actual_length;
391 insw (UDC_DATA, cp, len >> 1);
393 *(cp + len - 1) = inb (UDC_DATA);
399 /* omap1510_prepare_for_control_write_status
401 * This function implements TRM Figure 14-17.
403 * We have to deal here with non-autodecoded control writes that haven't already
404 * been dealt with by ep0_recv_setup. The non-autodecoded standard control
405 * write requests are: set/clear endpoint feature, set configuration, set
406 * interface, and set descriptor. ep0_recv_setup handles set/clear requests for
407 * ENDPOINT_HALT by halting the endpoint for a set request and resetting the
408 * endpoint for a clear request. ep0_recv_setup returns an error for
409 * SET_DESCRIPTOR requests which causes them to be terminated with a stall by
410 * the setup handler. A SET_INTERFACE request is handled by ep0_recv_setup by
411 * generating a DEVICE_SET_INTERFACE event. This leaves only the
412 * SET_CONFIGURATION event for us to deal with here.
415 static void omap1510_prepare_for_control_write_status (struct urb *urb)
417 struct usb_device_request *request = &urb->device_request;;
419 /* check for a SET_CONFIGURATION request */
420 if (request->bRequest == USB_REQ_SET_CONFIGURATION) {
421 int configuration = le16_to_cpu (request->wValue) & 0xff;
422 unsigned short devstat = inw (UDC_DEVSTAT);
424 if ((devstat & (UDC_ADD | UDC_CFG)) == UDC_ADD) {
425 /* device is currently in ADDRESSED state */
427 /* Assume the specified non-zero configuration
428 * value is valid and switch to the CONFIGURED
431 outw (UDC_Dev_Cfg, UDC_SYSCON2);
433 } else if ((devstat & UDC_CFG) == UDC_CFG) {
434 /* device is currently in CONFIGURED state */
435 if (!configuration) {
436 /* Switch to ADDRESSED state. */
437 outw (UDC_Clr_Cfg, UDC_SYSCON2);
442 /* select EP0 tx FIFO */
443 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
444 /* clear endpoint (no data bytes in status stage) */
445 outw (UDC_Clr_EP, UDC_CTRL);
446 /* enable the EP0 tx FIFO */
447 outw (UDC_Set_FIFO_En, UDC_CTRL);
448 /* deselect the endpoint */
449 outw (UDC_EP_Dir, UDC_EP_NUM);
452 /* udc_state_transition_up
453 * udc_state_transition_down
455 * Helper functions to implement device state changes. The device states and
456 * the events that transition between them are:
461 * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET
467 * DEVICE_RESET DEVICE_POWER_INTERRUPTION
473 * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET
479 * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED
484 * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
485 * to STATE_CONFIGURED) from the specified initial state to the specified final
486 * state, passing through each intermediate state on the way. If the initial
487 * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
488 * no state transitions will take place.
490 * udc_state_transition_down transitions down (in the direction from
491 * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
492 * specified final state, passing through each intermediate state on the way.
493 * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
494 * state, then no state transitions will take place.
496 * These functions must only be called with interrupts disabled.
498 static void udc_state_transition_up (usb_device_state_t initial,
499 usb_device_state_t final)
501 if (initial < final) {
504 usbd_device_event_irq (udc_device,
505 DEVICE_HUB_CONFIGURED, 0);
506 if (final == STATE_POWERED)
509 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
510 if (final == STATE_DEFAULT)
513 usbd_device_event_irq (udc_device,
514 DEVICE_ADDRESS_ASSIGNED, 0);
515 if (final == STATE_ADDRESSED)
517 case STATE_ADDRESSED:
518 usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
520 case STATE_CONFIGURED:
528 static void udc_state_transition_down (usb_device_state_t initial,
529 usb_device_state_t final)
531 if (initial > final) {
533 case STATE_CONFIGURED:
534 usbd_device_event_irq (udc_device, DEVICE_DE_CONFIGURED, 0);
535 if (final == STATE_ADDRESSED)
537 case STATE_ADDRESSED:
538 usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
539 if (final == STATE_DEFAULT)
542 usbd_device_event_irq (udc_device, DEVICE_POWER_INTERRUPTION, 0);
543 if (final == STATE_POWERED)
546 usbd_device_event_irq (udc_device, DEVICE_HUB_RESET, 0);
555 /* Handle all device state changes.
556 * This function implements TRM Figure 14-21.
558 static void omap1510_udc_state_changed (void)
561 u16 devstat = inw (UDC_DEVSTAT);
563 UDCDBGA ("state changed, devstat %x, old %x", devstat, udc_devstat);
565 bits = devstat ^ udc_devstat;
567 if (bits & UDC_ATT) {
568 if (devstat & UDC_ATT) {
569 UDCDBG ("device attached and powered");
570 udc_state_transition_up (udc_device->device_state, STATE_POWERED);
572 UDCDBG ("device detached or unpowered");
573 udc_state_transition_down (udc_device->device_state, STATE_ATTACHED);
576 if (bits & UDC_USB_Reset) {
577 if (devstat & UDC_USB_Reset) {
578 UDCDBG ("device reset in progess");
579 udc_state_transition_down (udc_device->device_state, STATE_POWERED);
581 UDCDBG ("device reset completed");
584 if (bits & UDC_DEF) {
585 if (devstat & UDC_DEF) {
586 UDCDBG ("device entering default state");
587 udc_state_transition_up (udc_device->device_state, STATE_DEFAULT);
589 UDCDBG ("device leaving default state");
590 udc_state_transition_down (udc_device->device_state, STATE_POWERED);
593 if (bits & UDC_SUS) {
594 if (devstat & UDC_SUS) {
595 UDCDBG ("entering suspended state");
596 usbd_device_event_irq (udc_device, DEVICE_BUS_INACTIVE, 0);
598 UDCDBG ("leaving suspended state");
599 usbd_device_event_irq (udc_device, DEVICE_BUS_ACTIVITY, 0);
602 if (bits & UDC_R_WK_OK) {
603 UDCDBGA ("remote wakeup %s", (devstat & UDC_R_WK_OK)
604 ? "enabled" : "disabled");
606 if (bits & UDC_ADD) {
607 if (devstat & UDC_ADD) {
608 UDCDBG ("default -> addressed");
609 udc_state_transition_up (udc_device->device_state, STATE_ADDRESSED);
611 UDCDBG ("addressed -> default");
612 udc_state_transition_down (udc_device->device_state, STATE_DEFAULT);
615 if (bits & UDC_CFG) {
616 if (devstat & UDC_CFG) {
617 UDCDBG ("device configured");
618 /* The ep0_recv_setup function generates the
619 * DEVICE_CONFIGURED event when a
620 * USB_REQ_SET_CONFIGURATION setup packet is
621 * received, so we should already be in the
622 * state STATE_CONFIGURED.
624 udc_state_transition_up (udc_device->device_state, STATE_CONFIGURED);
626 UDCDBG ("device deconfigured");
627 udc_state_transition_down (udc_device->device_state, STATE_ADDRESSED);
632 /* Clear interrupt source */
633 outw (UDC_DS_Chg, UDC_IRQ_SRC);
635 /* Save current DEVSTAT */
636 udc_devstat = devstat;
639 /* Handle SETUP USB interrupt.
640 * This function implements TRM Figure 14-14.
642 static void omap1510_udc_setup (struct usb_endpoint_instance *endpoint)
644 UDCDBG ("-> Entering device setup");
647 const int setup_pktsize = 8;
648 unsigned char *datap =
649 (unsigned char *) &ep0_urb->device_request;
651 /* Gain access to EP 0 setup FIFO */
652 outw (UDC_Setup_Sel, UDC_EP_NUM);
654 /* Read control request data */
655 insb (UDC_DATA, datap, setup_pktsize);
657 UDCDBGA ("EP0 setup read [%x %x %x %x %x %x %x %x]",
658 *(datap + 0), *(datap + 1), *(datap + 2),
659 *(datap + 3), *(datap + 4), *(datap + 5),
660 *(datap + 6), *(datap + 7));
662 /* Reset EP0 setup FIFO */
663 outw (0, UDC_EP_NUM);
664 } while (inw (UDC_IRQ_SRC) & UDC_Setup);
666 /* Try to process setup packet */
667 if (ep0_recv_setup (ep0_urb)) {
668 /* Not a setup packet, stall next EP0 transaction */
670 UDCDBG ("can't parse setup packet, still waiting for setup");
674 /* Check direction */
675 if ((ep0_urb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
676 == USB_REQ_HOST2DEVICE) {
677 UDCDBG ("control write on EP0");
678 if (le16_to_cpu (ep0_urb->device_request.wLength)) {
679 /* We don't support control write data stages.
680 * The only standard control write request with a data
681 * stage is SET_DESCRIPTOR, and ep0_recv_setup doesn't
682 * support that so we just stall those requests. A
683 * function driver might support a non-standard
684 * write request with a data stage, but it isn't
685 * obvious what we would do with the data if we read it
686 * so we'll just stall it. It seems like the API isn't
690 /* Here is what we would do if we did support control
693 ep0_urb->actual_length = 0;
694 outw (0, UDC_EP_NUM);
695 /* enable the EP0 rx FIFO */
696 outw (UDC_Set_FIFO_En, UDC_CTRL);
698 /* Stall this request */
699 UDCDBG ("Stalling unsupported EP0 control write data "
704 omap1510_prepare_for_control_write_status (ep0_urb);
707 UDCDBG ("control read on EP0");
708 /* The ep0_recv_setup function has already placed our response
709 * packet data in ep0_urb->buffer and the packet length in
710 * ep0_urb->actual_length.
712 endpoint->tx_urb = ep0_urb;
714 /* select the EP0 tx FIFO */
715 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
716 /* Write packet data to the FIFO. omap1510_write_noniso_tx_fifo
717 * will update endpoint->last with the number of bytes written
720 omap1510_write_noniso_tx_fifo (endpoint);
721 /* enable the FIFO to start the packet transmission */
722 outw (UDC_Set_FIFO_En, UDC_CTRL);
723 /* deselect the EP0 tx FIFO */
724 outw (UDC_EP_Dir, UDC_EP_NUM);
727 UDCDBG ("<- Leaving device setup");
730 /* Handle endpoint 0 RX interrupt
731 * This routine implements TRM Figure 14-16.
733 static void omap1510_udc_ep0_rx (struct usb_endpoint_instance *endpoint)
735 unsigned short status;
737 UDCDBG ("RX on EP0");
738 /* select EP0 rx FIFO */
739 outw (UDC_EP_Sel, UDC_EP_NUM);
741 status = inw (UDC_STAT_FLG);
743 if (status & UDC_ACK) {
744 /* Check direction */
745 if ((ep0_urb->device_request.bmRequestType
746 & USB_REQ_DIRECTION_MASK) == USB_REQ_HOST2DEVICE) {
747 /* This rx interrupt must be for a control write data
750 * We don't support control write data stages.
751 * We should never end up here.
754 /* clear the EP0 rx FIFO */
755 outw (UDC_Clr_EP, UDC_CTRL);
757 /* deselect the EP0 rx FIFO */
758 outw (0, UDC_EP_NUM);
760 UDCDBG ("Stalling unexpected EP0 control write "
761 "data stage packet");
764 /* This rx interrupt must be for a control read status
767 UDCDBG ("ACK on EP0 control read status stage packet");
768 /* deselect EP0 rx FIFO */
769 outw (0, UDC_EP_NUM);
771 } else if (status & UDC_STALL) {
772 UDCDBG ("EP0 stall during RX");
773 /* deselect EP0 rx FIFO */
774 outw (0, UDC_EP_NUM);
776 /* deselect EP0 rx FIFO */
777 outw (0, UDC_EP_NUM);
781 /* Handle endpoint 0 TX interrupt
782 * This routine implements TRM Figure 14-18.
784 static void omap1510_udc_ep0_tx (struct usb_endpoint_instance *endpoint)
786 unsigned short status;
787 struct usb_device_request *request = &ep0_urb->device_request;
789 UDCDBG ("TX on EP0");
790 /* select EP0 TX FIFO */
791 outw (UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
793 status = inw (UDC_STAT_FLG);
794 if (status & UDC_ACK) {
795 /* Check direction */
796 if ((request->bmRequestType & USB_REQ_DIRECTION_MASK) ==
797 USB_REQ_HOST2DEVICE) {
798 /* This tx interrupt must be for a control write status
801 UDCDBG ("ACK on EP0 control write status stage packet");
802 /* deselect EP0 TX FIFO */
803 outw (UDC_EP_Dir, UDC_EP_NUM);
805 /* This tx interrupt must be for a control read data
808 int wLength = le16_to_cpu (request->wLength);
810 /* Update our count of bytes sent so far in this
813 endpoint->sent += endpoint->last;
815 /* We are finished with this transfer if we have sent
816 * all of the bytes in our tx urb (urb->actual_length)
817 * unless we need a zero-length terminating packet. We
818 * need a zero-length terminating packet if we returned
819 * fewer bytes than were requested (wLength) by the host,
820 * and the number of bytes we returned is an exact
821 * multiple of the packet size endpoint->tx_packetSize.
823 if ((endpoint->sent == ep0_urb->actual_length)
824 && ((ep0_urb->actual_length == wLength)
825 || (endpoint->last !=
826 endpoint->tx_packetSize))) {
827 /* Done with control read data stage. */
828 UDCDBG ("control read data stage complete");
829 /* deselect EP0 TX FIFO */
830 outw (UDC_EP_Dir, UDC_EP_NUM);
831 /* select EP0 RX FIFO to prepare for control
834 outw (UDC_EP_Sel, UDC_EP_NUM);
835 /* clear the EP0 RX FIFO */
836 outw (UDC_Clr_EP, UDC_CTRL);
837 /* enable the EP0 RX FIFO */
838 outw (UDC_Set_FIFO_En, UDC_CTRL);
839 /* deselect the EP0 RX FIFO */
840 outw (0, UDC_EP_NUM);
842 /* We still have another packet of data to send
843 * in this control read data stage or else we
844 * need a zero-length terminating packet.
846 UDCDBG ("ACK control read data stage packet");
847 omap1510_write_noniso_tx_fifo (endpoint);
848 /* enable the EP0 tx FIFO to start transmission */
849 outw (UDC_Set_FIFO_En, UDC_CTRL);
850 /* deselect EP0 TX FIFO */
851 outw (UDC_EP_Dir, UDC_EP_NUM);
854 } else if (status & UDC_STALL) {
855 UDCDBG ("EP0 stall during TX");
856 /* deselect EP0 TX FIFO */
857 outw (UDC_EP_Dir, UDC_EP_NUM);
859 /* deselect EP0 TX FIFO */
860 outw (UDC_EP_Dir, UDC_EP_NUM);
864 /* Handle RX transaction on non-ISO endpoint.
865 * This function implements TRM Figure 14-27.
866 * The ep argument is a physical endpoint number for a non-ISO OUT endpoint
867 * in the range 1 to 15.
869 static void omap1510_udc_epn_rx (int ep)
871 unsigned short status;
873 /* Check endpoint status */
874 status = inw (UDC_STAT_FLG);
876 if (status & UDC_ACK) {
878 struct usb_endpoint_instance *endpoint =
879 omap1510_find_ep (ep);
881 nbytes = omap1510_read_noniso_rx_fifo (endpoint);
882 usbd_rcv_complete (endpoint, nbytes, 0);
884 /* enable rx FIFO to prepare for next packet */
885 outw (UDC_Set_FIFO_En, UDC_CTRL);
886 } else if (status & UDC_STALL) {
887 UDCDBGA ("STALL on RX endpoint %d", ep);
888 } else if (status & UDC_NAK) {
889 UDCDBGA ("NAK on RX ep %d", ep);
891 serial_printf ("omap-bi: RX on ep %d with status %x", ep,
896 /* Handle TX transaction on non-ISO endpoint.
897 * This function implements TRM Figure 14-29.
898 * The ep argument is a physical endpoint number for a non-ISO IN endpoint
899 * in the range 16 to 30.
901 static void omap1510_udc_epn_tx (int ep)
903 unsigned short status;
905 /*serial_printf("omap1510_udc_epn_tx( %x )\n",ep); */
907 /* Check endpoint status */
908 status = inw (UDC_STAT_FLG);
910 if (status & UDC_ACK) {
911 struct usb_endpoint_instance *endpoint =
912 omap1510_find_ep (ep);
914 /* We need to transmit a terminating zero-length packet now if
915 * we have sent all of the data in this URB and the transfer
916 * size was an exact multiple of the packet size.
919 && (endpoint->last == endpoint->tx_packetSize)
920 && (endpoint->tx_urb->actual_length - endpoint->sent -
921 endpoint->last == 0)) {
922 /* Prepare to transmit a zero-length packet. */
923 endpoint->sent += endpoint->last;
924 /* write 0 bytes of data to FIFO */
925 omap1510_write_noniso_tx_fifo (endpoint);
926 /* enable tx FIFO to start transmission */
927 outw (UDC_Set_FIFO_En, UDC_CTRL);
928 } else if (endpoint->tx_urb
929 && endpoint->tx_urb->actual_length) {
930 /* retire the data that was just sent */
931 usbd_tx_complete (endpoint);
932 /* Check to see if we have more data ready to transmit
936 && endpoint->tx_urb->actual_length) {
937 /* write data to FIFO */
938 omap1510_write_noniso_tx_fifo (endpoint);
939 /* enable tx FIFO to start transmission */
940 outw (UDC_Set_FIFO_En, UDC_CTRL);
943 } else if (status & UDC_STALL) {
944 UDCDBGA ("STALL on TX endpoint %d", ep);
945 } else if (status & UDC_NAK) {
946 UDCDBGA ("NAK on TX endpoint %d", ep);
948 /*serial_printf("omap-bi: TX on ep %d with status %x\n", ep, status); */
954 -------------------------------------------------------------------------------
957 /* Handle general USB interrupts and dispatch according to type.
958 * This function implements TRM Figure 14-13.
960 void omap1510_udc_irq (void)
962 u16 irq_src = inw (UDC_IRQ_SRC);
965 if (!(irq_src & ~UDC_SOF_Flg)) /* ignore SOF interrupts ) */
968 UDCDBGA ("< IRQ #%d start >- %x", udc_interrupts, irq_src);
969 /*serial_printf("< IRQ #%d start >- %x\n", udc_interrupts, irq_src); */
971 if (irq_src & UDC_DS_Chg) {
972 /* Device status changed */
973 omap1510_udc_state_changed ();
976 if (irq_src & UDC_EP0_RX) {
977 /* Endpoint 0 receive */
978 outw (UDC_EP0_RX, UDC_IRQ_SRC); /* ack interrupt */
979 omap1510_udc_ep0_rx (udc_device->bus->endpoint_array + 0);
982 if (irq_src & UDC_EP0_TX) {
983 /* Endpoint 0 transmit */
984 outw (UDC_EP0_TX, UDC_IRQ_SRC); /* ack interrupt */
985 omap1510_udc_ep0_tx (udc_device->bus->endpoint_array + 0);
988 if (irq_src & UDC_Setup) {
990 omap1510_udc_setup (udc_device->bus->endpoint_array + 0);
994 /* serial_printf("unknown interrupt, IRQ_SRC %.4x\n", irq_src); */
995 UDCDBGA ("< IRQ #%d end >", udc_interrupts);
999 /* This function implements TRM Figure 14-26. */
1000 void omap1510_udc_noniso_irq (void)
1002 unsigned short epnum;
1003 unsigned short irq_src = inw (UDC_IRQ_SRC);
1006 if (!(irq_src & (UDC_EPn_RX | UDC_EPn_TX)))
1009 UDCDBGA ("non-ISO IRQ, IRQ_SRC %x", inw (UDC_IRQ_SRC));
1011 if (irq_src & UDC_EPn_RX) { /* Endpoint N OUT transaction */
1012 /* Determine the endpoint number for this interrupt */
1013 epnum = (inw (UDC_EPN_STAT) & 0x0f00) >> 8;
1014 UDCDBGA ("RX on ep %x", epnum);
1016 /* acknowledge interrupt */
1017 outw (UDC_EPn_RX, UDC_IRQ_SRC);
1020 /* select the endpoint FIFO */
1021 outw (UDC_EP_Sel | epnum, UDC_EP_NUM);
1023 omap1510_udc_epn_rx (epnum);
1025 /* deselect the endpoint FIFO */
1026 outw (epnum, UDC_EP_NUM);
1030 if (irq_src & UDC_EPn_TX) { /* Endpoint N IN transaction */
1031 /* Determine the endpoint number for this interrupt */
1032 epnum = (inw (UDC_EPN_STAT) & 0x000f) | USB_DIR_IN;
1033 UDCDBGA ("TX on ep %x", epnum);
1035 /* acknowledge interrupt */
1036 outw (UDC_EPn_TX, UDC_IRQ_SRC);
1039 /* select the endpoint FIFO */
1040 outw (UDC_EP_Sel | UDC_EP_Dir | epnum, UDC_EP_NUM);
1042 omap1510_udc_epn_tx (epnum);
1044 /* deselect the endpoint FIFO */
1045 outw (UDC_EP_Dir | epnum, UDC_EP_NUM);
1050 serial_printf (": unknown non-ISO interrupt, IRQ_SRC %.4x\n",
1055 -------------------------------------------------------------------------------
1060 * Start of public functions.
1063 /* Called to start packet transmission. */
1064 int udc_endpoint_write (struct usb_endpoint_instance *endpoint)
1066 unsigned short epnum =
1067 endpoint->endpoint_address & USB_ENDPOINT_NUMBER_MASK;
1069 UDCDBGA ("Starting transmit on ep %x", epnum);
1071 if (endpoint->tx_urb) {
1072 /* select the endpoint FIFO */
1073 outw (UDC_EP_Sel | UDC_EP_Dir | epnum, UDC_EP_NUM);
1074 /* write data to FIFO */
1075 omap1510_write_noniso_tx_fifo (endpoint);
1076 /* enable tx FIFO to start transmission */
1077 outw (UDC_Set_FIFO_En, UDC_CTRL);
1078 /* deselect the endpoint FIFO */
1079 outw (UDC_EP_Dir | epnum, UDC_EP_NUM);
1085 /* Start to initialize h/w stuff */
1093 /* Let the device settle down before we start */
1094 for (i = 0; i < UDC_INIT_MDELAY; i++) udelay(1000);
1098 UDCDBG ("starting");
1100 /* Check peripheral reset. Must be 1 to make sure
1101 MPU TIPB peripheral reset is inactive */
1102 UDCREG (ARM_RSTCT2);
1104 /* Set and check clock control.
1105 * We might ought to be using the clock control API to do
1106 * this instead of fiddling with the clock registers directly
1109 outw ((1 << 4) | (1 << 5), CLOCK_CTRL);
1110 UDCREG (CLOCK_CTRL);
1112 #ifdef CONFIG_OMAP1510
1113 /* This code was originally implemented for OMAP1510 and
1114 * therefore is only applicable for OMAP1510 boards. For
1115 * OMAP5912 or OMAP16xx the register APLL_CTRL does not
1116 * exist and DPLL_CTRL is already configured.
1119 /* Set and check APLL */
1120 outw (0x0008, APLL_CTRL);
1122 /* Set and check DPLL */
1123 outw (0x2210, DPLL_CTRL);
1126 /* Set and check SOFT
1127 * The below line of code has been changed to perform a
1128 * read-modify-write instead of a simple write for
1129 * configuring the SOFT_REQ register. This allows the code
1130 * to be compatible with OMAP5912 and OMAP16xx devices
1132 outw ((1 << 4) | (1 << 3) | 1 | (inw(SOFT_REQ)), SOFT_REQ);
1134 /* Short delay to wait for DPLL */
1137 /* Print banner with device revision */
1138 udc_rev = inw (UDC_REV) & 0xff;
1139 #ifdef CONFIG_OMAP1510
1140 printf ("USB: TI OMAP1510 USB function module rev %d.%d\n",
1141 udc_rev >> 4, udc_rev & 0xf);
1144 #ifdef CONFIG_OMAP1610
1145 printf ("USB: TI OMAP5912 USB function module rev %d.%d\n",
1146 udc_rev >> 4, udc_rev & 0xf);
1149 #ifdef CONFIG_OMAP_SX1
1150 i2c_read (0x32, 0x04, 1, &value, 1);
1152 i2c_write (0x32, 0x04, 1, &value, 1);
1154 i2c_read (0x32, 0x03, 1, &value, 1);
1156 i2c_write (0x32, 0x03, 1, &value, 1);
1158 gpio = inl(GPIO_PIN_CONTROL_REG);
1159 gpio |= 0x0002; /* A_IRDA_OFF */
1160 gpio |= 0x0800; /* A_SWITCH */
1161 gpio |= 0x8000; /* A_USB_ON */
1162 outl (gpio, GPIO_PIN_CONTROL_REG);
1164 gpio = inl(GPIO_DIR_CONTROL_REG);
1165 gpio &= ~0x0002; /* A_IRDA_OFF */
1166 gpio &= ~0x0800; /* A_SWITCH */
1167 gpio &= ~0x8000; /* A_USB_ON */
1168 outl (gpio, GPIO_DIR_CONTROL_REG);
1170 gpio = inl(GPIO_DATA_OUTPUT_REG);
1171 gpio |= 0x0002; /* A_IRDA_OFF */
1172 gpio &= ~0x0800; /* A_SWITCH */
1173 gpio &= ~0x8000; /* A_USB_ON */
1174 outl (gpio, GPIO_DATA_OUTPUT_REG);
1177 /* The VBUS_MODE bit selects whether VBUS detection is done via
1178 * software (1) or hardware (0). When software detection is
1179 * selected, VBUS_CTRL selects whether USB is not connected (0)
1182 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_MODE, FUNC_MUX_CTRL_0);
1183 outl (inl (FUNC_MUX_CTRL_0) & ~UDC_VBUS_CTRL, FUNC_MUX_CTRL_0);
1184 UDCREGL (FUNC_MUX_CTRL_0);
1187 * At this point, device is ready for configuration...
1190 UDCDBG ("disable USB interrupts");
1191 outw (0, UDC_IRQ_EN);
1192 UDCREG (UDC_IRQ_EN);
1194 UDCDBG ("disable USB DMA");
1195 outw (0, UDC_DMA_IRQ_EN);
1196 UDCREG (UDC_DMA_IRQ_EN);
1198 UDCDBG ("initialize SYSCON1");
1199 outw (UDC_Self_Pwr | UDC_Pullup_En, UDC_SYSCON1);
1200 UDCREG (UDC_SYSCON1);
1205 /* Stall endpoint */
1206 static void udc_stall_ep (unsigned int ep_addr)
1208 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1209 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1211 UDCDBGA ("stall ep_addr %d", ep_addr);
1214 * The OMAP TRM section 14.2.4.2 says we must check that the FIFO
1215 * is empty before halting the endpoint. The current implementation
1216 * doesn't check that the FIFO is empty.
1220 outw (UDC_Stall_Cmd, UDC_SYSCON2);
1221 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) {
1222 if (inw (UDC_EP_RX (ep_num)) & UDC_EPn_RX_Valid) {
1223 /* we have a valid rx endpoint, so halt it */
1224 outw (UDC_EP_Sel | ep_num, UDC_EP_NUM);
1225 outw (UDC_Set_Halt, UDC_CTRL);
1226 outw (ep_num, UDC_EP_NUM);
1229 if (inw (UDC_EP_TX (ep_num)) & UDC_EPn_TX_Valid) {
1230 /* we have a valid tx endpoint, so halt it */
1231 outw (UDC_EP_Sel | UDC_EP_Dir | ep_num, UDC_EP_NUM);
1232 outw (UDC_Set_Halt, UDC_CTRL);
1233 outw (ep_num, UDC_EP_NUM);
1238 /* Reset endpoint */
1240 static void udc_reset_ep (unsigned int ep_addr)
1242 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1243 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1245 UDCDBGA ("reset ep_addr %d", ep_addr);
1248 /* control endpoint 0 can't be reset */
1249 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT) {
1250 UDCDBGA ("UDC_EP_RX(%d) = 0x%04x", ep_num,
1251 inw (UDC_EP_RX (ep_num)));
1252 if (inw (UDC_EP_RX (ep_num)) & UDC_EPn_RX_Valid) {
1253 /* we have a valid rx endpoint, so reset it */
1254 outw (ep_num | UDC_EP_Sel, UDC_EP_NUM);
1255 outw (UDC_Reset_EP, UDC_CTRL);
1256 outw (ep_num, UDC_EP_NUM);
1257 UDCDBGA ("OUT endpoint %d reset", ep_num);
1260 UDCDBGA ("UDC_EP_TX(%d) = 0x%04x", ep_num,
1261 inw (UDC_EP_TX (ep_num)));
1262 /* Resetting of tx endpoints seems to be causing the USB function
1263 * module to fail, which causes problems when the driver is
1264 * uninstalled. We'll skip resetting tx endpoints for now until
1265 * we figure out what the problem is.
1268 if (inw (UDC_EP_TX (ep_num)) & UDC_EPn_TX_Valid) {
1269 /* we have a valid tx endpoint, so reset it */
1270 outw (ep_num | UDC_EP_Dir | UDC_EP_Sel, UDC_EP_NUM);
1271 outw (UDC_Reset_EP, UDC_CTRL);
1272 outw (ep_num | UDC_EP_Dir, UDC_EP_NUM);
1273 UDCDBGA ("IN endpoint %d reset", ep_num);
1280 /* ************************************************************************** */
1283 * udc_check_ep - check logical endpoint
1285 * Return physical endpoint number to use for this logical endpoint or zero if not valid.
1288 int udc_check_ep (int logical_endpoint, int packetsize)
1290 if ((logical_endpoint == 0x80) ||
1291 ((logical_endpoint & 0x8f) != logical_endpoint)) {
1295 switch (packetsize) {
1308 return EP_ADDR_TO_PHYS_EP (logical_endpoint);
1313 * udc_setup_ep - setup endpoint
1315 * Associate a physical endpoint with endpoint_instance
1317 void udc_setup_ep (struct usb_device_instance *device,
1318 unsigned int ep, struct usb_endpoint_instance *endpoint)
1320 UDCDBGA ("setting up endpoint addr %x", endpoint->endpoint_address);
1322 /* This routine gets called by bi_modinit for endpoint 0 and from
1323 * bi_config for all of the other endpoints. bi_config gets called
1324 * during the DEVICE_CREATE, DEVICE_CONFIGURED, and
1325 * DEVICE_SET_INTERFACE events. We need to reconfigure the OMAP packet
1326 * RAM after bi_config scans the selected device configuration and
1327 * initializes the endpoint structures, but before this routine enables
1328 * the OUT endpoint FIFOs. Since bi_config calls this routine in a
1329 * loop for endpoints 1 through UDC_MAX_ENDPOINTS, we reconfigure our
1330 * packet RAM here when ep==1.
1331 * I really hate to do this here, but it seems like the API exported
1332 * by the USB bus interface controller driver to the usbd-bi module
1333 * isn't quite right so there is no good place to do this.
1336 omap1510_deconfigure_device ();
1337 omap1510_configure_device (device);
1340 if (endpoint && (ep < UDC_MAX_ENDPOINTS)) {
1341 int ep_addr = endpoint->endpoint_address;
1344 /* nothing to do for endpoint 0 */
1345 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
1346 /* nothing to do for IN (tx) endpoints */
1347 } else { /* OUT (rx) endpoint */
1348 if (endpoint->rcv_packetSize) {
1349 /*struct urb* urb = &(urb_out_array[ep&0xFF]); */
1350 /*urb->endpoint = endpoint; */
1351 /*urb->device = device; */
1352 /*urb->buffer_length = sizeof(urb->buffer); */
1354 /*endpoint->rcv_urb = urb; */
1355 omap1510_prepare_endpoint_for_rx (ep_addr);
1362 * udc_disable_ep - disable endpoint
1365 * Disable specified endpoint
1368 void udc_disable_ep (unsigned int ep_addr)
1370 /*int ep_addr = PHYS_EP_TO_EP_ADDR(ep); */
1371 int ep_num = ep_addr & USB_ENDPOINT_NUMBER_MASK;
1372 struct usb_endpoint_instance *endpoint = omap1510_find_ep (ep_addr); /*udc_device->bus->endpoint_array + ep; */
1374 UDCDBGA ("disable ep_addr %d", ep_addr);
1377 /* nothing to do for endpoint 0 */ ;
1378 } else if ((ep_addr & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) {
1379 if (endpoint->tx_packetSize) {
1380 /* we have a valid tx endpoint */
1381 /*usbd_flush_tx(endpoint); */
1382 endpoint->tx_urb = NULL;
1385 if (endpoint->rcv_packetSize) {
1386 /* we have a valid rx endpoint */
1387 /*usbd_flush_rcv(endpoint); */
1388 endpoint->rcv_urb = NULL;
1394 /* ************************************************************************** */
1397 * udc_connected - is the USB cable connected
1399 * Return non-zero if cable is connected.
1402 int udc_connected (void)
1404 return ((inw (UDC_DEVSTAT) & UDC_ATT) == UDC_ATT);
1408 /* Turn on the USB connection by enabling the pullup resistor */
1409 void udc_connect (void)
1411 UDCDBG ("connect, enable Pullup");
1412 outl (0x00000018, FUNC_MUX_CTRL_D);
1415 /* Turn off the USB connection by disabling the pullup resistor */
1416 void udc_disconnect (void)
1418 UDCDBG ("disconnect, disable Pullup");
1419 outl (0x00000000, FUNC_MUX_CTRL_D);
1422 /* ************************************************************************** */
1426 * udc_disable_interrupts - disable interrupts
1427 * switch off interrupts
1430 void udc_disable_interrupts (struct usb_device_instance *device)
1432 UDCDBG ("disabling all interrupts");
1433 outw (0, UDC_IRQ_EN);
1437 /* ************************************************************************** */
1440 * udc_ep0_packetsize - return ep0 packetsize
1443 int udc_ep0_packetsize (void)
1445 return EP0_PACKETSIZE;
1449 /* Switch on the UDC */
1450 void udc_enable (struct usb_device_instance *device)
1452 UDCDBGA ("enable device %p, status %d", device, device->status);
1454 /* initialize driver state variables */
1457 /* Save the device structure pointer */
1458 udc_device = device;
1463 usbd_alloc_urb (udc_device,
1464 udc_device->bus->endpoint_array);
1466 serial_printf ("udc_enable: ep0_urb already allocated %p\n",
1470 UDCDBG ("Check clock status");
1471 UDCREG (STATUS_REQ);
1473 /* The VBUS_MODE bit selects whether VBUS detection is done via
1474 * software (1) or hardware (0). When software detection is
1475 * selected, VBUS_CTRL selects whether USB is not connected (0)
1478 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_CTRL | UDC_VBUS_MODE,
1480 UDCREGL (FUNC_MUX_CTRL_0);
1482 omap1510_configure_device (device);
1485 /* Switch off the UDC */
1486 void udc_disable (void)
1488 UDCDBG ("disable UDC");
1490 omap1510_deconfigure_device ();
1492 /* The VBUS_MODE bit selects whether VBUS detection is done via
1493 * software (1) or hardware (0). When software detection is
1494 * selected, VBUS_CTRL selects whether USB is not connected (0)
1497 outl (inl (FUNC_MUX_CTRL_0) | UDC_VBUS_MODE, FUNC_MUX_CTRL_0);
1498 outl (inl (FUNC_MUX_CTRL_0) & ~UDC_VBUS_CTRL, FUNC_MUX_CTRL_0);
1499 UDCREGL (FUNC_MUX_CTRL_0);
1503 /*usbd_dealloc_urb(ep0_urb); */
1507 /* Reset device pointer.
1508 * We ought to do this here to balance the initialization of udc_device
1509 * in udc_enable, but some of our other exported functions get called
1510 * by the bus interface driver after udc_disable, so we have to hang on
1511 * to the device pointer to avoid a null pointer dereference. */
1512 /* udc_device = NULL; */
1516 * udc_startup - allow udc code to do any additional startup
1518 void udc_startup_events (struct usb_device_instance *device)
1520 /* The DEVICE_INIT event puts the USB device in the state STATE_INIT. */
1521 usbd_device_event_irq (device, DEVICE_INIT, 0);
1523 /* The DEVICE_CREATE event puts the USB device in the state
1526 usbd_device_event_irq (device, DEVICE_CREATE, 0);
1528 /* Some USB controller driver implementations signal
1529 * DEVICE_HUB_CONFIGURED and DEVICE_RESET events here.
1530 * DEVICE_HUB_CONFIGURED causes a transition to the state STATE_POWERED,
1531 * and DEVICE_RESET causes a transition to the state STATE_DEFAULT.
1532 * The OMAP USB client controller has the capability to detect when the
1533 * USB cable is connected to a powered USB bus via the ATT bit in the
1534 * DEVSTAT register, so we will defer the DEVICE_HUB_CONFIGURED and
1535 * DEVICE_RESET events until later.
1538 udc_enable (device);
1542 * udc_irq - do pseudo interrupts
1546 /* Loop while we have interrupts.
1547 * If we don't do this, the input chain
1548 * polling delay is likely to miss
1551 while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
1552 /* Handle any new IRQs */
1553 omap1510_udc_irq ();
1554 omap1510_udc_noniso_irq ();
1559 void udc_set_nak(int epid)
1561 /* TODO: implement this functionality in omap1510 */
1564 void udc_unset_nak (int epid)
1566 /* TODO: implement this functionality in omap1510 */