2 * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
4 * Interrupt support is added. Now, it has been tested
5 * on ULI1575 chip and works well with USB keyboard.
8 * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
11 * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
13 * Note: Much of this code has been derived from Linux 2.4
14 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
15 * (C) Copyright 2000-2002 David Brownell
17 * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
18 * ebenard@eukrea.com - based on s3c24x0's driver
20 * See file CREDITS for list of people who contributed to this
23 * This program is free software; you can redistribute it and/or
24 * modify it under the terms of the GNU General Public License as
25 * published by the Free Software Foundation; either version 2 of
26 * the License, or (at your option) any later version.
28 * This program is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU General Public License for more details.
33 * You should have received a copy of the GNU General Public License
34 * along with this program; if not, write to the Free Software
35 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
41 * 1 - Read doc/README.generic_usb_ohci
42 * 2 - this driver is intended for use with USB Mass Storage Devices
43 * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
44 * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
45 * to activate workaround for bug #41 or this driver will NOT work!
50 #ifdef CONFIG_USB_OHCI_NEW
52 #include <asm/byteorder.h>
54 #if defined(CONFIG_PCI_OHCI)
56 #if !defined(CONFIG_PCI_OHCI_DEVNO)
57 #define CONFIG_PCI_OHCI_DEVNO 0
65 #ifdef CONFIG_AT91RM9200
66 #include <asm/arch/hardware.h> /* needed for AT91_USB_HOST_BASE */
69 #if defined(CONFIG_ARM920T) || \
70 defined(CONFIG_S3C2400) || \
71 defined(CONFIG_S3C2410) || \
72 defined(CONFIG_S3C6400) || \
73 defined(CONFIG_440EP) || \
74 defined(CONFIG_PCI_OHCI) || \
75 defined(CONFIG_MPC5200) || \
76 defined(CFG_OHCI_USE_NPS)
77 # define OHCI_USE_NPS /* force NoPowerSwitching mode */
80 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
83 #undef OHCI_FILL_TRACE
85 /* For initializing controller (mask in an HCFS mode too) */
86 #define OHCI_CONTROL_INIT \
87 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
90 * e.g. PCI controllers need this
92 #ifdef CFG_OHCI_SWAP_REG_ACCESS
93 # define readl(a) __swap_32(*((volatile u32 *)(a)))
94 # define writel(a, b) (*((volatile u32 *)(b)) = __swap_32((volatile u32)a))
96 # define readl(a) (*((volatile u32 *)(a)))
97 # define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
98 #endif /* CFG_OHCI_SWAP_REG_ACCESS */
100 #define min_t(type, x, y) \
101 ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
103 #ifdef CONFIG_PCI_OHCI
104 static struct pci_device_id ohci_pci_ids[] = {
105 {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
106 {0x1033, 0x0035}, /* NEC PCI OHCI module ids */
107 {0x1131, 0x1561}, /* Philips 1561 PCI OHCI module ids */
108 /* Please add supported PCI OHCI controller ids here */
113 #ifdef CONFIG_PCI_EHCI_DEVNO
114 static struct pci_device_id ehci_pci_ids[] = {
115 {0x1131, 0x1562}, /* Philips 1562 PCI EHCI module ids */
116 /* Please add supported PCI EHCI controller ids here */
122 #define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
124 #define dbg(format, arg...) do {} while (0)
126 #define err(format, arg...) printf("ERROR: " format "\n", ## arg)
128 #define info(format, arg...) printf("INFO: " format "\n", ## arg)
130 #define info(format, arg...) do {} while (0)
133 #ifdef CFG_OHCI_BE_CONTROLLER
134 # define m16_swap(x) cpu_to_be16(x)
135 # define m32_swap(x) cpu_to_be32(x)
137 # define m16_swap(x) cpu_to_le16(x)
138 # define m32_swap(x) cpu_to_le32(x)
139 #endif /* CFG_OHCI_BE_CONTROLLER */
143 /* this must be aligned to a 256 byte boundary */
144 struct ohci_hcca ghcca[1];
145 /* a pointer to the aligned storage */
146 struct ohci_hcca *phcca;
147 /* this allocates EDs for all possible endpoints */
148 struct ohci_device ohci_dev;
149 /* device which was disconnected */
150 struct usb_device *devgone;
152 static inline u32 roothub_a(struct ohci *hc)
153 { return readl(&hc->regs->roothub.a); }
154 static inline u32 roothub_b(struct ohci *hc)
155 { return readl(&hc->regs->roothub.b); }
156 static inline u32 roothub_status(struct ohci *hc)
157 { return readl(&hc->regs->roothub.status); }
158 static inline u32 roothub_portstatus(struct ohci *hc, int i)
159 { return readl(&hc->regs->roothub.portstatus[i]); }
161 /* forward declaration */
162 static int hc_interrupt(void);
163 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
164 void *buffer, int transfer_len,
165 struct devrequest *setup, urb_priv_t *urb,
168 /*-------------------------------------------------------------------------*
169 * URB support functions
170 *-------------------------------------------------------------------------*/
172 /* free HCD-private data associated with this URB */
174 static void urb_free_priv(urb_priv_t *urb)
180 last = urb->length - 1;
182 for (i = 0; i <= last; i++) {
193 /*-------------------------------------------------------------------------*/
196 static int sohci_get_current_frame_number(struct usb_device *dev);
198 /* debug| print the main components of an URB
199 * small: 0) header + data packets 1) just header */
201 static void pkt_print(urb_priv_t *purb, struct usb_device *dev,
202 unsigned long pipe, void *buffer, int transfer_len,
203 struct devrequest *setup, char *str, int small)
205 dbg("%s URB:[%4x] dev:%2lu,ep:%2lu-%c,type:%s,len:%d/%d stat:%#lx",
207 sohci_get_current_frame_number(dev),
208 usb_pipedevice(pipe),
209 usb_pipeendpoint(pipe),
210 usb_pipeout(pipe)? 'O': 'I',
211 usb_pipetype(pipe) < 2 ? \
212 (usb_pipeint(pipe)? "INTR": "ISOC"): \
213 (usb_pipecontrol(pipe)? "CTRL": "BULK"),
214 (purb ? purb->actual_length : 0),
215 transfer_len, dev->status);
216 #ifdef OHCI_VERBOSE_DEBUG
220 if (usb_pipecontrol(pipe)) {
221 printf(__FILE__ ": cmd(8):");
222 for (i = 0; i < 8 ; i++)
223 printf(" %02x", ((__u8 *) setup) [i]);
226 if (transfer_len > 0 && buffer) {
227 printf(__FILE__ ": data(%d/%d):",
228 (purb ? purb->actual_length : 0),
230 len = usb_pipeout(pipe)? transfer_len:
231 (purb ? purb->actual_length : 0);
232 for (i = 0; i < 16 && i < len; i++)
233 printf(" %02x", ((__u8 *) buffer) [i]);
234 printf("%s\n", i < len? "...": "");
240 /* just for debugging; prints non-empty branches of the int ed tree
241 * inclusive iso eds */
242 void ep_print_int_eds(ohci_t *ohci, char *str)
246 for (i = 0; i < 32; i++) {
248 ed_p = &(ohci->hcca->int_table [i]);
251 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
252 while (*ed_p != 0 && j--) {
253 ed_t *ed = (ed_t *)m32_swap(ed_p);
254 printf(" ed: %4x;", ed->hwINFO);
255 ed_p = &ed->hwNextED;
261 static void ohci_dump_intr_mask(char *label, __u32 mask)
263 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
266 (mask & OHCI_INTR_MIE) ? " MIE" : "",
267 (mask & OHCI_INTR_OC) ? " OC" : "",
268 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
269 (mask & OHCI_INTR_FNO) ? " FNO" : "",
270 (mask & OHCI_INTR_UE) ? " UE" : "",
271 (mask & OHCI_INTR_RD) ? " RD" : "",
272 (mask & OHCI_INTR_SF) ? " SF" : "",
273 (mask & OHCI_INTR_WDH) ? " WDH" : "",
274 (mask & OHCI_INTR_SO) ? " SO" : ""
278 static void maybe_print_eds(char *label, __u32 value)
280 ed_t *edp = (ed_t *)value;
283 dbg("%s %08x", label, value);
284 dbg("%08x", edp->hwINFO);
285 dbg("%08x", edp->hwTailP);
286 dbg("%08x", edp->hwHeadP);
287 dbg("%08x", edp->hwNextED);
291 static char *hcfs2string(int state)
294 case OHCI_USB_RESET: return "reset";
295 case OHCI_USB_RESUME: return "resume";
296 case OHCI_USB_OPER: return "operational";
297 case OHCI_USB_SUSPEND: return "suspend";
302 /* dump control and status registers */
303 static void ohci_dump_status(ohci_t *controller)
305 struct ohci_regs *regs = controller->regs;
308 temp = readl(®s->revision) & 0xff;
310 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
312 temp = readl(®s->control);
313 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
314 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
315 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
316 (temp & OHCI_CTRL_IR) ? " IR" : "",
317 hcfs2string(temp & OHCI_CTRL_HCFS),
318 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
319 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
320 (temp & OHCI_CTRL_IE) ? " IE" : "",
321 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
322 temp & OHCI_CTRL_CBSR
325 temp = readl(®s->cmdstatus);
326 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
327 (temp & OHCI_SOC) >> 16,
328 (temp & OHCI_OCR) ? " OCR" : "",
329 (temp & OHCI_BLF) ? " BLF" : "",
330 (temp & OHCI_CLF) ? " CLF" : "",
331 (temp & OHCI_HCR) ? " HCR" : ""
334 ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
335 ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
337 maybe_print_eds("ed_periodcurrent", readl(®s->ed_periodcurrent));
339 maybe_print_eds("ed_controlhead", readl(®s->ed_controlhead));
340 maybe_print_eds("ed_controlcurrent", readl(®s->ed_controlcurrent));
342 maybe_print_eds("ed_bulkhead", readl(®s->ed_bulkhead));
343 maybe_print_eds("ed_bulkcurrent", readl(®s->ed_bulkcurrent));
345 maybe_print_eds("donehead", readl(®s->donehead));
348 static void ohci_dump_roothub(ohci_t *controller, int verbose)
352 temp = roothub_a(controller);
353 ndp = (temp & RH_A_NDP);
354 #ifdef CONFIG_AT91C_PQFP_UHPBUG
355 ndp = (ndp == 2) ? 1:0;
358 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
359 ((temp & RH_A_POTPGT) >> 24) & 0xff,
360 (temp & RH_A_NOCP) ? " NOCP" : "",
361 (temp & RH_A_OCPM) ? " OCPM" : "",
362 (temp & RH_A_DT) ? " DT" : "",
363 (temp & RH_A_NPS) ? " NPS" : "",
364 (temp & RH_A_PSM) ? " PSM" : "",
367 temp = roothub_b(controller);
368 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
370 (temp & RH_B_PPCM) >> 16,
373 temp = roothub_status(controller);
374 dbg("roothub.status: %08x%s%s%s%s%s%s",
376 (temp & RH_HS_CRWE) ? " CRWE" : "",
377 (temp & RH_HS_OCIC) ? " OCIC" : "",
378 (temp & RH_HS_LPSC) ? " LPSC" : "",
379 (temp & RH_HS_DRWE) ? " DRWE" : "",
380 (temp & RH_HS_OCI) ? " OCI" : "",
381 (temp & RH_HS_LPS) ? " LPS" : ""
385 for (i = 0; i < ndp; i++) {
386 temp = roothub_portstatus(controller, i);
387 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
390 (temp & RH_PS_PRSC) ? " PRSC" : "",
391 (temp & RH_PS_OCIC) ? " OCIC" : "",
392 (temp & RH_PS_PSSC) ? " PSSC" : "",
393 (temp & RH_PS_PESC) ? " PESC" : "",
394 (temp & RH_PS_CSC) ? " CSC" : "",
396 (temp & RH_PS_LSDA) ? " LSDA" : "",
397 (temp & RH_PS_PPS) ? " PPS" : "",
398 (temp & RH_PS_PRS) ? " PRS" : "",
399 (temp & RH_PS_POCI) ? " POCI" : "",
400 (temp & RH_PS_PSS) ? " PSS" : "",
402 (temp & RH_PS_PES) ? " PES" : "",
403 (temp & RH_PS_CCS) ? " CCS" : ""
408 static void ohci_dump(ohci_t *controller, int verbose)
410 dbg("OHCI controller usb-%s state", controller->slot_name);
412 /* dumps some of the state we know about */
413 ohci_dump_status(controller);
415 ep_print_int_eds(controller, "hcca");
416 dbg("hcca frame #%04x", controller->hcca->frame_no);
417 ohci_dump_roothub(controller, 1);
421 /*-------------------------------------------------------------------------*
422 * Interface functions (URB)
423 *-------------------------------------------------------------------------*/
425 /* get a transfer request */
427 int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
431 urb_priv_t *purb_priv = urb;
433 struct usb_device *dev = urb->dev;
434 unsigned long pipe = urb->pipe;
435 void *buffer = urb->transfer_buffer;
436 int transfer_len = urb->transfer_buffer_length;
437 int interval = urb->interval;
441 /* when controller's hung, permit only roothub cleanup attempts
442 * such as powering down ports */
443 if (ohci->disabled) {
444 err("sohci_submit_job: EPIPE");
448 /* we're about to begin a new transaction here so mark the
452 /* every endpoint has a ed, locate and fill it */
453 ed = ep_add_ed(dev, pipe, interval, 1);
455 err("sohci_submit_job: ENOMEM");
459 /* for the private part of the URB we need the number of TDs (size) */
460 switch (usb_pipetype(pipe)) {
461 case PIPE_BULK: /* one TD for every 4096 Byte */
462 size = (transfer_len - 1) / 4096 + 1;
464 case PIPE_CONTROL:/* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
465 size = (transfer_len == 0)? 2:
466 (transfer_len - 1) / 4096 + 3;
468 case PIPE_INTERRUPT: /* 1 TD */
475 if (size >= (N_URB_TD - 1)) {
476 err("need %d TDs, only have %d", size, N_URB_TD);
479 purb_priv->pipe = pipe;
481 /* fill the private part of the URB */
482 purb_priv->length = size;
484 purb_priv->actual_length = 0;
486 /* allocate the TDs */
487 /* note that td[0] was allocated in ep_add_ed */
488 for (i = 0; i < size; i++) {
489 purb_priv->td[i] = td_alloc(dev);
490 if (!purb_priv->td[i]) {
491 purb_priv->length = i;
492 urb_free_priv(purb_priv);
493 err("sohci_submit_job: ENOMEM");
498 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
499 urb_free_priv(purb_priv);
500 err("sohci_submit_job: EINVAL");
504 /* link the ed into a chain if is not already */
505 if (ed->state != ED_OPER)
508 /* fill the TDs and link it to the ed */
509 td_submit_job(dev, pipe, buffer, transfer_len,
510 setup, purb_priv, interval);
515 static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
517 struct ohci_regs *regs = hc->regs;
519 switch (usb_pipetype(urb->pipe)) {
521 /* implicitly requeued */
522 if (urb->dev->irq_handle &&
523 (urb->dev->irq_act_len = urb->actual_length)) {
524 writel(OHCI_INTR_WDH, ®s->intrenable);
525 readl(®s->intrenable); /* PCI posting flush */
526 urb->dev->irq_handle(urb->dev);
527 writel(OHCI_INTR_WDH, ®s->intrdisable);
528 readl(®s->intrdisable); /* PCI posting flush */
530 urb->actual_length = 0;
534 urb->transfer_buffer,
535 urb->transfer_buffer_length,
549 /*-------------------------------------------------------------------------*/
552 /* tell us the current USB frame number */
554 static int sohci_get_current_frame_number(struct usb_device *usb_dev)
556 ohci_t *ohci = &gohci;
558 return m16_swap(ohci->hcca->frame_no);
562 /*-------------------------------------------------------------------------*
563 * ED handling functions
564 *-------------------------------------------------------------------------*/
566 /* search for the right branch to insert an interrupt ed into the int tree
567 * do some load ballancing;
568 * returns the branch and
569 * sets the interval to interval = 2^integer (ld (interval)) */
571 static int ep_int_ballance(ohci_t *ohci, int interval, int load)
575 /* search for the least loaded interrupt endpoint
576 * branch of all 32 branches
578 for (i = 0; i < 32; i++)
579 if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
582 branch = branch % interval;
583 for (i = branch; i < 32; i += interval)
584 ohci->ohci_int_load [i] += load;
589 /*-------------------------------------------------------------------------*/
591 /* 2^int( ld (inter)) */
593 static int ep_2_n_interval(int inter)
596 for (i = 0; ((inter >> i) > 1) && (i < 5); i++);
600 /*-------------------------------------------------------------------------*/
602 /* the int tree is a binary tree
603 * in order to process it sequentially the indexes of the branches have to
604 * be mapped the mapping reverses the bits of a word of num_bits length */
605 static int ep_rev(int num_bits, int word)
609 for (i = 0; i < num_bits; i++)
610 wout |= (((word >> i) & 1) << (num_bits - i - 1));
614 /*-------------------------------------------------------------------------*
615 * ED handling functions
616 *-------------------------------------------------------------------------*/
618 /* link an ed into one of the HC chains */
620 static int ep_link(ohci_t *ohci, ed_t *edi)
622 volatile ed_t *ed = edi;
631 ed->int_interval = 0;
636 if (ohci->ed_controltail == NULL)
637 writel(ed, &ohci->regs->ed_controlhead);
639 ohci->ed_controltail->hwNextED =
640 m32_swap((unsigned long)ed);
642 ed->ed_prev = ohci->ed_controltail;
643 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
644 !ohci->ed_rm_list[1] && !ohci->sleeping) {
645 ohci->hc_control |= OHCI_CTRL_CLE;
646 writel(ohci->hc_control, &ohci->regs->control);
648 ohci->ed_controltail = edi;
653 if (ohci->ed_bulktail == NULL)
654 writel(ed, &ohci->regs->ed_bulkhead);
656 ohci->ed_bulktail->hwNextED =
657 m32_swap((unsigned long)ed);
659 ed->ed_prev = ohci->ed_bulktail;
660 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
661 !ohci->ed_rm_list[1] && !ohci->sleeping) {
662 ohci->hc_control |= OHCI_CTRL_BLE;
663 writel(ohci->hc_control, &ohci->regs->control);
665 ohci->ed_bulktail = edi;
670 interval = ep_2_n_interval(ed->int_period);
671 ed->int_interval = interval;
672 int_branch = ep_int_ballance(ohci, interval, load);
673 ed->int_branch = int_branch;
675 for (i = 0; i < ep_rev(6, interval); i += inter) {
677 for (ed_p = &(ohci->hcca->int_table[\
678 ep_rev(5, i) + int_branch]);
680 (((ed_t *)ed_p)->int_interval >= interval);
681 ed_p = &(((ed_t *)ed_p)->hwNextED))
683 ((ed_t *)ed_p)->int_interval);
684 ed->hwNextED = *ed_p;
685 *ed_p = m32_swap((unsigned long)ed);
692 /*-------------------------------------------------------------------------*/
694 /* scan the periodic table to find and unlink this ED */
695 static void periodic_unlink(struct ohci *ohci, volatile struct ed *ed,
696 unsigned index, unsigned period)
698 for (; index < NUM_INTS; index += period) {
699 __u32 *ed_p = &ohci->hcca->int_table [index];
701 /* ED might have been unlinked through another path */
704 m32_swap((unsigned long)ed_p)) == ed) {
705 *ed_p = ed->hwNextED;
708 ed_p = &(((struct ed *)
709 m32_swap((unsigned long)ed_p))->hwNextED);
714 /* unlink an ed from one of the HC chains.
715 * just the link to the ed is unlinked.
716 * the link from the ed still points to another operational ed or 0
717 * so the HC can eventually finish the processing of the unlinked ed */
719 static int ep_unlink(ohci_t *ohci, ed_t *edi)
721 volatile ed_t *ed = edi;
724 ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
728 if (ed->ed_prev == NULL) {
730 ohci->hc_control &= ~OHCI_CTRL_CLE;
731 writel(ohci->hc_control, &ohci->regs->control);
733 writel(m32_swap(*((__u32 *)&ed->hwNextED)),
734 &ohci->regs->ed_controlhead);
736 ed->ed_prev->hwNextED = ed->hwNextED;
738 if (ohci->ed_controltail == ed) {
739 ohci->ed_controltail = ed->ed_prev;
742 *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
747 if (ed->ed_prev == NULL) {
749 ohci->hc_control &= ~OHCI_CTRL_BLE;
750 writel(ohci->hc_control, &ohci->regs->control);
752 writel(m32_swap(*((__u32 *)&ed->hwNextED)),
753 &ohci->regs->ed_bulkhead);
755 ed->ed_prev->hwNextED = ed->hwNextED;
757 if (ohci->ed_bulktail == ed) {
758 ohci->ed_bulktail = ed->ed_prev;
761 *((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
766 periodic_unlink(ohci, ed, 0, 1);
767 for (i = ed->int_branch; i < 32; i += ed->int_interval)
768 ohci->ohci_int_load[i] -= ed->int_load;
771 ed->state = ED_UNLINK;
775 /*-------------------------------------------------------------------------*/
777 /* add/reinit an endpoint; this should be done once at the
778 * usb_set_configuration command, but the USB stack is a little bit
779 * stateless so we do it at every transaction if the state of the ed
780 * is ED_NEW then a dummy td is added and the state is changed to
781 * ED_UNLINK in all other cases the state is left unchanged the ed
782 * info fields are setted anyway even though most of them should not
785 static ed_t *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe,
786 int interval, int load)
792 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
793 (usb_pipecontrol(pipe)? 0: usb_pipeout(pipe))];
795 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
796 err("ep_add_ed: pending delete");
797 /* pending delete request */
801 if (ed->state == ED_NEW) {
802 /* dummy td; end of td list for ed */
803 td = td_alloc(usb_dev);
804 ed->hwTailP = m32_swap((unsigned long)td);
805 ed->hwHeadP = ed->hwTailP;
806 ed->state = ED_UNLINK;
807 ed->type = usb_pipetype(pipe);
811 ed->hwINFO = m32_swap(usb_pipedevice(pipe)
812 | usb_pipeendpoint(pipe) << 7
813 | (usb_pipeisoc(pipe)? 0x8000: 0)
814 | (usb_pipecontrol(pipe)? 0: \
815 (usb_pipeout(pipe)? 0x800: 0x1000))
816 | usb_pipeslow(pipe) << 13
817 | usb_maxpacket(usb_dev, pipe) << 16);
819 if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
820 ed->int_period = interval;
827 /*-------------------------------------------------------------------------*
828 * TD handling functions
829 *-------------------------------------------------------------------------*/
831 /* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
833 static void td_fill(ohci_t *ohci, unsigned int info,
835 struct usb_device *dev, int index, urb_priv_t *urb_priv)
837 volatile td_t *td, *td_pt;
838 #ifdef OHCI_FILL_TRACE
842 if (index > urb_priv->length) {
843 err("index > length");
846 /* use this td as the next dummy */
847 td_pt = urb_priv->td [index];
850 /* fill the old dummy TD */
851 td = urb_priv->td [index] =
852 (td_t *)(m32_swap(urb_priv->ed->hwTailP) & ~0xf);
854 td->ed = urb_priv->ed;
855 td->next_dl_td = NULL;
857 td->data = (__u32)data;
858 #ifdef OHCI_FILL_TRACE
859 if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) &&
860 usb_pipeout(urb_priv->pipe)) {
861 for (i = 0; i < len; i++)
862 printf("td->data[%d] %#2x ", i, ((unsigned char *)td->data)[i]);
869 td->hwINFO = m32_swap(info);
870 td->hwCBP = m32_swap((unsigned long)data);
872 td->hwBE = m32_swap((unsigned long)(data + len - 1));
876 td->hwNextTD = m32_swap((unsigned long)td_pt);
878 /* append to queue */
879 td->ed->hwTailP = td->hwNextTD;
882 /*-------------------------------------------------------------------------*/
884 /* prepare all TDs of a transfer */
886 static void td_submit_job(struct usb_device *dev, unsigned long pipe,
887 void *buffer, int transfer_len,
888 struct devrequest *setup, urb_priv_t *urb,
891 ohci_t *ohci = &gohci;
892 int data_len = transfer_len;
896 unsigned int toggle = 0;
898 /* OHCI handles the DATA-toggles itself, we just use the USB-toggle
899 * bits for reseting */
900 if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
901 toggle = TD_T_TOGGLE;
904 usb_settoggle(dev, usb_pipeendpoint(pipe),
905 usb_pipeout(pipe), 1);
913 switch (usb_pipetype(pipe)) {
915 info = usb_pipeout(pipe)?
916 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
917 while (data_len > 4096) {
918 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle),
919 data, 4096, dev, cnt, urb);
920 data += 4096; data_len -= 4096; cnt++;
922 info = usb_pipeout(pipe)?
923 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
924 td_fill(ohci, info | (cnt? TD_T_TOGGLE:toggle), data,
925 data_len, dev, cnt, urb);
928 if (!ohci->sleeping) {
929 /* start bulk list */
930 writel(OHCI_BLF, &ohci->regs->cmdstatus);
936 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
937 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
939 /* Optional Data phase */
941 info = usb_pipeout(pipe)?
942 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
943 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
944 /* NOTE: mishandles transfers >8K, some >4K */
945 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
949 info = usb_pipeout(pipe)?
950 TD_CC | TD_DP_IN | TD_T_DATA1:
951 TD_CC | TD_DP_OUT | TD_T_DATA1;
952 td_fill(ohci, info, data, 0, dev, cnt++, urb);
954 if (!ohci->sleeping) {
955 /* start Control list */
956 writel(OHCI_CLF, &ohci->regs->cmdstatus);
961 info = usb_pipeout(urb->pipe)?
962 TD_CC | TD_DP_OUT | toggle:
963 TD_CC | TD_R | TD_DP_IN | toggle;
964 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
967 if (urb->length != cnt)
968 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
971 /*-------------------------------------------------------------------------*
972 * Done List handling functions
973 *-------------------------------------------------------------------------*/
975 /* calculate the transfer length and update the urb */
977 static void dl_transfer_length(td_t *td)
979 __u32 tdINFO, tdBE, tdCBP;
980 urb_priv_t *lurb_priv = td->ed->purb;
982 tdINFO = m32_swap(td->hwINFO);
983 tdBE = m32_swap(td->hwBE);
984 tdCBP = m32_swap(td->hwCBP);
986 if (!(usb_pipetype(lurb_priv->pipe) == PIPE_CONTROL &&
987 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
990 lurb_priv->actual_length += tdBE - td->data + 1;
992 lurb_priv->actual_length += tdCBP - td->data;
997 /*-------------------------------------------------------------------------*/
998 static void check_status(td_t *td_list)
1000 urb_priv_t *lurb_priv = td_list->ed->purb;
1001 int urb_len = lurb_priv->length;
1002 __u32 *phwHeadP = &td_list->ed->hwHeadP;
1005 cc = TD_CC_GET(m32_swap(td_list->hwINFO));
1007 err(" USB-error: %s (%x)", cc_to_string[cc], cc);
1009 if (*phwHeadP & m32_swap(0x1)) {
1011 ((td_list->index + 1) < urb_len)) {
1013 (lurb_priv->td[urb_len - 1]->hwNextTD &\
1014 m32_swap(0xfffffff0)) |
1015 (*phwHeadP & m32_swap(0x2));
1017 lurb_priv->td_cnt += urb_len -
1020 *phwHeadP &= m32_swap(0xfffffff2);
1022 #ifdef CONFIG_MPC5200
1023 td_list->hwNextTD = 0;
1028 /* replies to the request have to be on a FIFO basis so
1029 * we reverse the reversed done-list */
1030 static td_t *dl_reverse_done_list(ohci_t *ohci)
1033 td_t *td_rev = NULL;
1034 td_t *td_list = NULL;
1036 td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
1037 ohci->hcca->done_head = 0;
1039 while (td_list_hc) {
1040 td_list = (td_t *)td_list_hc;
1041 check_status(td_list);
1042 td_list->next_dl_td = td_rev;
1044 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
1049 /*-------------------------------------------------------------------------*/
1050 /*-------------------------------------------------------------------------*/
1052 static void finish_urb(ohci_t *ohci, urb_priv_t *urb, int status)
1054 if ((status & (ED_OPER | ED_UNLINK)) && (urb->state != URB_DEL))
1055 urb->finished = sohci_return_job(ohci, urb);
1057 dbg("finish_urb: strange.., ED state %x, \n", status);
1061 * Used to take back a TD from the host controller. This would normally be
1062 * called from within dl_done_list, however it may be called directly if the
1063 * HC no longer sees the TD and it has not appeared on the donelist (after
1064 * two frames). This bug has been observed on ZF Micro systems.
1066 static int takeback_td(ohci_t *ohci, td_t *td_list)
1072 urb_priv_t *lurb_priv;
1073 __u32 tdINFO, edHeadP, edTailP;
1075 tdINFO = m32_swap(td_list->hwINFO);
1078 lurb_priv = ed->purb;
1080 dl_transfer_length(td_list);
1082 lurb_priv->td_cnt++;
1084 /* error code of transfer */
1085 cc = TD_CC_GET(tdINFO);
1087 err("USB-error: %s (%x)", cc_to_string[cc], cc);
1088 stat = cc_to_error[cc];
1091 /* see if this done list makes for all TD's of current URB,
1092 * and mark the URB finished if so */
1093 if (lurb_priv->td_cnt == lurb_priv->length)
1094 finish_urb(ohci, lurb_priv, ed->state);
1096 dbg("dl_done_list: processing TD %x, len %x\n",
1097 lurb_priv->td_cnt, lurb_priv->length);
1099 if (ed->state != ED_NEW &&
1100 (usb_pipetype(lurb_priv->pipe) != PIPE_INTERRUPT)) {
1101 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
1102 edTailP = m32_swap(ed->hwTailP);
1104 /* unlink eds if they are not busy */
1105 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
1106 ep_unlink(ohci, ed);
1111 static int dl_done_list(ohci_t *ohci)
1114 td_t *td_list = dl_reverse_done_list(ohci);
1117 td_t *td_next = td_list->next_dl_td;
1118 stat = takeback_td(ohci, td_list);
1124 /*-------------------------------------------------------------------------*
1126 *-------------------------------------------------------------------------*/
1128 /* Device descriptor */
1129 static __u8 root_hub_dev_des[] =
1131 0x12, /* __u8 bLength; */
1132 0x01, /* __u8 bDescriptorType; Device */
1133 0x10, /* __u16 bcdUSB; v1.1 */
1135 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
1136 0x00, /* __u8 bDeviceSubClass; */
1137 0x00, /* __u8 bDeviceProtocol; */
1138 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
1139 0x00, /* __u16 idVendor; */
1141 0x00, /* __u16 idProduct; */
1143 0x00, /* __u16 bcdDevice; */
1145 0x00, /* __u8 iManufacturer; */
1146 0x01, /* __u8 iProduct; */
1147 0x00, /* __u8 iSerialNumber; */
1148 0x01 /* __u8 bNumConfigurations; */
1151 /* Configuration descriptor */
1152 static __u8 root_hub_config_des[] =
1154 0x09, /* __u8 bLength; */
1155 0x02, /* __u8 bDescriptorType; Configuration */
1156 0x19, /* __u16 wTotalLength; */
1158 0x01, /* __u8 bNumInterfaces; */
1159 0x01, /* __u8 bConfigurationValue; */
1160 0x00, /* __u8 iConfiguration; */
1161 0x40, /* __u8 bmAttributes;
1162 Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
1163 0x00, /* __u8 MaxPower; */
1166 0x09, /* __u8 if_bLength; */
1167 0x04, /* __u8 if_bDescriptorType; Interface */
1168 0x00, /* __u8 if_bInterfaceNumber; */
1169 0x00, /* __u8 if_bAlternateSetting; */
1170 0x01, /* __u8 if_bNumEndpoints; */
1171 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
1172 0x00, /* __u8 if_bInterfaceSubClass; */
1173 0x00, /* __u8 if_bInterfaceProtocol; */
1174 0x00, /* __u8 if_iInterface; */
1177 0x07, /* __u8 ep_bLength; */
1178 0x05, /* __u8 ep_bDescriptorType; Endpoint */
1179 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
1180 0x03, /* __u8 ep_bmAttributes; Interrupt */
1181 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
1183 0xff /* __u8 ep_bInterval; 255 ms */
1186 static unsigned char root_hub_str_index0[] =
1188 0x04, /* __u8 bLength; */
1189 0x03, /* __u8 bDescriptorType; String-descriptor */
1190 0x09, /* __u8 lang ID */
1191 0x04, /* __u8 lang ID */
1194 static unsigned char root_hub_str_index1[] =
1196 28, /* __u8 bLength; */
1197 0x03, /* __u8 bDescriptorType; String-descriptor */
1198 'O', /* __u8 Unicode */
1199 0, /* __u8 Unicode */
1200 'H', /* __u8 Unicode */
1201 0, /* __u8 Unicode */
1202 'C', /* __u8 Unicode */
1203 0, /* __u8 Unicode */
1204 'I', /* __u8 Unicode */
1205 0, /* __u8 Unicode */
1206 ' ', /* __u8 Unicode */
1207 0, /* __u8 Unicode */
1208 'R', /* __u8 Unicode */
1209 0, /* __u8 Unicode */
1210 'o', /* __u8 Unicode */
1211 0, /* __u8 Unicode */
1212 'o', /* __u8 Unicode */
1213 0, /* __u8 Unicode */
1214 't', /* __u8 Unicode */
1215 0, /* __u8 Unicode */
1216 ' ', /* __u8 Unicode */
1217 0, /* __u8 Unicode */
1218 'H', /* __u8 Unicode */
1219 0, /* __u8 Unicode */
1220 'u', /* __u8 Unicode */
1221 0, /* __u8 Unicode */
1222 'b', /* __u8 Unicode */
1223 0, /* __u8 Unicode */
1226 /* Hub class-specific descriptor is constructed dynamically */
1228 /*-------------------------------------------------------------------------*/
1230 #define OK(x) len = (x); break
1232 #define WR_RH_STAT(x) {info("WR:status %#8x", (x)); writel((x), \
1233 &gohci.regs->roothub.status); }
1234 #define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, \
1235 (x)); writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); }
1237 #define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
1238 #define WR_RH_PORTSTAT(x) writel((x), \
1239 &gohci.regs->roothub.portstatus[wIndex-1])
1241 #define RD_RH_STAT roothub_status(&gohci)
1242 #define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
1244 /* request to virtual root hub */
1246 int rh_check_port_status(ohci_t *controller)
1252 temp = roothub_a(controller);
1253 ndp = (temp & RH_A_NDP);
1254 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1255 ndp = (ndp == 2) ? 1:0;
1257 for (i = 0; i < ndp; i++) {
1258 temp = roothub_portstatus(controller, i);
1259 /* check for a device disconnect */
1260 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1261 (RH_PS_PESC | RH_PS_CSC)) &&
1262 ((temp & RH_PS_CCS) == 0)) {
1270 static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1271 void *buffer, int transfer_len, struct devrequest *cmd)
1273 void *data = buffer;
1274 int leni = transfer_len;
1278 __u8 *data_buf = (__u8 *)datab;
1285 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1286 cmd, "SUB(rh)", usb_pipein(pipe));
1290 if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
1291 info("Root-Hub submit IRQ: NOT implemented");
1295 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1296 wValue = le16_to_cpu(cmd->value);
1297 wIndex = le16_to_cpu(cmd->index);
1298 wLength = le16_to_cpu(cmd->length);
1300 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1301 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1303 switch (bmRType_bReq) {
1304 /* Request Destination:
1305 without flags: Device,
1306 RH_INTERFACE: interface,
1307 RH_ENDPOINT: endpoint,
1308 RH_CLASS means HUB here,
1309 RH_OTHER | RH_CLASS almost ever means HUB_PORT here
1313 *(__u16 *) data_buf = cpu_to_le16(1);
1315 case RH_GET_STATUS | RH_INTERFACE:
1316 *(__u16 *) data_buf = cpu_to_le16(0);
1318 case RH_GET_STATUS | RH_ENDPOINT:
1319 *(__u16 *) data_buf = cpu_to_le16(0);
1321 case RH_GET_STATUS | RH_CLASS:
1322 *(__u32 *) data_buf = cpu_to_le32(
1323 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1325 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1326 *(__u32 *) data_buf = cpu_to_le32(RD_RH_PORTSTAT);
1329 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1331 case (RH_ENDPOINT_STALL):
1336 case RH_CLEAR_FEATURE | RH_CLASS:
1338 case RH_C_HUB_LOCAL_POWER:
1340 case (RH_C_HUB_OVER_CURRENT):
1341 WR_RH_STAT(RH_HS_OCIC);
1346 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1348 case (RH_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_CCS); OK(0);
1349 case (RH_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_POCI); OK(0);
1350 case (RH_PORT_POWER): WR_RH_PORTSTAT(RH_PS_LSDA); OK(0);
1351 case (RH_C_PORT_CONNECTION): WR_RH_PORTSTAT(RH_PS_CSC); OK(0);
1352 case (RH_C_PORT_ENABLE): WR_RH_PORTSTAT(RH_PS_PESC); OK(0);
1353 case (RH_C_PORT_SUSPEND): WR_RH_PORTSTAT(RH_PS_PSSC); OK(0);
1354 case (RH_C_PORT_OVER_CURRENT):WR_RH_PORTSTAT(RH_PS_OCIC); OK(0);
1355 case (RH_C_PORT_RESET): WR_RH_PORTSTAT(RH_PS_PRSC); OK(0);
1359 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1361 case (RH_PORT_SUSPEND):
1362 WR_RH_PORTSTAT(RH_PS_PSS); OK(0);
1363 case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
1364 if (RD_RH_PORTSTAT & RH_PS_CCS)
1365 WR_RH_PORTSTAT(RH_PS_PRS);
1367 case (RH_PORT_POWER):
1368 WR_RH_PORTSTAT(RH_PS_PPS);
1371 case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
1372 if (RD_RH_PORTSTAT & RH_PS_CCS)
1373 WR_RH_PORTSTAT(RH_PS_PES);
1378 case RH_SET_ADDRESS:
1379 gohci.rh.devnum = wValue;
1382 case RH_GET_DESCRIPTOR:
1383 switch ((wValue & 0xff00) >> 8) {
1384 case (0x01): /* device descriptor */
1385 len = min_t(unsigned int,
1388 sizeof(root_hub_dev_des),
1390 data_buf = root_hub_dev_des; OK(len);
1391 case (0x02): /* configuration descriptor */
1392 len = min_t(unsigned int,
1395 sizeof(root_hub_config_des),
1397 data_buf = root_hub_config_des; OK(len);
1398 case (0x03): /* string descriptors */
1399 if (wValue == 0x0300) {
1400 len = min_t(unsigned int,
1403 sizeof(root_hub_str_index0),
1405 data_buf = root_hub_str_index0;
1408 if (wValue == 0x0301) {
1409 len = min_t(unsigned int,
1412 sizeof(root_hub_str_index1),
1414 data_buf = root_hub_str_index1;
1418 stat = USB_ST_STALLED;
1422 case RH_GET_DESCRIPTOR | RH_CLASS:
1424 __u32 temp = roothub_a(&gohci);
1426 data_buf [0] = 9; /* min length; */
1427 data_buf [1] = 0x29;
1428 data_buf [2] = temp & RH_A_NDP;
1429 #ifdef CONFIG_AT91C_PQFP_UHPBUG
1430 data_buf [2] = (data_buf [2] == 2) ? 1:0;
1433 if (temp & RH_A_PSM) /* per-port power switching? */
1434 data_buf [3] |= 0x1;
1435 if (temp & RH_A_NOCP) /* no overcurrent reporting? */
1436 data_buf [3] |= 0x10;
1437 else if (temp & RH_A_OCPM)/* per-port overcurrent reporting? */
1438 data_buf [3] |= 0x8;
1440 /* corresponds to data_buf[4-7] */
1442 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1443 temp = roothub_b(&gohci);
1444 data_buf [7] = temp & RH_B_DR;
1445 if (data_buf [2] < 7) {
1446 data_buf [8] = 0xff;
1449 data_buf [8] = (temp & RH_B_DR) >> 8;
1450 data_buf [10] = data_buf [9] = 0xff;
1453 len = min_t(unsigned int, leni,
1454 min_t(unsigned int, data_buf [0], wLength));
1458 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK(1);
1460 case RH_SET_CONFIGURATION: WR_RH_STAT(0x10000); OK(0);
1463 dbg("unsupported root hub command");
1464 stat = USB_ST_STALLED;
1468 ohci_dump_roothub(&gohci, 1);
1473 len = min_t(int, len, leni);
1474 if (data != data_buf)
1475 memcpy(data, data_buf, len);
1480 pkt_print(NULL, dev, pipe, buffer,
1481 transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
1489 /*-------------------------------------------------------------------------*/
1491 /* common code for handling submit messages - used for all but root hub */
1493 int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1494 int transfer_len, struct devrequest *setup, int interval)
1497 int maxsize = usb_maxpacket(dev, pipe);
1501 urb = malloc(sizeof(urb_priv_t));
1502 memset(urb, 0, sizeof(urb_priv_t));
1506 urb->transfer_buffer = buffer;
1507 urb->transfer_buffer_length = transfer_len;
1508 urb->interval = interval;
1510 /* device pulled? Shortcut the action. */
1511 if (devgone == dev) {
1512 dev->status = USB_ST_CRC_ERR;
1517 urb->actual_length = 0;
1518 pkt_print(urb, dev, pipe, buffer, transfer_len,
1519 setup, "SUB", usb_pipein(pipe));
1524 err("submit_common_message: pipesize for pipe %lx is zero",
1529 if (sohci_submit_job(urb, setup) < 0) {
1530 err("sohci_submit_job failed");
1536 /* ohci_dump_status(&gohci); */
1539 /* allow more time for a BULK device to react - some are slow */
1540 #define BULK_TO 5000 /* timeout in milliseconds */
1541 if (usb_pipetype(pipe) == PIPE_BULK)
1546 /* wait for it to complete */
1548 /* check whether the controller is done */
1549 stat = hc_interrupt();
1551 stat = USB_ST_CRC_ERR;
1555 /* NOTE: since we are not interrupt driven in U-Boot and always
1556 * handle only one URB at a time, we cannot assume the
1557 * transaction finished on the first successful return from
1558 * hc_interrupt().. unless the flag for current URB is set,
1559 * meaning that all TD's to/from device got actually
1560 * transferred and processed. If the current URB is not
1561 * finished we need to re-iterate this loop so as
1562 * hc_interrupt() gets called again as there needs to be some
1563 * more TD's to process still */
1564 if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
1565 /* 0xff is returned for an SF-interrupt */
1575 err("CTL:TIMEOUT ");
1576 dbg("submit_common_msg: TO status %x\n", stat);
1578 stat = USB_ST_CRC_ERR;
1584 dev->act_len = transfer_len;
1587 pkt_print(urb, dev, pipe, buffer, transfer_len,
1588 setup, "RET(ctlr)", usb_pipein(pipe));
1593 /* free TDs in urb_priv */
1594 if (usb_pipetype(pipe) != PIPE_INTERRUPT)
1599 /* submit routines called from usb.c */
1600 int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1603 info("submit_bulk_msg");
1604 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1607 int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1608 int transfer_len, struct devrequest *setup)
1610 int maxsize = usb_maxpacket(dev, pipe);
1612 info("submit_control_msg");
1614 pkt_print(NULL, dev, pipe, buffer, transfer_len,
1615 setup, "SUB", usb_pipein(pipe));
1620 err("submit_control_message: pipesize for pipe %lx is zero",
1624 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1626 /* root hub - redirect */
1627 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1631 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1634 int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1635 int transfer_len, int interval)
1637 info("submit_int_msg");
1638 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
1642 /*-------------------------------------------------------------------------*
1644 *-------------------------------------------------------------------------*/
1646 /* reset the HC and BUS */
1648 static int hc_reset(ohci_t *ohci)
1650 #ifdef CONFIG_PCI_EHCI_DEVNO
1654 int smm_timeout = 50; /* 0,5 sec */
1656 dbg("%s\n", __FUNCTION__);
1658 #ifdef CONFIG_PCI_EHCI_DEVNO
1660 * Some multi-function controllers (e.g. ISP1562) allow root hub
1661 * resetting via EHCI registers only.
1663 pdev = pci_find_devices(ehci_pci_ids, CONFIG_PCI_EHCI_DEVNO);
1668 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1669 writel(readl(base + EHCI_USBCMD_OFF) | EHCI_USBCMD_HCRESET,
1670 base + EHCI_USBCMD_OFF);
1672 while (readl(base + EHCI_USBCMD_OFF) & EHCI_USBCMD_HCRESET) {
1673 if (timeout-- <= 0) {
1674 printf("USB RootHub reset timed out!");
1680 printf("No EHCI func at %d index!\n", CONFIG_PCI_EHCI_DEVNO);
1682 if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1683 /* SMM owns the HC */
1684 writel(OHCI_OCR, &ohci->regs->cmdstatus);/* request ownership */
1685 info("USB HC TakeOver from SMM");
1686 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1688 if (--smm_timeout == 0) {
1689 err("USB HC TakeOver failed!");
1695 /* Disable HC interrupts */
1696 writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1698 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
1700 readl(&ohci->regs->control));
1702 /* Reset USB (needed by some controllers) */
1703 ohci->hc_control = 0;
1704 writel(ohci->hc_control, &ohci->regs->control);
1706 /* HC Reset requires max 10 us delay */
1707 writel(OHCI_HCR, &ohci->regs->cmdstatus);
1708 while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1709 if (--timeout == 0) {
1710 err("USB HC reset timed out!");
1718 /*-------------------------------------------------------------------------*/
1720 /* Start an OHCI controller, set the BUS operational
1722 * connect the virtual root hub */
1724 static int hc_start(ohci_t *ohci)
1727 unsigned int fminterval;
1731 /* Tell the controller where the control and bulk lists are
1732 * The lists are empty now. */
1734 writel(0, &ohci->regs->ed_controlhead);
1735 writel(0, &ohci->regs->ed_bulkhead);
1737 writel((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
1739 fminterval = 0x2edf;
1740 writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1741 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1742 writel(fminterval, &ohci->regs->fminterval);
1743 writel(0x628, &ohci->regs->lsthresh);
1745 /* start controller operations */
1746 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1748 writel(ohci->hc_control, &ohci->regs->control);
1750 /* disable all interrupts */
1751 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1752 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1753 OHCI_INTR_OC | OHCI_INTR_MIE);
1754 writel(mask, &ohci->regs->intrdisable);
1755 /* clear all interrupts */
1756 mask &= ~OHCI_INTR_MIE;
1757 writel(mask, &ohci->regs->intrstatus);
1758 /* Choose the interrupts we care about now - but w/o MIE */
1759 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1760 writel(mask, &ohci->regs->intrenable);
1763 /* required for AMD-756 and some Mac platforms */
1764 writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1765 &ohci->regs->roothub.a);
1766 writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1767 #endif /* OHCI_USE_NPS */
1769 #define mdelay(n) ({unsigned long msec = (n); while (msec--) udelay(1000); })
1770 /* POTPGT delay is bits 24-31, in 2 ms units. */
1771 mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1773 /* connect the virtual root hub */
1774 ohci->rh.devnum = 0;
1779 /*-------------------------------------------------------------------------*/
1781 /* Poll USB interrupt. */
1782 void usb_event_poll(void)
1787 /* an interrupt happens */
1789 static int hc_interrupt(void)
1791 ohci_t *ohci = &gohci;
1792 struct ohci_regs *regs = ohci->regs;
1796 if ((ohci->hcca->done_head != 0) &&
1797 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1798 ints = OHCI_INTR_WDH;
1800 ints = readl(®s->intrstatus);
1801 if (ints == ~(u32)0) {
1803 err("%s device removed!", ohci->slot_name);
1806 ints &= readl(®s->intrenable);
1808 dbg("hc_interrupt: returning..\n");
1814 /* dbg("Interrupt: %x frame: %x", ints,
1815 le16_to_cpu(ohci->hcca->frame_no)); */
1817 if (ints & OHCI_INTR_RHSC)
1820 if (ints & OHCI_INTR_UE) {
1822 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1824 /* e.g. due to PCI Master/Target Abort */
1831 /* FIXME: be optimistic, hope that bug won't repeat often. */
1832 /* Make some non-interrupt context restart the controller. */
1833 /* Count and limit the retries though; either hardware or */
1834 /* software errors can go forever... */
1839 if (ints & OHCI_INTR_WDH) {
1841 writel(OHCI_INTR_WDH, ®s->intrdisable);
1842 (void)readl(®s->intrdisable); /* flush */
1843 stat = dl_done_list(&gohci);
1844 writel(OHCI_INTR_WDH, ®s->intrenable);
1845 (void)readl(®s->intrdisable); /* flush */
1848 if (ints & OHCI_INTR_SO) {
1849 dbg("USB Schedule overrun\n");
1850 writel(OHCI_INTR_SO, ®s->intrenable);
1854 /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
1855 if (ints & OHCI_INTR_SF) {
1856 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1858 writel(OHCI_INTR_SF, ®s->intrdisable);
1859 if (ohci->ed_rm_list[frame] != NULL)
1860 writel(OHCI_INTR_SF, ®s->intrenable);
1864 writel(ints, ®s->intrstatus);
1868 /*-------------------------------------------------------------------------*/
1870 /*-------------------------------------------------------------------------*/
1872 /* De-allocate all resources.. */
1874 static void hc_release_ohci(ohci_t *ohci)
1876 dbg("USB HC release ohci usb-%s", ohci->slot_name);
1878 if (!ohci->disabled)
1882 /*-------------------------------------------------------------------------*/
1885 * low level initalisation routine, called from usb.c
1887 static char ohci_inited = 0;
1889 int usb_lowlevel_init(void)
1891 #ifdef CONFIG_PCI_OHCI
1895 #ifdef CFG_USB_OHCI_CPU_INIT
1896 /* cpu dependant init */
1901 #ifdef CFG_USB_OHCI_BOARD_INIT
1902 /* board dependant init */
1903 if (usb_board_init())
1906 memset(&gohci, 0, sizeof(ohci_t));
1908 /* align the storage */
1909 if ((__u32)&ghcca[0] & 0xff) {
1910 err("HCCA not aligned!!");
1914 info("aligned ghcca %p", phcca);
1915 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1916 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1917 err("EDs not aligned!!");
1920 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1921 if ((__u32)gtd & 0x7) {
1922 err("TDs not aligned!!");
1927 memset(phcca, 0, sizeof(struct ohci_hcca));
1932 #ifdef CONFIG_PCI_OHCI
1933 pdev = pci_find_devices(ohci_pci_ids, CONFIG_PCI_OHCI_DEVNO);
1938 pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
1939 pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
1940 printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
1941 vid, did, (pdev >> 16) & 0xff,
1942 (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
1943 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
1944 printf("OHCI regs address 0x%08x\n", base);
1945 gohci.regs = (struct ohci_regs *)base;
1949 gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
1953 gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
1955 if (hc_reset(&gohci) < 0) {
1956 hc_release_ohci(&gohci);
1957 err("can't reset usb-%s", gohci.slot_name);
1958 #ifdef CFG_USB_OHCI_BOARD_INIT
1959 /* board dependant cleanup */
1960 usb_board_init_fail();
1963 #ifdef CFG_USB_OHCI_CPU_INIT
1964 /* cpu dependant cleanup */
1965 usb_cpu_init_fail();
1970 if (hc_start(&gohci) < 0) {
1971 err("can't start usb-%s", gohci.slot_name);
1972 hc_release_ohci(&gohci);
1973 /* Initialization failed */
1974 #ifdef CFG_USB_OHCI_BOARD_INIT
1975 /* board dependant cleanup */
1979 #ifdef CFG_USB_OHCI_CPU_INIT
1980 /* cpu dependant cleanup */
1987 ohci_dump(&gohci, 1);
1995 int usb_lowlevel_stop(void)
1997 /* this gets called really early - before the controller has */
1998 /* even been initialized! */
2001 /* TODO release any interrupts, etc. */
2002 /* call hc_release_ohci() here ? */
2005 #ifdef CFG_USB_OHCI_BOARD_INIT
2006 /* board dependant cleanup */
2007 if (usb_board_stop())
2011 #ifdef CFG_USB_OHCI_CPU_INIT
2012 /* cpu dependant cleanup */
2016 /* This driver is no longer initialised. It needs a new low-level
2017 * init (board/cpu) before it can be used again. */
2021 #endif /* CONFIG_USB_OHCI_NEW */