drivers/usb/usb_ehci_core.c

   1 /*-
   2  * Copyright (c) 2007-2008, Juniper Networks, Inc.
   3  * Copyright (c) 2008, Excito Elektronik i Skåne AB
   4  * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation version 2 of
  11  * the License.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21  * MA 02111-1307 USA
  22  */
  23 #include <common.h>
  24 #include <asm/byteorder.h>
  25 #include <usb.h>
  26 #include <asm/io.h>
  27 #include <malloc.h>
  28 #include "usb_ehci.h"
  29
  30 int rootdev;
  31 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
  32 volatile struct ehci_hcor *hcor;
  33
  34 static uint16_t portreset;
  35 static struct QH qh_list __attribute__((aligned(32)));
  36
  37 static struct descriptor {
  38         struct usb_hub_descriptor hub;
  39         struct usb_device_descriptor device;
  40         struct usb_linux_config_descriptor config;
  41         struct usb_linux_interface_descriptor interface;
  42         struct usb_endpoint_descriptor endpoint;
  43 }  __attribute__ ((packed)) descriptor = {
  44         {
  45                 0x8,            /* bDescLength */
  46                 0x29,           /* bDescriptorType: hub descriptor */
  47                 2,              /* bNrPorts -- runtime modified */
  48                 0,              /* wHubCharacteristics */
  49                 0xff,           /* bPwrOn2PwrGood */
  50                 0,              /* bHubCntrCurrent */
  51                 {},             /* Device removable */
  52                 {}              /* at most 7 ports! XXX */
  53         },
  54         {
  55                 0x12,           /* bLength */
  56                 1,              /* bDescriptorType: UDESC_DEVICE */
  57                 0x0002,         /* bcdUSB: v2.0 */
  58                 9,              /* bDeviceClass: UDCLASS_HUB */
  59                 0,              /* bDeviceSubClass: UDSUBCLASS_HUB */
  60                 1,              /* bDeviceProtocol: UDPROTO_HSHUBSTT */
  61                 64,             /* bMaxPacketSize: 64 bytes */
  62                 0x0000,         /* idVendor */
  63                 0x0000,         /* idProduct */
  64                 0x0001,         /* bcdDevice */
  65                 1,              /* iManufacturer */
  66                 2,              /* iProduct */
  67                 0,              /* iSerialNumber */
  68                 1               /* bNumConfigurations: 1 */
  69         },
  70         {
  71                 0x9,
  72                 2,              /* bDescriptorType: UDESC_CONFIG */
  73                 cpu_to_le16(0x19),
  74                 1,              /* bNumInterface */
  75                 1,              /* bConfigurationValue */
  76                 0,              /* iConfiguration */
  77                 0x40,           /* bmAttributes: UC_SELF_POWER */
  78                 0               /* bMaxPower */
  79         },
  80         {
  81                 0x9,            /* bLength */
  82                 4,              /* bDescriptorType: UDESC_INTERFACE */
  83                 0,              /* bInterfaceNumber */
  84                 0,              /* bAlternateSetting */
  85                 1,              /* bNumEndpoints */
  86                 9,              /* bInterfaceClass: UICLASS_HUB */
  87                 0,              /* bInterfaceSubClass: UISUBCLASS_HUB */
  88                 0,              /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
  89                 0               /* iInterface */
  90         },
  91         {
  92                 0x7,            /* bLength */
  93                 5,              /* bDescriptorType: UDESC_ENDPOINT */
  94                 0x81,           /* bEndpointAddress:
  95                                  * UE_DIR_IN | EHCI_INTR_ENDPT
  96                                  */
  97                 3,              /* bmAttributes: UE_INTERRUPT */
  98                 8, 0,           /* wMaxPacketSize */
  99                 255             /* bInterval */
 100         },
 101 };
 102
 103 #if defined(CONFIG_EHCI_IS_TDI)
 104 #define ehci_is_TDI()   (1)
 105 #else
 106 #define ehci_is_TDI()   (0)
 107 #endif
 108
 109 #if defined(CONFIG_EHCI_DCACHE)
 110 /*
 111  * Routines to handle (flush/invalidate) the dcache for the QH and qTD
 112  * structures and data buffers. This is needed on platforms using this
 113  * EHCI support with dcache enabled.
 114  */
 115 static void flush_invalidate(u32 addr, int size, int flush)
 116 {
 117         if (flush)
 118                 flush_dcache_range(addr, addr + size);
 119         else
 120                 invalidate_dcache_range(addr, addr + size);
 121 }
 122
 123 static void cache_qtd(struct qTD *qtd, int flush)
 124 {
 125         u32 *ptr = (u32 *)qtd->qt_buffer[0];
 126         int len = (qtd->qt_token & 0x7fff0000) >> 16;
 127
 128         flush_invalidate((u32)qtd, sizeof(struct qTD), flush);
 129         if (ptr && len)
 130                 flush_invalidate((u32)ptr, len, flush);
 131 }
 132
 133
 134 static inline struct QH *qh_addr(struct QH *qh)
 135 {
 136         return (struct QH *)((u32)qh & 0xffffffe0);
 137 }
 138
 139 static void cache_qh(struct QH *qh, int flush)
 140 {
 141         struct qTD *qtd;
 142         struct qTD *next;
 143         static struct qTD *first_qtd;
 144
 145         /*
 146          * Walk the QH list and flush/invalidate all entries
 147          */
 148         while (1) {
 149                 flush_invalidate((u32)qh_addr(qh), sizeof(struct QH), flush);
 150                 if ((u32)qh & QH_LINK_TYPE_QH)
 151                         break;
 152                 qh = qh_addr(qh);
 153                 qh = (struct QH *)qh->qh_link;
 154         }
 155         qh = qh_addr(qh);
 156
 157         /*
 158          * Save first qTD pointer, needed for invalidating pass on this QH
 159          */
 160         if (flush)
 161                 first_qtd = qtd = (struct qTD *)(*(u32 *)&qh->qh_overlay &
 162                                                  0xffffffe0);
 163         else
 164                 qtd = first_qtd;
 165
 166         /*
 167          * Walk the qTD list and flush/invalidate all entries
 168          */
 169         while (1) {
 170                 if (qtd == NULL)
 171                         break;
 172                 cache_qtd(qtd, flush);
 173                 next = (struct qTD *)((u32)qtd->qt_next & 0xffffffe0);
 174                 if (next == qtd)
 175                         break;
 176                 qtd = next;
 177         }
 178 }
 179
 180 static inline void ehci_flush_dcache(struct QH *qh)
 181 {
 182         cache_qh(qh, 1);
 183 }
 184
 185 static inline void ehci_invalidate_dcache(struct QH *qh)
 186 {
 187         cache_qh(qh, 0);
 188 }
 189 #else /* CONFIG_EHCI_DCACHE */
 190 /*
 191  *
 192  */
 193 static inline void ehci_flush_dcache(struct QH *qh)
 194 {
 195 }
 196
 197 static inline void ehci_invalidate_dcache(struct QH *qh)
 198 {
 199 }
 200 #endif /* CONFIG_EHCI_DCACHE */
 201
 202 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int usec)
 203 {
 204         uint32_t result;
 205         do {
 206                 result = ehci_readl(ptr);
 207                 if (result == ~(uint32_t)0)
 208                         return -1;
 209                 result &= mask;
 210                 if (result == done)
 211                         return 0;
 212                 udelay(1);
 213                 usec--;
 214         } while (usec > 0);
 215         return -1;
 216 }
 217
 218 static void ehci_free(void *p, size_t sz)
 219 {
 220
 221 }
 222
 223 static int ehci_reset(void)
 224 {
 225         uint32_t cmd;
 226         uint32_t tmp;
 227         uint32_t *reg_ptr;
 228         int ret = 0;
 229
 230         cmd = ehci_readl(&hcor->or_usbcmd);
 231         cmd |= CMD_RESET;
 232         ehci_writel(&hcor->or_usbcmd, cmd);
 233         ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250 * 1000);
 234         if (ret < 0) {
 235                 printf("EHCI fail to reset\n");
 236                 goto out;
 237         }
 238
 239         if (ehci_is_TDI()) {
 240                 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
 241                 tmp = ehci_readl(reg_ptr);
 242                 tmp |= USBMODE_CM_HC;
 243 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
 244                 tmp |= USBMODE_BE;
 245 #endif
 246                 ehci_writel(reg_ptr, tmp);
 247         }
 248 out:
 249         return ret;
 250 }
 251
 252 static void *ehci_alloc(size_t sz, size_t align)
 253 {
 254         static struct QH qh __attribute__((aligned(32)));
 255         static struct qTD td[3] __attribute__((aligned (32)));
 256         static int ntds;
 257         void *p;
 258
 259         switch (sz) {
 260         case sizeof(struct QH):
 261                 p = &qh;
 262                 ntds = 0;
 263                 break;
 264         case sizeof(struct qTD):
 265                 if (ntds == 3) {
 266                         debug("out of TDs\n");
 267                         return NULL;
 268                 }
 269                 p = &td[ntds];
 270                 ntds++;
 271                 break;
 272         default:
 273                 debug("unknown allocation size\n");
 274                 return NULL;
 275         }
 276
 277         memset(p, sz, 0);
 278         return p;
 279 }
 280
 281 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
 282 {
 283         uint32_t addr, delta, next;
 284         int idx;
 285
 286         addr = (uint32_t) buf;
 287         idx = 0;
 288         while (idx < 5) {
 289                 td->qt_buffer[idx] = cpu_to_hc32(addr);
 290                 next = (addr + 4096) & ~4095;
 291                 delta = next - addr;
 292                 if (delta >= sz)
 293                         break;
 294                 sz -= delta;
 295                 addr = next;
 296                 idx++;
 297         }
 298
 299         if (idx == 5) {
 300                 debug("out of buffer pointers (%u bytes left)\n", sz);
 301                 return -1;
 302         }
 303
 304         return 0;
 305 }
 306
 307 static int
 308 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
 309                    int length, struct devrequest *req)
 310 {
 311         struct QH *qh;
 312         struct qTD *td;
 313         volatile struct qTD *vtd;
 314         unsigned long ts;
 315         uint32_t *tdp;
 316         uint32_t endpt, token, usbsts;
 317         uint32_t c, toggle;
 318         uint32_t cmd;
 319         int ret = 0;
 320
 321         debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
 322               buffer, length, req);
 323         if (req != NULL)
 324                 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
 325                       req->request, req->request,
 326                       req->requesttype, req->requesttype,
 327                       le16_to_cpu(req->value), le16_to_cpu(req->value),
 328                       le16_to_cpu(req->index));
 329
 330         qh = ehci_alloc(sizeof(struct QH), 32);
 331         if (qh == NULL) {
 332                 debug("unable to allocate QH\n");
 333                 return -1;
 334         }
 335         qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 336         c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
 337              usb_pipeendpoint(pipe) == 0) ? 1 : 0;
 338         endpt = (8 << 28) |
 339             (c << 27) |
 340             (usb_maxpacket(dev, pipe) << 16) |
 341             (0 << 15) |
 342             (1 << 14) |
 343             (usb_pipespeed(pipe) << 12) |
 344             (usb_pipeendpoint(pipe) << 8) |
 345             (0 << 7) | (usb_pipedevice(pipe) << 0);
 346         qh->qh_endpt1 = cpu_to_hc32(endpt);
 347         endpt = (1 << 30) |
 348             (dev->portnr << 23) |
 349             (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
 350         qh->qh_endpt2 = cpu_to_hc32(endpt);
 351         qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 352         qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 353
 354         td = NULL;
 355         tdp = &qh->qh_overlay.qt_next;
 356
 357         toggle =
 358             usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
 359
 360         if (req != NULL) {
 361                 td = ehci_alloc(sizeof(struct qTD), 32);
 362                 if (td == NULL) {
 363                         debug("unable to allocate SETUP td\n");
 364                         goto fail;
 365                 }
 366                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 367                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 368                 token = (0 << 31) |
 369                     (sizeof(*req) << 16) |
 370                     (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
 371                 td->qt_token = cpu_to_hc32(token);
 372                 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
 373                         debug("unable construct SETUP td\n");
 374                         ehci_free(td, sizeof(*td));
 375                         goto fail;
 376                 }
 377                 *tdp = cpu_to_hc32((uint32_t) td);
 378                 tdp = &td->qt_next;
 379                 toggle = 1;
 380         }
 381
 382         if (length > 0 || req == NULL) {
 383                 td = ehci_alloc(sizeof(struct qTD), 32);
 384                 if (td == NULL) {
 385                         debug("unable to allocate DATA td\n");
 386                         goto fail;
 387                 }
 388                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 389                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 390                 token = (toggle << 31) |
 391                     (length << 16) |
 392                     ((req == NULL ? 1 : 0) << 15) |
 393                     (0 << 12) |
 394                     (3 << 10) |
 395                     ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
 396                 td->qt_token = cpu_to_hc32(token);
 397                 if (ehci_td_buffer(td, buffer, length) != 0) {
 398                         debug("unable construct DATA td\n");
 399                         ehci_free(td, sizeof(*td));
 400                         goto fail;
 401                 }
 402                 *tdp = cpu_to_hc32((uint32_t) td);
 403                 tdp = &td->qt_next;
 404         }
 405
 406         if (req != NULL) {
 407                 td = ehci_alloc(sizeof(struct qTD), 32);
 408                 if (td == NULL) {
 409                         debug("unable to allocate ACK td\n");
 410                         goto fail;
 411                 }
 412                 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 413                 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 414                 token = (toggle << 31) |
 415                     (0 << 16) |
 416                     (1 << 15) |
 417                     (0 << 12) |
 418                     (3 << 10) |
 419                     ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
 420                 td->qt_token = cpu_to_hc32(token);
 421                 *tdp = cpu_to_hc32((uint32_t) td);
 422                 tdp = &td->qt_next;
 423         }
 424
 425         qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
 426
 427         /* Flush dcache */
 428         ehci_flush_dcache(&qh_list);
 429
 430         usbsts = ehci_readl(&hcor->or_usbsts);
 431         ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
 432
 433         /* Enable async. schedule. */
 434         cmd = ehci_readl(&hcor->or_usbcmd);
 435         cmd |= CMD_ASE;
 436         ehci_writel(&hcor->or_usbcmd, cmd);
 437
 438         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, STD_ASS,
 439                         100 * 1000);
 440         if (ret < 0) {
 441                 printf("EHCI fail timeout STD_ASS set\n");
 442                 goto fail;
 443         }
 444
 445         /* Wait for TDs to be processed. */
 446         ts = get_timer(0);
 447         vtd = td;
 448         do {
 449                 /* Invalidate dcache */
 450                 ehci_invalidate_dcache(&qh_list);
 451                 token = hc32_to_cpu(vtd->qt_token);
 452                 if (!(token & 0x80))
 453                         break;
 454         } while (get_timer(ts) < CONFIG_SYS_HZ);
 455
 456         /* Disable async schedule. */
 457         cmd = ehci_readl(&hcor->or_usbcmd);
 458         cmd &= ~CMD_ASE;
 459         ehci_writel(&hcor->or_usbcmd, cmd);
 460
 461         ret = handshake((uint32_t *)&hcor->or_usbsts, STD_ASS, 0,
 462                         100 * 1000);
 463         if (ret < 0) {
 464                 printf("EHCI fail timeout STD_ASS reset\n");
 465                 goto fail;
 466         }
 467
 468         qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 469
 470         token = hc32_to_cpu(qh->qh_overlay.qt_token);
 471         if (!(token & 0x80)) {
 472                 debug("TOKEN=%#x\n", token);
 473                 switch (token & 0xfc) {
 474                 case 0:
 475                         toggle = token >> 31;
 476                         usb_settoggle(dev, usb_pipeendpoint(pipe),
 477                                        usb_pipeout(pipe), toggle);
 478                         dev->status = 0;
 479                         break;
 480                 case 0x40:
 481                         dev->status = USB_ST_STALLED;
 482                         break;
 483                 case 0xa0:
 484                 case 0x20:
 485                         dev->status = USB_ST_BUF_ERR;
 486                         break;
 487                 case 0x50:
 488                 case 0x10:
 489                         dev->status = USB_ST_BABBLE_DET;
 490                         break;
 491                 default:
 492                         dev->status = USB_ST_CRC_ERR;
 493                         break;
 494                 }
 495                 dev->act_len = length - ((token >> 16) & 0x7fff);
 496         } else {
 497                 dev->act_len = 0;
 498                 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
 499                       dev->devnum, ehci_readl(&hcor->or_usbsts),
 500                       ehci_readl(&hcor->or_portsc[0]),
 501                       ehci_readl(&hcor->or_portsc[1]));
 502         }
 503
 504         return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
 505
 506 fail:
 507         td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
 508         while (td != (void *)QT_NEXT_TERMINATE) {
 509                 qh->qh_overlay.qt_next = td->qt_next;
 510                 ehci_free(td, sizeof(*td));
 511                 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
 512         }
 513         ehci_free(qh, sizeof(*qh));
 514         return -1;
 515 }
 516
 517 static inline int min3(int a, int b, int c)
 518 {
 519
 520         if (b < a)
 521                 a = b;
 522         if (c < a)
 523                 a = c;
 524         return a;
 525 }
 526
 527 int
 528 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
 529                  int length, struct devrequest *req)
 530 {
 531         uint8_t tmpbuf[4];
 532         u16 typeReq;
 533         void *srcptr = NULL;
 534         int len, srclen;
 535         uint32_t reg;
 536         uint32_t *status_reg;
 537
 538         if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
 539                 printf("The request port(%d) is not configured\n",
 540                         le16_to_cpu(req->index) - 1);
 541                 return -1;
 542         }
 543         status_reg = (uint32_t *)&hcor->or_portsc[
 544                                                 le16_to_cpu(req->index) - 1];
 545         srclen = 0;
 546
 547         debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
 548               req->request, req->request,
 549               req->requesttype, req->requesttype,
 550               le16_to_cpu(req->value), le16_to_cpu(req->index));
 551
 552         typeReq = req->request << 8 | req->requesttype;
 553
 554         switch (le16_to_cpu(typeReq)) {
 555         case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
 556                 switch (le16_to_cpu(req->value) >> 8) {
 557                 case USB_DT_DEVICE:
 558                         debug("USB_DT_DEVICE request\n");
 559                         srcptr = &descriptor.device;
 560                         srclen = 0x12;
 561                         break;
 562                 case USB_DT_CONFIG:
 563                         debug("USB_DT_CONFIG config\n");
 564                         srcptr = &descriptor.config;
 565                         srclen = 0x19;
 566                         break;
 567                 case USB_DT_STRING:
 568                         debug("USB_DT_STRING config\n");
 569                         switch (le16_to_cpu(req->value) & 0xff) {
 570                         case 0: /* Language */
 571                                 srcptr = "\4\3\1\0";
 572                                 srclen = 4;
 573                                 break;
 574                         case 1: /* Vendor */
 575                                 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
 576                                 srclen = 14;
 577                                 break;
 578                         case 2: /* Product */
 579                                 srcptr = "\52\3E\0H\0C\0I\0 "
 580                                          "\0H\0o\0s\0t\0 "
 581                                          "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
 582                                 srclen = 42;
 583                                 break;
 584                         default:
 585                                 debug("unknown value DT_STRING %x\n",
 586                                         le16_to_cpu(req->value));
 587                                 goto unknown;
 588                         }
 589                         break;
 590                 default:
 591                         debug("unknown value %x\n", le16_to_cpu(req->value));
 592                         goto unknown;
 593                 }
 594                 break;
 595         case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
 596                 switch (le16_to_cpu(req->value) >> 8) {
 597                 case USB_DT_HUB:
 598                         debug("USB_DT_HUB config\n");
 599                         srcptr = &descriptor.hub;
 600                         srclen = 0x8;
 601                         break;
 602                 default:
 603                         debug("unknown value %x\n", le16_to_cpu(req->value));
 604                         goto unknown;
 605                 }
 606                 break;
 607         case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
 608                 debug("USB_REQ_SET_ADDRESS\n");
 609                 rootdev = le16_to_cpu(req->value);
 610                 break;
 611         case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
 612                 debug("USB_REQ_SET_CONFIGURATION\n");
 613                 /* Nothing to do */
 614                 break;
 615         case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
 616                 tmpbuf[0] = 1;  /* USB_STATUS_SELFPOWERED */
 617                 tmpbuf[1] = 0;
 618                 srcptr = tmpbuf;
 619                 srclen = 2;
 620                 break;
 621         case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
 622                 memset(tmpbuf, 0, 4);
 623                 reg = ehci_readl(status_reg);
 624                 if (reg & EHCI_PS_CS)
 625                         tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
 626                 if (reg & EHCI_PS_PE)
 627                         tmpbuf[0] |= USB_PORT_STAT_ENABLE;
 628                 if (reg & EHCI_PS_SUSP)
 629                         tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
 630                 if (reg & EHCI_PS_OCA)
 631                         tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
 632                 if (reg & EHCI_PS_PR &&
 633                     (portreset & (1 << le16_to_cpu(req->index)))) {
 634                         int ret;
 635                         /* force reset to complete */
 636                         reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
 637                         ehci_writel(status_reg, reg);
 638                         ret = handshake(status_reg, EHCI_PS_PR, 0, 2 * 1000);
 639                         if (!ret)
 640                                 tmpbuf[0] |= USB_PORT_STAT_RESET;
 641                         else
 642                                 printf("port(%d) reset error\n",
 643                                         le16_to_cpu(req->index) - 1);
 644                 }
 645                 if (reg & EHCI_PS_PP)
 646                         tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
 647
 648                 if (ehci_is_TDI()) {
 649                         switch ((reg >> 26) & 3) {
 650                         case 0:
 651                                 break;
 652                         case 1:
 653                                 tmpbuf[1] |= USB_PORT_STAT_LOW_SPEED >> 8;
 654                                 break;
 655                         case 2:
 656                         default:
 657                                 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 658                                 break;
 659                         }
 660                 } else {
 661                         tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
 662                 }
 663
 664                 if (reg & EHCI_PS_CSC)
 665                         tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
 666                 if (reg & EHCI_PS_PEC)
 667                         tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
 668                 if (reg & EHCI_PS_OCC)
 669                         tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
 670                 if (portreset & (1 << le16_to_cpu(req->index)))
 671                         tmpbuf[2] |= USB_PORT_STAT_C_RESET;
 672
 673                 srcptr = tmpbuf;
 674                 srclen = 4;
 675                 break;
 676         case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 677                 reg = ehci_readl(status_reg);
 678                 reg &= ~EHCI_PS_CLEAR;
 679                 switch (le16_to_cpu(req->value)) {
 680                 case USB_PORT_FEAT_ENABLE:
 681                         reg |= EHCI_PS_PE;
 682                         ehci_writel(status_reg, reg);
 683                         break;
 684                 case USB_PORT_FEAT_POWER:
 685                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
 686                                 reg |= EHCI_PS_PP;
 687                                 ehci_writel(status_reg, reg);
 688                         }
 689                         break;
 690                 case USB_PORT_FEAT_RESET:
 691                         if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
 692                             !ehci_is_TDI() &&
 693                             EHCI_PS_IS_LOWSPEED(reg)) {
 694                                 /* Low speed device, give up ownership. */
 695                                 debug("port %d low speed --> companion\n",
 696                                       req->index - 1);
 697                                 reg |= EHCI_PS_PO;
 698                                 ehci_writel(status_reg, reg);
 699                                 break;
 700                         } else {
 701                                 reg |= EHCI_PS_PR;
 702                                 reg &= ~EHCI_PS_PE;
 703                                 ehci_writel(status_reg, reg);
 704                                 /*
 705                                  * caller must wait, then call GetPortStatus
 706                                  * usb 2.0 specification say 50 ms resets on
 707                                  * root
 708                                  */
 709                                 wait_ms(50);
 710                                 portreset |= 1 << le16_to_cpu(req->index);
 711                         }
 712                         break;
 713                 default:
 714                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 715                         goto unknown;
 716                 }
 717                 /* unblock posted writes */
 718                 ehci_readl(&hcor->or_usbcmd);
 719                 break;
 720         case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
 721                 reg = ehci_readl(status_reg);
 722                 switch (le16_to_cpu(req->value)) {
 723                 case USB_PORT_FEAT_ENABLE:
 724                         reg &= ~EHCI_PS_PE;
 725                         break;
 726                 case USB_PORT_FEAT_C_ENABLE:
 727                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
 728                         break;
 729                 case USB_PORT_FEAT_POWER:
 730                         if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
 731                                 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
 732                 case USB_PORT_FEAT_C_CONNECTION:
 733                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
 734                         break;
 735                 case USB_PORT_FEAT_OVER_CURRENT:
 736                         reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
 737                         break;
 738                 case USB_PORT_FEAT_C_RESET:
 739                         portreset &= ~(1 << le16_to_cpu(req->index));
 740                         break;
 741                 default:
 742                         debug("unknown feature %x\n", le16_to_cpu(req->value));
 743                         goto unknown;
 744                 }
 745                 ehci_writel(status_reg, reg);
 746                 /* unblock posted write */
 747                 ehci_readl(&hcor->or_usbcmd);
 748                 break;
 749         default:
 750                 debug("Unknown request\n");
 751                 goto unknown;
 752         }
 753
 754         wait_ms(1);
 755         len = min3(srclen, le16_to_cpu(req->length), length);
 756         if (srcptr != NULL && len > 0)
 757                 memcpy(buffer, srcptr, len);
 758         else
 759                 debug("Len is 0\n");
 760
 761         dev->act_len = len;
 762         dev->status = 0;
 763         return 0;
 764
 765 unknown:
 766         debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
 767               req->requesttype, req->request, le16_to_cpu(req->value),
 768               le16_to_cpu(req->index), le16_to_cpu(req->length));
 769
 770         dev->act_len = 0;
 771         dev->status = USB_ST_STALLED;
 772         return -1;
 773 }
 774
 775 int usb_lowlevel_stop(void)
 776 {
 777         return ehci_hcd_stop();
 778 }
 779
 780 int usb_lowlevel_init(void)
 781 {
 782         uint32_t reg;
 783         uint32_t cmd;
 784
 785         if (ehci_hcd_init() != 0)
 786                 return -1;
 787
 788         /* EHCI spec section 4.1 */
 789         if (ehci_reset() != 0)
 790                 return -1;
 791
 792 #if defined(CONFIG_EHCI_HCD_INIT_AFTER_RESET)
 793         if (ehci_hcd_init() != 0)
 794                 return -1;
 795 #endif
 796
 797         /* Set head of reclaim list */
 798         memset(&qh_list, 0, sizeof(qh_list));
 799         qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
 800         qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
 801         qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
 802         qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
 803         qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
 804         qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
 805
 806         /* Set async. queue head pointer. */
 807         ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
 808
 809         reg = ehci_readl(&hccr->cr_hcsparams);
 810         descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
 811         printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
 812         /* Port Indicators */
 813         if (HCS_INDICATOR(reg))
 814                 descriptor.hub.wHubCharacteristics |= 0x80;
 815         /* Port Power Control */
 816         if (HCS_PPC(reg))
 817                 descriptor.hub.wHubCharacteristics |= 0x01;
 818
 819         /* Start the host controller. */
 820         cmd = ehci_readl(&hcor->or_usbcmd);
 821         /* Philips, Intel, and maybe others need CMD_RUN before the
 822          * root hub will detect new devices (why?); NEC doesn't */
 823         cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 824         cmd |= CMD_RUN;
 825         ehci_writel(&hcor->or_usbcmd, cmd);
 826
 827         /* take control over the ports */
 828         cmd = ehci_readl(&hcor->or_configflag);
 829         cmd |= FLAG_CF;
 830         ehci_writel(&hcor->or_configflag, cmd);
 831         /* unblock posted write */
 832         cmd = ehci_readl(&hcor->or_usbcmd);
 833         wait_ms(5);
 834         reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
 835         printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
 836
 837         rootdev = 0;
 838
 839         return 0;
 840 }
 841
 842 int
 843 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 844                 int length)
 845 {
 846
 847         if (usb_pipetype(pipe) != PIPE_BULK) {
 848                 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
 849                 return -1;
 850         }
 851         return ehci_submit_async(dev, pipe, buffer, length, NULL);
 852 }
 853
 854 int
 855 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 856                    int length, struct devrequest *setup)
 857 {
 858
 859         if (usb_pipetype(pipe) != PIPE_CONTROL) {
 860                 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
 861                 return -1;
 862         }
 863
 864         if (usb_pipedevice(pipe) == rootdev) {
 865                 if (rootdev == 0)
 866                         dev->speed = USB_SPEED_HIGH;
 867                 return ehci_submit_root(dev, pipe, buffer, length, setup);
 868         }
 869         return ehci_submit_async(dev, pipe, buffer, length, setup);
 870 }
 871
 872 int
 873 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
 874                int length, int interval)
 875 {
 876
 877         debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
 878               dev, pipe, buffer, length, interval);
 879         return -1;
 880 }