2 * Copyright (c) 2007-2008, Juniper Networks, Inc.
3 * Copyright (c) 2008, Excito Elektronik i Skåne AB
4 * Copyright (c) 2008, Michael Trimarchi <trimarchimichael@yahoo.it>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation version 2 of
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 #include <asm/byteorder.h>
31 struct ehci_hccr *hccr; /* R/O registers, not need for volatile */
32 volatile struct ehci_hcor *hcor;
34 static uint16_t portreset;
35 static struct QH qh_list __attribute__((aligned(32)));
37 static struct descriptor {
38 struct usb_hub_descriptor hub;
39 struct usb_device_descriptor device;
40 struct usb_linux_config_descriptor config;
41 struct usb_linux_interface_descriptor interface;
42 struct usb_endpoint_descriptor endpoint;
43 } __attribute__ ((packed)) descriptor = {
45 0x8, /* bDescLength */
46 0x29, /* bDescriptorType: hub descriptor */
47 2, /* bNrPorts -- runtime modified */
48 0, /* wHubCharacteristics */
49 0xff, /* bPwrOn2PwrGood */
50 0, /* bHubCntrCurrent */
51 {}, /* Device removable */
52 {} /* at most 7 ports! XXX */
56 1, /* bDescriptorType: UDESC_DEVICE */
57 0x0002, /* bcdUSB: v2.0 */
58 9, /* bDeviceClass: UDCLASS_HUB */
59 0, /* bDeviceSubClass: UDSUBCLASS_HUB */
60 1, /* bDeviceProtocol: UDPROTO_HSHUBSTT */
61 64, /* bMaxPacketSize: 64 bytes */
62 0x0000, /* idVendor */
63 0x0000, /* idProduct */
64 0x0001, /* bcdDevice */
65 1, /* iManufacturer */
67 0, /* iSerialNumber */
68 1 /* bNumConfigurations: 1 */
72 2, /* bDescriptorType: UDESC_CONFIG */
74 1, /* bNumInterface */
75 1, /* bConfigurationValue */
76 0, /* iConfiguration */
77 0x40, /* bmAttributes: UC_SELF_POWER */
82 4, /* bDescriptorType: UDESC_INTERFACE */
83 0, /* bInterfaceNumber */
84 0, /* bAlternateSetting */
85 1, /* bNumEndpoints */
86 9, /* bInterfaceClass: UICLASS_HUB */
87 0, /* bInterfaceSubClass: UISUBCLASS_HUB */
88 0, /* bInterfaceProtocol: UIPROTO_HSHUBSTT */
93 5, /* bDescriptorType: UDESC_ENDPOINT */
94 0x81, /* bEndpointAddress:
95 * UE_DIR_IN | EHCI_INTR_ENDPT
97 3, /* bmAttributes: UE_INTERRUPT */
98 8, 0, /* wMaxPacketSize */
103 #if defined(CONFIG_EHCI_IS_TDI)
104 #define ehci_is_TDI() (1)
106 #define ehci_is_TDI() (0)
109 static int handshake(uint32_t *ptr, uint32_t mask, uint32_t done, int msec)
113 result = ehci_readl(ptr);
114 debug("handshake read reg(%x)=%x\n", (uint32_t)ptr, result);
115 if (result == ~(uint32_t)0)
126 static void ehci_free(void *p, size_t sz)
131 static int ehci_reset(void)
138 cmd = ehci_readl(&hcor->or_usbcmd);
140 ehci_writel(&hcor->or_usbcmd, cmd);
141 ret = handshake((uint32_t *)&hcor->or_usbcmd, CMD_RESET, 0, 250);
143 printf("EHCI fail to reset\n");
147 #if defined(CONFIG_EHCI_IS_TDI)
148 reg_ptr = (uint32_t *)((u8 *)hcor + USBMODE);
149 tmp = ehci_readl(reg_ptr);
150 tmp |= USBMODE_CM_HC;
151 #if defined(CONFIG_EHCI_MMIO_BIG_ENDIAN)
154 ehci_writel(reg_ptr, tmp);
160 static void *ehci_alloc(size_t sz, size_t align)
162 static struct QH qh __attribute__((aligned(32)));
163 static struct qTD td[3] __attribute__((aligned (32)));
168 case sizeof(struct QH):
172 case sizeof(struct qTD):
174 debug("out of TDs\n");
181 debug("unknown allocation size\n");
189 static int ehci_td_buffer(struct qTD *td, void *buf, size_t sz)
191 uint32_t addr, delta, next;
194 addr = (uint32_t) buf;
197 td->qt_buffer[idx] = cpu_to_hc32(addr);
198 next = (addr + 4096) & ~4095;
208 debug("out of buffer pointers (%u bytes left)\n", sz);
216 ehci_submit_async(struct usb_device *dev, unsigned long pipe, void *buffer,
217 int length, struct devrequest *req)
221 volatile struct qTD *vtd;
224 uint32_t endpt, token, usbsts;
229 debug("dev=%p, pipe=%lx, buffer=%p, length=%d, req=%p\n", dev, pipe,
230 buffer, length, req);
232 debug("req=%u (%#x), type=%u (%#x), value=%u (%#x), index=%u\n",
233 req->request, req->request,
234 req->requesttype, req->requesttype,
235 le16_to_cpu(req->value), le16_to_cpu(req->value),
236 le16_to_cpu(req->index));
238 qh = ehci_alloc(sizeof(struct QH), 32);
240 debug("unable to allocate QH\n");
243 qh->qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
244 c = (usb_pipespeed(pipe) != USB_SPEED_HIGH &&
245 usb_pipeendpoint(pipe) == 0) ? 1 : 0;
248 (usb_maxpacket(dev, pipe) << 16) |
251 (usb_pipespeed(pipe) << 12) |
252 (usb_pipeendpoint(pipe) << 8) |
253 (0 << 7) | (usb_pipedevice(pipe) << 0);
254 qh->qh_endpt1 = cpu_to_hc32(endpt);
256 (dev->portnr << 23) |
257 (dev->parent->devnum << 16) | (0 << 8) | (0 << 0);
258 qh->qh_endpt2 = cpu_to_hc32(endpt);
259 qh->qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
260 qh->qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
263 tdp = &qh->qh_overlay.qt_next;
266 usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe));
269 td = ehci_alloc(sizeof(struct qTD), 32);
271 debug("unable to allocate SETUP td\n");
274 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
275 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
277 (sizeof(*req) << 16) |
278 (0 << 15) | (0 << 12) | (3 << 10) | (2 << 8) | (0x80 << 0);
279 td->qt_token = cpu_to_hc32(token);
280 if (ehci_td_buffer(td, req, sizeof(*req)) != 0) {
281 debug("unable construct SETUP td\n");
282 ehci_free(td, sizeof(*td));
285 *tdp = cpu_to_hc32((uint32_t) td);
290 if (length > 0 || req == NULL) {
291 td = ehci_alloc(sizeof(struct qTD), 32);
293 debug("unable to allocate DATA td\n");
296 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
297 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
298 token = (toggle << 31) |
300 ((req == NULL ? 1 : 0) << 15) |
303 ((usb_pipein(pipe) ? 1 : 0) << 8) | (0x80 << 0);
304 td->qt_token = cpu_to_hc32(token);
305 if (ehci_td_buffer(td, buffer, length) != 0) {
306 debug("unable construct DATA td\n");
307 ehci_free(td, sizeof(*td));
310 *tdp = cpu_to_hc32((uint32_t) td);
315 td = ehci_alloc(sizeof(struct qTD), 32);
317 debug("unable to allocate ACK td\n");
320 td->qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
321 td->qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
322 token = (toggle << 31) |
327 ((usb_pipein(pipe) ? 0 : 1) << 8) | (0x80 << 0);
328 td->qt_token = cpu_to_hc32(token);
329 *tdp = cpu_to_hc32((uint32_t) td);
333 qh_list.qh_link = cpu_to_hc32((uint32_t) qh | QH_LINK_TYPE_QH);
335 usbsts = ehci_readl(&hcor->or_usbsts);
336 ehci_writel(&hcor->or_usbsts, (usbsts & 0x3f));
338 /* Enable async. schedule. */
339 cmd = ehci_readl(&hcor->or_usbcmd);
341 ehci_writel(&hcor->or_usbcmd, cmd);
343 sts = ehci_readl(&hcor->or_usbsts);
344 while ((sts & STD_ASS) == 0) {
345 sts = ehci_readl(&hcor->or_usbsts);
349 /* Wait for TDs to be processed. */
353 token = hc32_to_cpu(vtd->qt_token);
356 } while (get_timer(ts) < CONFIG_SYS_HZ);
358 /* Disable async schedule. */
359 cmd = ehci_readl(&hcor->or_usbcmd);
361 ehci_writel(&hcor->or_usbcmd, cmd);
363 sts = ehci_readl(&hcor->or_usbsts);
364 while ((sts & STD_ASS) != 0) {
365 sts = ehci_readl(&hcor->or_usbsts);
369 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
371 token = hc32_to_cpu(qh->qh_overlay.qt_token);
372 if (!(token & 0x80)) {
373 debug("TOKEN=%#x\n", token);
374 switch (token & 0xfc) {
376 toggle = token >> 31;
377 usb_settoggle(dev, usb_pipeendpoint(pipe),
378 usb_pipeout(pipe), toggle);
382 dev->status = USB_ST_STALLED;
386 dev->status = USB_ST_BUF_ERR;
390 dev->status = USB_ST_BABBLE_DET;
393 dev->status = USB_ST_CRC_ERR;
396 dev->act_len = length - ((token >> 16) & 0x7fff);
399 debug("dev=%u, usbsts=%#x, p[1]=%#x, p[2]=%#x\n",
400 dev->devnum, ehci_readl(&hcor->or_usbsts),
401 ehci_readl(&hcor->or_portsc[0]),
402 ehci_readl(&hcor->or_portsc[1]));
405 return (dev->status != USB_ST_NOT_PROC) ? 0 : -1;
408 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
409 while (td != (void *)QT_NEXT_TERMINATE) {
410 qh->qh_overlay.qt_next = td->qt_next;
411 ehci_free(td, sizeof(*td));
412 td = (void *)hc32_to_cpu(qh->qh_overlay.qt_next);
414 ehci_free(qh, sizeof(*qh));
418 static inline int min3(int a, int b, int c)
429 ehci_submit_root(struct usb_device *dev, unsigned long pipe, void *buffer,
430 int length, struct devrequest *req)
437 uint32_t *status_reg;
439 if (le16_to_cpu(req->index) >= CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS) {
440 printf("The request port(%d) is not configured\n",
441 le16_to_cpu(req->index) - 1);
444 status_reg = (uint32_t *)&hcor->or_portsc[
445 le16_to_cpu(req->index) - 1];
448 debug("req=%u (%#x), type=%u (%#x), value=%u, index=%u\n",
449 req->request, req->request,
450 req->requesttype, req->requesttype,
451 le16_to_cpu(req->value), le16_to_cpu(req->index));
453 typeReq = req->request << 8 | req->requesttype;
455 switch (le16_to_cpu(typeReq)) {
456 case DeviceRequest | USB_REQ_GET_DESCRIPTOR:
457 switch (le16_to_cpu(req->value) >> 8) {
459 debug("USB_DT_DEVICE request\n");
460 srcptr = &descriptor.device;
464 debug("USB_DT_CONFIG config\n");
465 srcptr = &descriptor.config;
469 debug("USB_DT_STRING config\n");
470 switch (le16_to_cpu(req->value) & 0xff) {
471 case 0: /* Language */
476 srcptr = "\16\3u\0-\0b\0o\0o\0t\0";
479 case 2: /* Product */
480 srcptr = "\52\3E\0H\0C\0I\0 "
482 "\0C\0o\0n\0t\0r\0o\0l\0l\0e\0r\0";
486 debug("unknown value DT_STRING %x\n",
487 le16_to_cpu(req->value));
492 debug("unknown value %x\n", le16_to_cpu(req->value));
496 case USB_REQ_GET_DESCRIPTOR | ((USB_DIR_IN | USB_RT_HUB) << 8):
497 switch (le16_to_cpu(req->value) >> 8) {
499 debug("USB_DT_HUB config\n");
500 srcptr = &descriptor.hub;
504 debug("unknown value %x\n", le16_to_cpu(req->value));
508 case USB_REQ_SET_ADDRESS | (USB_RECIP_DEVICE << 8):
509 debug("USB_REQ_SET_ADDRESS\n");
510 rootdev = le16_to_cpu(req->value);
512 case DeviceOutRequest | USB_REQ_SET_CONFIGURATION:
513 debug("USB_REQ_SET_CONFIGURATION\n");
516 case USB_REQ_GET_STATUS | ((USB_DIR_IN | USB_RT_HUB) << 8):
517 tmpbuf[0] = 1; /* USB_STATUS_SELFPOWERED */
522 case USB_REQ_GET_STATUS | ((USB_RT_PORT | USB_DIR_IN) << 8):
523 memset(tmpbuf, 0, 4);
524 reg = ehci_readl(status_reg);
525 if (reg & EHCI_PS_CS)
526 tmpbuf[0] |= USB_PORT_STAT_CONNECTION;
527 if (reg & EHCI_PS_PE)
528 tmpbuf[0] |= USB_PORT_STAT_ENABLE;
529 if (reg & EHCI_PS_SUSP)
530 tmpbuf[0] |= USB_PORT_STAT_SUSPEND;
531 if (reg & EHCI_PS_OCA)
532 tmpbuf[0] |= USB_PORT_STAT_OVERCURRENT;
533 if (reg & EHCI_PS_PR &&
534 (portreset & (1 << le16_to_cpu(req->index)))) {
536 /* force reset to complete */
537 reg = reg & ~(EHCI_PS_PR | EHCI_PS_CLEAR);
538 ehci_writel(status_reg, reg);
539 ret = handshake(status_reg, EHCI_PS_PR, 0, 2);
541 tmpbuf[0] |= USB_PORT_STAT_RESET;
543 printf("port(%d) reset error\n",
544 le16_to_cpu(req->index) - 1);
546 if (reg & EHCI_PS_PP)
547 tmpbuf[1] |= USB_PORT_STAT_POWER >> 8;
548 tmpbuf[1] |= USB_PORT_STAT_HIGH_SPEED >> 8;
550 if (reg & EHCI_PS_CSC)
551 tmpbuf[2] |= USB_PORT_STAT_C_CONNECTION;
552 if (reg & EHCI_PS_PEC)
553 tmpbuf[2] |= USB_PORT_STAT_C_ENABLE;
554 if (reg & EHCI_PS_OCC)
555 tmpbuf[2] |= USB_PORT_STAT_C_OVERCURRENT;
556 if (portreset & (1 << le16_to_cpu(req->index)))
557 tmpbuf[2] |= USB_PORT_STAT_C_RESET;
562 case USB_REQ_SET_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
563 reg = ehci_readl(status_reg);
564 reg &= ~EHCI_PS_CLEAR;
565 switch (le16_to_cpu(req->value)) {
566 case USB_PORT_FEAT_ENABLE:
568 ehci_writel(status_reg, reg);
570 case USB_PORT_FEAT_POWER:
571 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams))) {
573 ehci_writel(status_reg, reg);
576 case USB_PORT_FEAT_RESET:
577 if ((reg & (EHCI_PS_PE | EHCI_PS_CS)) == EHCI_PS_CS &&
579 EHCI_PS_IS_LOWSPEED(reg)) {
580 /* Low speed device, give up ownership. */
581 debug("port %d low speed --> companion\n",
584 ehci_writel(status_reg, reg);
589 ehci_writel(status_reg, reg);
591 * caller must wait, then call GetPortStatus
592 * usb 2.0 specification say 50 ms resets on
596 portreset |= 1 << le16_to_cpu(req->index);
600 debug("unknown feature %x\n", le16_to_cpu(req->value));
603 /* unblock posted writes */
604 ehci_readl(&hcor->or_usbcmd);
606 case USB_REQ_CLEAR_FEATURE | ((USB_DIR_OUT | USB_RT_PORT) << 8):
607 reg = ehci_readl(status_reg);
608 switch (le16_to_cpu(req->value)) {
609 case USB_PORT_FEAT_ENABLE:
612 case USB_PORT_FEAT_C_ENABLE:
613 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_PE;
615 case USB_PORT_FEAT_POWER:
616 if (HCS_PPC(ehci_readl(&hccr->cr_hcsparams)))
617 reg = reg & ~(EHCI_PS_CLEAR | EHCI_PS_PP);
618 case USB_PORT_FEAT_C_CONNECTION:
619 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_CSC;
621 case USB_PORT_FEAT_OVER_CURRENT:
622 reg = (reg & ~EHCI_PS_CLEAR) | EHCI_PS_OCC;
624 case USB_PORT_FEAT_C_RESET:
625 portreset &= ~(1 << le16_to_cpu(req->index));
628 debug("unknown feature %x\n", le16_to_cpu(req->value));
631 ehci_writel(status_reg, reg);
632 /* unblock posted write */
633 ehci_readl(&hcor->or_usbcmd);
636 debug("Unknown request\n");
641 len = min3(srclen, le16_to_cpu(req->length), length);
642 if (srcptr != NULL && len > 0)
643 memcpy(buffer, srcptr, len);
652 debug("requesttype=%x, request=%x, value=%x, index=%x, length=%x\n",
653 req->requesttype, req->request, le16_to_cpu(req->value),
654 le16_to_cpu(req->index), le16_to_cpu(req->length));
657 dev->status = USB_ST_STALLED;
661 int usb_lowlevel_stop(void)
663 return ehci_hcd_stop();
666 int usb_lowlevel_init(void)
671 if (ehci_hcd_init() != 0)
674 /* EHCI spec section 4.1 */
675 if (ehci_reset() != 0)
678 /* Set head of reclaim list */
679 memset(&qh_list, 0, sizeof(qh_list));
680 qh_list.qh_link = cpu_to_hc32((uint32_t)&qh_list | QH_LINK_TYPE_QH);
681 qh_list.qh_endpt1 = cpu_to_hc32((1 << 15) | (USB_SPEED_HIGH << 12));
682 qh_list.qh_curtd = cpu_to_hc32(QT_NEXT_TERMINATE);
683 qh_list.qh_overlay.qt_next = cpu_to_hc32(QT_NEXT_TERMINATE);
684 qh_list.qh_overlay.qt_altnext = cpu_to_hc32(QT_NEXT_TERMINATE);
685 qh_list.qh_overlay.qt_token = cpu_to_hc32(0x40);
687 /* Set async. queue head pointer. */
688 ehci_writel(&hcor->or_asynclistaddr, (uint32_t)&qh_list);
690 reg = ehci_readl(&hccr->cr_hcsparams);
691 descriptor.hub.bNbrPorts = HCS_N_PORTS(reg);
692 printf("Register %x NbrPorts %d\n", reg, descriptor.hub.bNbrPorts);
693 /* Port Indicators */
694 if (HCS_INDICATOR(reg))
695 descriptor.hub.wHubCharacteristics |= 0x80;
696 /* Port Power Control */
698 descriptor.hub.wHubCharacteristics |= 0x01;
700 /* Start the host controller. */
701 cmd = ehci_readl(&hcor->or_usbcmd);
702 /* Philips, Intel, and maybe others need CMD_RUN before the
703 * root hub will detect new devices (why?); NEC doesn't */
704 cmd &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
706 ehci_writel(&hcor->or_usbcmd, cmd);
708 /* take control over the ports */
709 cmd = ehci_readl(&hcor->or_configflag);
711 ehci_writel(&hcor->or_configflag, cmd);
712 /* unblock posted write */
713 cmd = ehci_readl(&hcor->or_usbcmd);
715 reg = HC_VERSION(ehci_readl(&hccr->cr_capbase));
716 printf("USB EHCI %x.%02x\n", reg >> 8, reg & 0xff);
724 submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
728 if (usb_pipetype(pipe) != PIPE_BULK) {
729 debug("non-bulk pipe (type=%lu)", usb_pipetype(pipe));
732 return ehci_submit_async(dev, pipe, buffer, length, NULL);
736 submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
737 int length, struct devrequest *setup)
740 if (usb_pipetype(pipe) != PIPE_CONTROL) {
741 debug("non-control pipe (type=%lu)", usb_pipetype(pipe));
745 if (usb_pipedevice(pipe) == rootdev) {
747 dev->speed = USB_SPEED_HIGH;
748 return ehci_submit_root(dev, pipe, buffer, length, setup);
750 return ehci_submit_async(dev, pipe, buffer, length, setup);
754 submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
755 int length, int interval)
758 debug("dev=%p, pipe=%lu, buffer=%p, length=%d, interval=%d",
759 dev, pipe, buffer, length, interval);