2 * Allwinner SUNXI "glue layer"
4 * Copyright © 2015 Hans de Goede <hdegoede@redhat.com>
5 * Copyright © 2013 Jussi Kivilinna <jussi.kivilinna@iki.fi>
7 * Based on the sw_usb "Allwinner OTG Dual Role Controller" code.
8 * Copyright 2007-2012 (C) Allwinner Technology Co., Ltd.
9 * javen <javen@allwinnertech.com>
11 * Based on the DA8xx "glue layer" code.
12 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
13 * Copyright (C) 2005-2006 by Texas Instruments
15 * This file is part of the Inventra Controller Driver for Linux.
17 * The Inventra Controller Driver for Linux is free software; you
18 * can redistribute it and/or modify it under the terms of the GNU
19 * General Public License version 2 as published by the Free Software
24 #include <asm/arch/cpu.h>
25 #include <asm/arch/clock.h>
26 #include <asm/arch/gpio.h>
27 #include <asm/arch/usb_phy.h>
28 #include <asm-generic/gpio.h>
31 #include <linux/usb/musb.h>
32 #include "linux-compat.h"
33 #include "musb_core.h"
34 #include "musb_uboot.h"
36 /******************************************************************************
37 ******************************************************************************
38 * From the Allwinner driver
39 ******************************************************************************
40 ******************************************************************************/
42 /******************************************************************************
43 * From include/sunxi_usb_bsp.h
44 ******************************************************************************/
47 #define USBC_REG_o_ISCR 0x0400
48 #define USBC_REG_o_PHYCTL 0x0404
49 #define USBC_REG_o_PHYBIST 0x0408
50 #define USBC_REG_o_PHYTUNE 0x040c
52 #define USBC_REG_o_VEND0 0x0043
54 /* Interface Status and Control */
55 #define USBC_BP_ISCR_VBUS_VALID_FROM_DATA 30
56 #define USBC_BP_ISCR_VBUS_VALID_FROM_VBUS 29
57 #define USBC_BP_ISCR_EXT_ID_STATUS 28
58 #define USBC_BP_ISCR_EXT_DM_STATUS 27
59 #define USBC_BP_ISCR_EXT_DP_STATUS 26
60 #define USBC_BP_ISCR_MERGED_VBUS_STATUS 25
61 #define USBC_BP_ISCR_MERGED_ID_STATUS 24
63 #define USBC_BP_ISCR_ID_PULLUP_EN 17
64 #define USBC_BP_ISCR_DPDM_PULLUP_EN 16
65 #define USBC_BP_ISCR_FORCE_ID 14
66 #define USBC_BP_ISCR_FORCE_VBUS_VALID 12
67 #define USBC_BP_ISCR_VBUS_VALID_SRC 10
69 #define USBC_BP_ISCR_HOSC_EN 7
70 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT 6
71 #define USBC_BP_ISCR_ID_CHANGE_DETECT 5
72 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT 4
73 #define USBC_BP_ISCR_IRQ_ENABLE 3
74 #define USBC_BP_ISCR_VBUS_CHANGE_DETECT_EN 2
75 #define USBC_BP_ISCR_ID_CHANGE_DETECT_EN 1
76 #define USBC_BP_ISCR_DPDM_CHANGE_DETECT_EN 0
78 /******************************************************************************
80 ******************************************************************************/
82 static u32 USBC_WakeUp_ClearChangeDetect(u32 reg_val)
86 temp &= ~(1 << USBC_BP_ISCR_VBUS_CHANGE_DETECT);
87 temp &= ~(1 << USBC_BP_ISCR_ID_CHANGE_DETECT);
88 temp &= ~(1 << USBC_BP_ISCR_DPDM_CHANGE_DETECT);
93 static void USBC_EnableIdPullUp(__iomem void *base)
97 reg_val = musb_readl(base, USBC_REG_o_ISCR);
98 reg_val |= (1 << USBC_BP_ISCR_ID_PULLUP_EN);
99 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
100 musb_writel(base, USBC_REG_o_ISCR, reg_val);
103 static void USBC_EnableDpDmPullUp(__iomem void *base)
107 reg_val = musb_readl(base, USBC_REG_o_ISCR);
108 reg_val |= (1 << USBC_BP_ISCR_DPDM_PULLUP_EN);
109 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
110 musb_writel(base, USBC_REG_o_ISCR, reg_val);
113 static void USBC_ForceIdToLow(__iomem void *base)
117 reg_val = musb_readl(base, USBC_REG_o_ISCR);
118 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
119 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_ID);
120 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
121 musb_writel(base, USBC_REG_o_ISCR, reg_val);
124 static void USBC_ForceIdToHigh(__iomem void *base)
128 reg_val = musb_readl(base, USBC_REG_o_ISCR);
129 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_ID);
130 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_ID);
131 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
132 musb_writel(base, USBC_REG_o_ISCR, reg_val);
135 static void USBC_ForceVbusValidToLow(__iomem void *base)
139 reg_val = musb_readl(base, USBC_REG_o_ISCR);
140 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
141 reg_val |= (0x02 << USBC_BP_ISCR_FORCE_VBUS_VALID);
142 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
143 musb_writel(base, USBC_REG_o_ISCR, reg_val);
146 static void USBC_ForceVbusValidToHigh(__iomem void *base)
150 reg_val = musb_readl(base, USBC_REG_o_ISCR);
151 reg_val &= ~(0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
152 reg_val |= (0x03 << USBC_BP_ISCR_FORCE_VBUS_VALID);
153 reg_val = USBC_WakeUp_ClearChangeDetect(reg_val);
154 musb_writel(base, USBC_REG_o_ISCR, reg_val);
157 static void USBC_ConfigFIFO_Base(void)
161 /* config usb fifo, 8kb mode */
162 reg_value = readl(SUNXI_SRAMC_BASE + 0x04);
163 reg_value &= ~(0x03 << 0);
164 reg_value |= (1 << 0);
165 writel(reg_value, SUNXI_SRAMC_BASE + 0x04);
168 /******************************************************************************
169 * Needed for the DFU polling magic
170 ******************************************************************************/
172 static u8 last_int_usb;
174 bool dfu_usb_get_reset(void)
176 return !!(last_int_usb & MUSB_INTR_RESET);
179 /******************************************************************************
181 ******************************************************************************/
183 static irqreturn_t sunxi_musb_interrupt(int irq, void *__hci)
185 struct musb *musb = __hci;
186 irqreturn_t retval = IRQ_NONE;
188 /* read and flush interrupts */
189 musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
190 last_int_usb = musb->int_usb;
192 musb_writeb(musb->mregs, MUSB_INTRUSB, musb->int_usb);
193 musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
195 musb_writew(musb->mregs, MUSB_INTRTX, musb->int_tx);
196 musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
198 musb_writew(musb->mregs, MUSB_INTRRX, musb->int_rx);
200 if (musb->int_usb || musb->int_tx || musb->int_rx)
201 retval |= musb_interrupt(musb);
206 /* musb_core does not call enable / disable in a balanced manner <sigh> */
207 static bool enabled = false;
209 static int sunxi_musb_enable(struct musb *musb)
211 pr_debug("%s():\n", __func__);
213 musb_ep_select(musb->mregs, 0);
214 musb_writeb(musb->mregs, MUSB_FADDR, 0);
219 /* select PIO mode */
220 musb_writeb(musb->mregs, USBC_REG_o_VEND0, 0);
222 if (is_host_enabled(musb)) {
223 int id = sunxi_usb_phy_id_detect(0);
225 if (id == 1 && sunxi_usb_phy_power_is_on(0))
226 sunxi_usb_phy_power_off(0);
228 if (!sunxi_usb_phy_power_is_on(0)) {
229 int vbus = sunxi_usb_phy_vbus_detect(0);
231 printf("A charger is plugged into the OTG: ");
237 printf("No host cable detected: ");
241 if (!sunxi_usb_phy_power_is_on(0))
242 sunxi_usb_phy_power_on(0);
245 USBC_ForceVbusValidToHigh(musb->mregs);
251 static void sunxi_musb_disable(struct musb *musb)
253 pr_debug("%s():\n", __func__);
258 USBC_ForceVbusValidToLow(musb->mregs);
259 mdelay(200); /* Wait for the current session to timeout */
264 static int sunxi_musb_init(struct musb *musb)
266 struct sunxi_ccm_reg *ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
268 pr_debug("%s():\n", __func__);
270 musb->isr = sunxi_musb_interrupt;
272 setbits_le32(&ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0);
273 #ifdef CONFIG_SUNXI_GEN_SUN6I
274 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0);
276 sunxi_usb_phy_init(0);
278 USBC_ConfigFIFO_Base();
279 USBC_EnableDpDmPullUp(musb->mregs);
280 USBC_EnableIdPullUp(musb->mregs);
282 if (is_host_enabled(musb)) {
284 USBC_ForceIdToLow(musb->mregs);
286 /* Peripheral mode */
287 USBC_ForceIdToHigh(musb->mregs);
289 USBC_ForceVbusValidToHigh(musb->mregs);
294 static const struct musb_platform_ops sunxi_musb_ops = {
295 .init = sunxi_musb_init,
296 .enable = sunxi_musb_enable,
297 .disable = sunxi_musb_disable,
300 static struct musb_hdrc_config musb_config = {
307 static struct musb_hdrc_platform_data musb_plat = {
308 #if defined(CONFIG_USB_MUSB_HOST)
311 .mode = MUSB_PERIPHERAL,
313 .config = &musb_config,
315 .platform_ops = &sunxi_musb_ops,
318 #ifdef CONFIG_USB_MUSB_HOST
319 int musb_usb_probe(struct udevice *dev)
321 struct musb_host_data *host = dev_get_priv(dev);
322 struct usb_bus_priv *priv = dev_get_uclass_priv(dev);
325 priv->desc_before_addr = true;
328 host->host = musb_init_controller(&musb_plat, NULL,
329 (void *)SUNXI_USB0_BASE);
334 ret = musb_lowlevel_init(host);
336 printf("MUSB OTG\n");
341 int musb_usb_remove(struct udevice *dev)
343 struct musb_host_data *host = dev_get_priv(dev);
345 musb_stop(host->host);
350 U_BOOT_DRIVER(usb_musb) = {
351 .name = "sunxi-musb",
353 .probe = musb_usb_probe,
354 .remove = musb_usb_remove,
355 .ops = &musb_usb_ops,
356 .platdata_auto_alloc_size = sizeof(struct usb_platdata),
357 .priv_auto_alloc_size = sizeof(struct musb_host_data),
361 void sunxi_musb_board_init(void)
363 #ifdef CONFIG_USB_MUSB_HOST
367 * Bind the driver directly for now as musb linux kernel support is
368 * still pending upstream so our dts files do not have the necessary
369 * nodes yet. TODO: Remove this as soon as the dts nodes are in place
370 * and bind by compatible instead.
372 device_bind_driver(dm_root(), "sunxi-musb", "sunxi-musb", &dev);
374 musb_register(&musb_plat, NULL, (void *)SUNXI_USB0_BASE);